* [Qemu-devel] [PATCH] Check correct register for clock source
@ 2019-09-06 1:10 Amithash Prasad
2019-09-06 1:16 ` Joel Stanley
0 siblings, 1 reply; 4+ messages in thread
From: Amithash Prasad @ 2019-09-06 1:10 UTC (permalink / raw)
To: qemu-arm, qemu-devel, amithash, clg, joel
When WDT_RESTART is written, the data is not the contents
of the WDT_CTRL register. Hence ensure we are looking at
WDT_CTRL to check if bit WDT_CTRL_1MHZ_CLK is set or not.
Signed-off-by: Amithash Prasad <amithash@fb.com>
---
hw/watchdog/wdt_aspeed.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c
index 9b93213417..f710036535 100644
--- a/hw/watchdog/wdt_aspeed.c
+++ b/hw/watchdog/wdt_aspeed.c
@@ -140,7 +140,7 @@ static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data,
case WDT_RESTART:
if ((data & 0xFFFF) == WDT_RESTART_MAGIC) {
s->regs[WDT_STATUS] = s->regs[WDT_RELOAD_VALUE];
- aspeed_wdt_reload(s, !(data & WDT_CTRL_1MHZ_CLK));
+ aspeed_wdt_reload(s, !(s->regs[WDT_CTRL] & WDT_CTRL_1MHZ_CLK));
}
break;
case WDT_CTRL:
--
2.21.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] Check correct register for clock source
2019-09-06 1:10 [Qemu-devel] [PATCH] Check correct register for clock source Amithash Prasad
@ 2019-09-06 1:16 ` Joel Stanley
2019-09-06 7:26 ` Cédric Le Goater
0 siblings, 1 reply; 4+ messages in thread
From: Joel Stanley @ 2019-09-06 1:16 UTC (permalink / raw)
To: Amithash Prasad; +Cc: qemu-arm, QEMU Developers, Cédric Le Goater
On Fri, 6 Sep 2019 at 01:10, Amithash Prasad <amithash@fb.com> wrote:
>
> When WDT_RESTART is written, the data is not the contents
> of the WDT_CTRL register. Hence ensure we are looking at
> WDT_CTRL to check if bit WDT_CTRL_1MHZ_CLK is set or not.
>
> Signed-off-by: Amithash Prasad <amithash@fb.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Thanks for the patch!
> ---
> hw/watchdog/wdt_aspeed.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c
> index 9b93213417..f710036535 100644
> --- a/hw/watchdog/wdt_aspeed.c
> +++ b/hw/watchdog/wdt_aspeed.c
> @@ -140,7 +140,7 @@ static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data,
> case WDT_RESTART:
> if ((data & 0xFFFF) == WDT_RESTART_MAGIC) {
> s->regs[WDT_STATUS] = s->regs[WDT_RELOAD_VALUE];
> - aspeed_wdt_reload(s, !(data & WDT_CTRL_1MHZ_CLK));
> + aspeed_wdt_reload(s, !(s->regs[WDT_CTRL] & WDT_CTRL_1MHZ_CLK));
> }
> break;
> case WDT_CTRL:
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] Check correct register for clock source
2019-09-06 1:16 ` Joel Stanley
@ 2019-09-06 7:26 ` Cédric Le Goater
2019-09-13 18:33 ` Amithash Prasad
0 siblings, 1 reply; 4+ messages in thread
From: Cédric Le Goater @ 2019-09-06 7:26 UTC (permalink / raw)
To: Joel Stanley, Amithash Prasad; +Cc: qemu-arm, QEMU Developers
On 06/09/2019 03:16, Joel Stanley wrote:
> On Fri, 6 Sep 2019 at 01:10, Amithash Prasad <amithash@fb.com> wrote:
>>
>> When WDT_RESTART is written, the data is not the contents
>> of the WDT_CTRL register. Hence ensure we are looking at
>> WDT_CTRL to check if bit WDT_CTRL_1MHZ_CLK is set or not.
>>
>> Signed-off-by: Amithash Prasad <amithash@fb.com>
>
> Reviewed-by: Joel Stanley <joel@jms.id.au>
>
> Thanks for the patch!
yes. I have pushed it on the aspeed-4.2 branch but it can go independently
as there are no conflicts. I changed the title slightly to reflect the
area being changed.
On the clock topic, we should consider looking at the "Clock framework API"
from Damien Hedde :
http://patchwork.ozlabs.org/cover/1157671/
Thanks,
C.
>
>> ---
>> hw/watchdog/wdt_aspeed.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c
>> index 9b93213417..f710036535 100644
>> --- a/hw/watchdog/wdt_aspeed.c
>> +++ b/hw/watchdog/wdt_aspeed.c
>> @@ -140,7 +140,7 @@ static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data,
>> case WDT_RESTART:
>> if ((data & 0xFFFF) == WDT_RESTART_MAGIC) {
>> s->regs[WDT_STATUS] = s->regs[WDT_RELOAD_VALUE];
>> - aspeed_wdt_reload(s, !(data & WDT_CTRL_1MHZ_CLK));
>> + aspeed_wdt_reload(s, !(s->regs[WDT_CTRL] & WDT_CTRL_1MHZ_CLK));
>> }
>> break;
>> case WDT_CTRL:
>> --
>> 2.21.0
>>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH] Check correct register for clock source
2019-09-06 7:26 ` Cédric Le Goater
@ 2019-09-13 18:33 ` Amithash Prasad
0 siblings, 0 replies; 4+ messages in thread
From: Amithash Prasad @ 2019-09-13 18:33 UTC (permalink / raw)
To: Cédric Le Goater, Joel Stanley; +Cc: qemu-arm, QEMU Developers
>> yes. I have pushed it on the aspeed-4.2 branch but it can go independently
>>as there are no conflicts. I changed the title slightly to reflect the
>> area being changed.
Thanks! If required, I can change the patch title and resubmit.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2019-09-13 18:34 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-06 1:10 [Qemu-devel] [PATCH] Check correct register for clock source Amithash Prasad
2019-09-06 1:16 ` Joel Stanley
2019-09-06 7:26 ` Cédric Le Goater
2019-09-13 18:33 ` Amithash Prasad
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).