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* [PATCH]: /hw/nvme/ctrl error handling if descriptors are greater than 1024
       [not found] <CGME20210706104308epcas5p4547ee66f254ce8de5d43a375f5a6fd1f@epcas5p4.samsung.com>
@ 2021-07-06 10:43 ` Padmakar Kalghatgi
  2021-07-06 11:29   ` Klaus Jensen
  2021-07-09  6:06   ` Klaus Jensen
  0 siblings, 2 replies; 3+ messages in thread
From: Padmakar Kalghatgi @ 2021-07-06 10:43 UTC (permalink / raw)
  To: qemu-devel; +Cc: fam, kwolf, qemu-block, mreitz, its, stefanha, kbusch

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From: padmakar

 

if the number of descriptors or pages is more than 1024,

dma writes or reads will result in failure. Hence, we check

if the number of descriptors or pages is more than 1024

in the nvme module and return Internal Device error.

 

Signed-off-by: Padmakar Kalghatgi

---

hw/nvme/ctrl.c       | 14 ++++++++++++++

hw/nvme/trace-events |  1 +

2 files changed, 15 insertions(+)

 

diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c

index 40a7efc..082592f 100644

--- a/hw/nvme/ctrl.c

+++ b/hw/nvme/ctrl.c

@@ -602,6 +602,20 @@ static uint16_t nvme_map_addr(NvmeCtrl *n, NvmeSg *sg,
hwaddr addr, size_t len)

         return NVME_SUCCESS;

     }

+    /*

+     *  The QEMU has an inherent issue where in if the no.

+     *  of descriptors is more than 1024, it will result in

+     *  failure during the dma write or reads. Hence, we need

+     *  to return the error.

+     */

+

+    if (((sg->flags & NVME_SG_DMA) && ((sg->qsg.nsg + 1) > IOV_MAX)) ||

+        ((sg->iov.niov + 1) > IOV_MAX)) {

+            NVME_GUEST_ERR(pci_nvme_ub_sg_desc_toohigh,

+                       "number of descriptors is greater than 1024");

+            return NVME_INTERNAL_DEV_ERROR;

+    }

+

     trace_pci_nvme_map_addr(addr, len);

     if (nvme_addr_is_cmb(n, addr)) {

diff --git a/hw/nvme/trace-events b/hw/nvme/trace-events

index ea33d0c..bfe1a3b 100644

--- a/hw/nvme/trace-events

+++ b/hw/nvme/trace-events

@@ -202,3 +202,4 @@ pci_nvme_ub_db_wr_invalid_cqhead(uint32_t qid, uint16_t
new_head) "completion qu

pci_nvme_ub_db_wr_invalid_sq(uint32_t qid) "submission queue doorbell write
for nonexistent queue, sqid=%"PRIu32", ignoring"

pci_nvme_ub_db_wr_invalid_sqtail(uint32_t qid, uint16_t new_tail)
"submission queue doorbell write value beyond queue size, sqid=%"PRIu32",
new_head=%"PRIu16", ignoring"

pci_nvme_ub_unknown_css_value(void) "unknown value in cc.css field"

+pci_nvme_ub_sg_desc_toohigh(void) "the number of sg descriptors is too
high"

-- 

2.7.0.windows.1

 


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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH]: /hw/nvme/ctrl error handling if descriptors are greater than 1024
  2021-07-06 10:43 ` [PATCH]: /hw/nvme/ctrl error handling if descriptors are greater than 1024 Padmakar Kalghatgi
@ 2021-07-06 11:29   ` Klaus Jensen
  2021-07-09  6:06   ` Klaus Jensen
  1 sibling, 0 replies; 3+ messages in thread
From: Klaus Jensen @ 2021-07-06 11:29 UTC (permalink / raw)
  To: Padmakar Kalghatgi
  Cc: fam, kwolf, qemu-block, qemu-devel, mreitz, stefanha, kbusch

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Hi Padmakar,

Patch looks good, but it got messed up by your MUA. You've previously 
contributed correctly formatted patches, so please revert to that method 
when sending patches in the future ;)

Reviewed-by: Klaus Jensen <k.jensen@samsung.com>

On Jul  6 16:13, Padmakar Kalghatgi wrote:
>From: padmakar
>
>
>
>if the number of descriptors or pages is more than 1024,
>
>dma writes or reads will result in failure. Hence, we check
>
>if the number of descriptors or pages is more than 1024
>
>in the nvme module and return Internal Device error.
>
>
>
>Signed-off-by: Padmakar Kalghatgi
>
>---
>
>hw/nvme/ctrl.c       | 14 ++++++++++++++
>
>hw/nvme/trace-events |  1 +
>
>2 files changed, 15 insertions(+)
>
>
>
>diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
>
>index 40a7efc..082592f 100644
>
>--- a/hw/nvme/ctrl.c
>
>+++ b/hw/nvme/ctrl.c
>
>@@ -602,6 +602,20 @@ static uint16_t nvme_map_addr(NvmeCtrl *n, NvmeSg *sg,
>hwaddr addr, size_t len)
>
>         return NVME_SUCCESS;
>
>     }
>
>+    /*
>
>+     *  The QEMU has an inherent issue where in if the no.
>
>+     *  of descriptors is more than 1024, it will result in
>
>+     *  failure during the dma write or reads. Hence, we need
>
>+     *  to return the error.
>
>+     */
>
>+
>
>+    if (((sg->flags & NVME_SG_DMA) && ((sg->qsg.nsg + 1) > IOV_MAX)) ||
>
>+        ((sg->iov.niov + 1) > IOV_MAX)) {
>
>+            NVME_GUEST_ERR(pci_nvme_ub_sg_desc_toohigh,
>
>+                       "number of descriptors is greater than 1024");
>
>+            return NVME_INTERNAL_DEV_ERROR;
>
>+    }
>
>+
>
>     trace_pci_nvme_map_addr(addr, len);
>
>     if (nvme_addr_is_cmb(n, addr)) {
>
>diff --git a/hw/nvme/trace-events b/hw/nvme/trace-events
>
>index ea33d0c..bfe1a3b 100644
>
>--- a/hw/nvme/trace-events
>
>+++ b/hw/nvme/trace-events
>
>@@ -202,3 +202,4 @@ pci_nvme_ub_db_wr_invalid_cqhead(uint32_t qid, uint16_t
>new_head) "completion qu
>
>pci_nvme_ub_db_wr_invalid_sq(uint32_t qid) "submission queue doorbell write
>for nonexistent queue, sqid=%"PRIu32", ignoring"
>
>pci_nvme_ub_db_wr_invalid_sqtail(uint32_t qid, uint16_t new_tail)
>"submission queue doorbell write value beyond queue size, sqid=%"PRIu32",
>new_head=%"PRIu16", ignoring"
>
>pci_nvme_ub_unknown_css_value(void) "unknown value in cc.css field"
>
>+pci_nvme_ub_sg_desc_toohigh(void) "the number of sg descriptors is too
>high"
>
>-- 
>
>2.7.0.windows.1
>
>
>

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^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH]: /hw/nvme/ctrl error handling if descriptors are greater than 1024
  2021-07-06 10:43 ` [PATCH]: /hw/nvme/ctrl error handling if descriptors are greater than 1024 Padmakar Kalghatgi
  2021-07-06 11:29   ` Klaus Jensen
@ 2021-07-09  6:06   ` Klaus Jensen
  1 sibling, 0 replies; 3+ messages in thread
From: Klaus Jensen @ 2021-07-09  6:06 UTC (permalink / raw)
  To: Padmakar Kalghatgi
  Cc: fam, kwolf, qemu-block, qemu-devel, mreitz, stefanha, kbusch

[-- Attachment #1: Type: text/plain, Size: 2346 bytes --]

On Jul  6 16:13, Padmakar Kalghatgi wrote:
>From: padmakar
>
>
>
>if the number of descriptors or pages is more than 1024,
>
>dma writes or reads will result in failure. Hence, we check
>
>if the number of descriptors or pages is more than 1024
>
>in the nvme module and return Internal Device error.
>
>
>
>Signed-off-by: Padmakar Kalghatgi
>
>---
>
>hw/nvme/ctrl.c       | 14 ++++++++++++++
>
>hw/nvme/trace-events |  1 +
>
>2 files changed, 15 insertions(+)
>
>
>
>diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
>
>index 40a7efc..082592f 100644
>
>--- a/hw/nvme/ctrl.c
>
>+++ b/hw/nvme/ctrl.c
>
>@@ -602,6 +602,20 @@ static uint16_t nvme_map_addr(NvmeCtrl *n, NvmeSg *sg,
>hwaddr addr, size_t len)
>
>         return NVME_SUCCESS;
>
>     }
>
>+    /*
>
>+     *  The QEMU has an inherent issue where in if the no.
>
>+     *  of descriptors is more than 1024, it will result in
>
>+     *  failure during the dma write or reads. Hence, we need
>
>+     *  to return the error.
>
>+     */
>
>+
>
>+    if (((sg->flags & NVME_SG_DMA) && ((sg->qsg.nsg + 1) > IOV_MAX)) ||
>
>+        ((sg->iov.niov + 1) > IOV_MAX)) {
>
>+            NVME_GUEST_ERR(pci_nvme_ub_sg_desc_toohigh,
>
>+                       "number of descriptors is greater than 1024");
>
>+            return NVME_INTERNAL_DEV_ERROR;
>
>+    }
>
>+
>
>     trace_pci_nvme_map_addr(addr, len);
>
>     if (nvme_addr_is_cmb(n, addr)) {
>
>diff --git a/hw/nvme/trace-events b/hw/nvme/trace-events
>
>index ea33d0c..bfe1a3b 100644
>
>--- a/hw/nvme/trace-events
>
>+++ b/hw/nvme/trace-events
>
>@@ -202,3 +202,4 @@ pci_nvme_ub_db_wr_invalid_cqhead(uint32_t qid, uint16_t
>new_head) "completion qu
>
>pci_nvme_ub_db_wr_invalid_sq(uint32_t qid) "submission queue doorbell write
>for nonexistent queue, sqid=%"PRIu32", ignoring"
>
>pci_nvme_ub_db_wr_invalid_sqtail(uint32_t qid, uint16_t new_tail)
>"submission queue doorbell write value beyond queue size, sqid=%"PRIu32",
>new_head=%"PRIu16", ignoring"
>
>pci_nvme_ub_unknown_css_value(void) "unknown value in cc.css field"
>
>+pci_nvme_ub_sg_desc_toohigh(void) "the number of sg descriptors is too
>high"
>
>-- 
>
>2.7.0.windows.1
>
>
>

Applied to nvme-next, but made the error message more generic (this also 
applied to PRPs).

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^ permalink raw reply	[flat|nested] 3+ messages in thread

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Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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     [not found] <CGME20210706104308epcas5p4547ee66f254ce8de5d43a375f5a6fd1f@epcas5p4.samsung.com>
2021-07-06 10:43 ` [PATCH]: /hw/nvme/ctrl error handling if descriptors are greater than 1024 Padmakar Kalghatgi
2021-07-06 11:29   ` Klaus Jensen
2021-07-09  6:06   ` Klaus Jensen

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