qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Song Gao <gaosong@loongson.cn>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: peter.maydell@linaro.org, thuth@redhat.com, chenhuacai@gmail.com,
	richard.henderson@linaro.org, qemu-devel@nongnu.org,
	maobibo@loongson.cn, laurent@vivier.eu, yangxiaojuan@loongson.cn,
	alistair.francis@wdc.com, pbonzini@redhat.com,
	alex.bennee@linaro.org
Subject: Re: [PATCH v2 09/22] target/loongarch: Add fixed point bit instruction translation
Date: Thu, 22 Jul 2021 16:17:55 +0800	[thread overview]
Message-ID: <a7991d0c-faa4-9358-0260-0f5cdaa47946@loongson.cn> (raw)
In-Reply-To: <fa4f505f-067d-29b4-03ca-e65108792257@amsat.org>

Hi, Philippe

On 07/22/2021 01:46 AM, Philippe Mathieu-Daudé wrote:
> On 7/21/21 11:53 AM, Song Gao wrote:
>> This patch implement fixed point bit instruction translation.
>>
>> This includes:
>> - EXT.W.{B/H}
>> - CL{O/Z}.{W/D}, CT{O/Z}.{W/D}
>> - BYTEPICK.{W/D}
>> - REVB.{2H/4H/2W/D}
>> - REVH.{2W/D}
>> - BITREV.{4B/8B}, BITREV.{W/D}
>> - BSTRINS.{W/D}, BSTRPICK.{W/D}
>> - MASKEQZ, MASKNEZ
>>
>> Signed-off-by: Song Gao <gaosong@loongson.cn>
>> ---
>>  target/loongarch/helper.h     |  10 +
>>  target/loongarch/insns.decode |  45 +++
>>  target/loongarch/op_helper.c  | 119 ++++++++
>>  target/loongarch/trans.inc.c  | 665 ++++++++++++++++++++++++++++++++++++++++++
>>  4 files changed, 839 insertions(+)
> 
>> diff --git a/target/loongarch/op_helper.c b/target/loongarch/op_helper.c
>> index b2cbdd7..07c3d52 100644
>> --- a/target/loongarch/op_helper.c
>> +++ b/target/loongarch/op_helper.c
>> @@ -25,3 +25,122 @@ void helper_raise_exception(CPULoongArchState *env, uint32_t exception)
>>  {
>>      do_raise_exception(env, exception, GETPC());
>>  }
>> +
>> +target_ulong helper_cto_w(CPULoongArchState *env, target_ulong rj)
>> +{
>> +    uint32_t v = (uint32_t)rj;
>> +    int temp = 0;
>> +
>> +    while ((v & 0x1) == 1) {
>> +        temp++;
>> +        v = v >> 1;
>> +    }
> 
> Why not use cto32() from "qemu/host-utils.h"
>>> +
>> +    return (target_ulong)temp;
>> +}
>> +
>> +target_ulong helper_ctz_w(CPULoongArchState *env, target_ulong rj)
>> +{
>> +    uint32_t v = (uint32_t)rj;
>> +
>> +    if (v == 0) {
>> +        return 32;
>> +    }
>> +
>> +    int temp = 0;
>> +    while ((v & 0x1) == 0) {
>> +        temp++;
>> +        v = v >> 1;
>> +    }
> 
> ctz32
> 
>> +
>> +    return (target_ulong)temp;
>> +}
>> +
>> +target_ulong helper_cto_d(CPULoongArchState *env, target_ulong rj)
>> +{
>> +    uint64_t v = rj;
>> +    int temp = 0;
>> +
>> +    while ((v & 0x1) == 1) {
>> +        temp++;
>> +        v = v >> 1;
>> +    }
> 
> cto64
> 
>> +
>> +    return (target_ulong)temp;
>> +}
>> +
>> +target_ulong helper_ctz_d(CPULoongArchState *env, target_ulong rj)
>> +{
>> +    uint64_t v = rj;
>> +
>> +    if (v == 0) {
>> +        return 64;
>> +    }
>> +
>> +    int temp = 0;
>> +    while ((v & 0x1) == 0) {
>> +        temp++;
>> +        v = v >> 1;
>> +    }
> 
> and ctz64?
> 

Yes,  I didn't notice the file "qemu/host-utils.h" before,  thanks for kindly help! 

>> +
>> +    return (target_ulong)temp;
>> +}
>> +
>> +target_ulong helper_bitrev_w(CPULoongArchState *env, target_ulong rj)
>> +{
>> +    int32_t v = (int32_t)rj;
>> +    const int SIZE = 32;
>> +    uint8_t bytes[SIZE];
>> +
>> +    int i;
>> +    for (i = 0; i < SIZE; i++) {
>> +        bytes[i] = v & 0x1;
>> +        v = v >> 1;
>> +    }
>> +    /* v == 0 */
>> +    for (i = 0; i < SIZE; i++) {
>> +        v = v | ((uint32_t)bytes[i] << (SIZE - 1 - i));
>> +    }
>> +
>> +    return (target_ulong)(int32_t)v;
>> +}
>> +
>> +target_ulong helper_bitrev_d(CPULoongArchState *env, target_ulong rj)
>> +{
>> +    uint64_t v = rj;
>> +    const int SIZE = 64;
>> +    uint8_t bytes[SIZE];
>> +
>> +    int i;
>> +    for (i = 0; i < SIZE; i++) {
>> +        bytes[i] = v & 0x1;
>> +        v = v >> 1;
>> +    }
>> +    /* v == 0 */
>> +    for (i = 0; i < SIZE; i++) {
>> +        v = v | ((uint64_t)bytes[i] << (SIZE - 1 - i));
>> +    }
>> +
>> +    return (target_ulong)v;
>> +}
>> +
>> +static inline target_ulong bitswap(target_ulong v)
>> +{
>> +    v = ((v >> 1) & (target_ulong)0x5555555555555555ULL) |
>> +        ((v & (target_ulong)0x5555555555555555ULL) << 1);
>> +    v = ((v >> 2) & (target_ulong)0x3333333333333333ULL) |
>> +        ((v & (target_ulong)0x3333333333333333ULL) << 2);
>> +    v = ((v >> 4) & (target_ulong)0x0F0F0F0F0F0F0F0FULL) |
>> +        ((v & (target_ulong)0x0F0F0F0F0F0F0F0FULL) << 4);
>> +    return v;
> 
> Is this revbit64?
> 

No, helper_bitrev_d is revbit64(LoongArch insn is 'bitrev.d rd, rj').

bitswap function for 'bitrev.4b/8b rd, rj' instruction.

    BITREV.4B:
      bstr32[31:24] = BITREV(GR[rj][31:24])
      bstr32[23:16] = BITREV(GR[rj][23:16])
      bstr32[15: 8] = BITREV(GR[rj][15: 8])
      bstr32[ 7: 0] = BITREV(GR[rj][ 7: 0])
      GR[rd] = SignExtend(bstr32, GRLEN)
     
    BITREV.8B:
      GR[rd][63:56] = BITREV(GR[rj][63:56])
      GR[rd][55:48] = BITREV(GR[rj][55:48])
      GR[rd][47:40] = BITREV(GR[rj][47:40])
      GR[rd][39:32] = BITREV(GR[rj][39:32])
      GR[rd][31:24] = BITREV(GR[rj][31:24])
      GR[rd][23:16] = BITREV(GR[rj][23:16])
      GR[rd][15: 8] = BITREV(GR[rj][15: 8])
      GR[rd][ 7: 0] = BITREV(GR[rj][ 7: 0])

We can see a detailed introduction in [1]  2.2.3.6.

[1] : https://github.com/loongson/LoongArch-Documentation/releases/download/LoongArch-Vol1-v3/LoongArch-Vol1-v1.00-EN.pdf

Thanks
Song Gao



  reply	other threads:[~2021-07-22  8:19 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-21  9:52 [PATCH v2 00/22] Add LoongArch linux-user emulation support Song Gao
2021-07-21  9:52 ` [PATCH v2 01/22] target/loongarch: Add README Song Gao
2021-07-21  9:52 ` [PATCH v2 02/22] target/loongarch: Add CSR registers definition Song Gao
2021-07-21  9:52 ` [PATCH v2 03/22] target/loongarch: Add core definition Song Gao
2021-07-22 22:43   ` Richard Henderson
2021-07-26  8:47     ` Song Gao
2021-07-26 15:32       ` Richard Henderson
2021-07-21  9:53 ` [PATCH v2 04/22] target/loongarch: Add interrupt handling support Song Gao
2021-07-22 22:47   ` Richard Henderson
2021-07-26  9:23     ` Song Gao
2021-07-21  9:53 ` [PATCH v2 05/22] target/loongarch: Add memory management support Song Gao
2021-07-22 22:48   ` Richard Henderson
2021-07-26  9:25     ` Song Gao
2021-07-21  9:53 ` [PATCH v2 06/22] target/loongarch: Add main translation routines Song Gao
2021-07-22 23:50   ` Richard Henderson
2021-07-26  9:39     ` Song Gao
2021-07-26 15:35       ` Richard Henderson
2021-07-21  9:53 ` [PATCH v2 07/22] target/loongarch: Add fixed point arithmetic instruction translation Song Gao
2021-07-21 17:38   ` Philippe Mathieu-Daudé
2021-07-21 17:49     ` Philippe Mathieu-Daudé
2021-07-22  7:41       ` Song Gao
2021-07-23  0:46   ` Richard Henderson
2021-07-26 11:56     ` Song Gao
2021-07-26 15:53       ` Richard Henderson
2021-07-27  1:51         ` Song Gao
2021-07-21  9:53 ` [PATCH v2 08/22] target/loongarch: Add fixed point shift " Song Gao
2021-07-23  0:51   ` Richard Henderson
2021-07-26 11:57     ` Song Gao
2021-07-21  9:53 ` [PATCH v2 09/22] target/loongarch: Add fixed point bit " Song Gao
2021-07-21 17:46   ` Philippe Mathieu-Daudé
2021-07-22  8:17     ` Song Gao [this message]
2021-07-23  1:29   ` Richard Henderson
2021-07-26 12:22     ` Song Gao
2021-07-26 16:39       ` Richard Henderson
2021-07-21  9:53 ` [PATCH v2 10/22] target/loongarch: Add fixed point load/store " Song Gao
2021-07-23  1:45   ` Richard Henderson
2021-07-26 12:25     ` Song Gao
2021-07-21  9:53 ` [PATCH v2 11/22] target/loongarch: Add fixed point atomic " Song Gao
2021-07-23  1:49   ` Richard Henderson
2021-07-26 12:25     ` Song Gao
2021-07-21  9:53 ` [PATCH v2 12/22] target/loongarch: Add fixed point extra " Song Gao
2021-07-23  5:12   ` Richard Henderson
2021-07-26 12:57     ` Song Gao
2021-07-26 16:42       ` Richard Henderson
2021-07-27  1:46         ` Song Gao
2021-08-04  7:40     ` Song Gao
2021-08-04  7:51       ` Song Gao
2021-07-21  9:53 ` [PATCH v2 13/22] target/loongarch: Add floating point arithmetic " Song Gao
2021-07-23  5:44   ` Richard Henderson
2021-07-27  7:17     ` Song Gao
2021-07-27 16:12       ` Richard Henderson
2021-07-28  1:18         ` Song Gao
2021-07-21  9:53 ` [PATCH v2 14/22] target/loongarch: Add floating point comparison " Song Gao
2021-07-23  6:11   ` Richard Henderson
2021-07-27  7:56     ` Song Gao
2021-07-21  9:53 ` [PATCH v2 15/22] target/loongarch: Add floating point conversion " Song Gao
2021-07-23  6:16   ` Richard Henderson
2021-07-27  7:57     ` Song Gao
2021-07-21  9:53 ` [PATCH v2 16/22] target/loongarch: Add floating point move " Song Gao
2021-07-23  6:29   ` Richard Henderson
2021-07-27  8:06     ` Song Gao
2021-08-12  9:20     ` Song Gao
2021-08-12 19:31       ` Richard Henderson
2021-07-21  9:53 ` [PATCH v2 17/22] target/loongarch: Add floating point load/store " Song Gao
2021-07-23  6:34   ` Richard Henderson
2021-07-27  8:07     ` Song Gao
2021-07-21  9:53 ` [PATCH v2 18/22] target/loongarch: Add branch " Song Gao
2021-07-23  6:38   ` Richard Henderson
2021-07-27  8:07     ` Song Gao
2021-07-21  9:53 ` [PATCH v2 19/22] target/loongarch: Add disassembler Song Gao
2021-07-23  6:40   ` Richard Henderson
2021-08-12 10:33   ` Philippe Mathieu-Daudé
2021-07-21  9:53 ` [PATCH v2 20/22] LoongArch Linux User Emulation Song Gao
2021-07-21  9:53 ` [PATCH v2 21/22] configs: Add loongarch linux-user config Song Gao
2021-07-23  6:43   ` Richard Henderson
2021-07-21  9:53 ` [PATCH v2 22/22] target/loongarch: Add target build suport Song Gao

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a7991d0c-faa4-9358-0260-0f5cdaa47946@loongson.cn \
    --to=gaosong@loongson.cn \
    --cc=alex.bennee@linaro.org \
    --cc=alistair.francis@wdc.com \
    --cc=chenhuacai@gmail.com \
    --cc=f4bug@amsat.org \
    --cc=laurent@vivier.eu \
    --cc=maobibo@loongson.cn \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=thuth@redhat.com \
    --cc=yangxiaojuan@loongson.cn \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).