Re: [PATCH v2 4/4] target/riscv: Add a tb flags field for vstart

From: Richard Henderson <richard.henderson@linaro.org>
To: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>, qemu-devel@nongnu.org
Cc: Alistair.Francis@wdc.com, palmer@dabbelt.com,
	bin.meng@windriver.com, liweiwei@iscas.ac.cn,
	dbarboza@ventanamicro.com, qemu-riscv@nongnu.org
Subject: Re: [PATCH v2 4/4] target/riscv: Add a tb flags field for vstart
Date: Fri, 24 Mar 2023 10:08:10 -0700	[thread overview]
Message-ID: <b6f0dcb7-d4f0-cce1-4527-1b7720b04647@linaro.org> (raw)
In-Reply-To: <20230324143031.1093-5-zhiwei_liu@linux.alibaba.com>

On 3/24/23 07:30, LIU Zhiwei wrote:
> Once we mistook the vstart directly from the env->vstart. As env->vstart is not
> a constant, we should record it in the tb flags if we want to use
> it in translation.
> 
> Reported-by: Richard Henderson<richard.henderson@linaro.org>
> Signed-off-by: LIU Zhiwei<zhiwei_liu@linux.alibaba.com>
> Reviewed-by: Weiwei Li<liweiwei@iscas.ac.cn>
> ---
>   target/riscv/cpu.h                      | 21 +++++++++++----------
>   target/riscv/cpu_helper.c               |  1 +
>   target/riscv/insn_trans/trans_rvv.c.inc | 14 +++++++-------
>   target/riscv/translate.c                |  4 ++--
>   4 files changed, 21 insertions(+), 19 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~