* Re: [PATCH v2 1/4] target/riscv: Extract virt enabled state from tb flags
[not found] ` <20230324143031.1093-2-zhiwei_liu@linux.alibaba.com>
@ 2023-03-24 17:05 ` Richard Henderson
0 siblings, 0 replies; 4+ messages in thread
From: Richard Henderson @ 2023-03-24 17:05 UTC (permalink / raw)
To: LIU Zhiwei, qemu-devel
Cc: Alistair.Francis, palmer, bin.meng, liweiwei, dbarboza, qemu-riscv
On 3/24/23 07:30, LIU Zhiwei wrote:
> Virt enabled state is not a constant. So we should put it into tb flags.
> Thus we can use it like a constant condition at translation phase.
>
> Reported-by: Richard Henderson<richard.henderson@linaro.org>
> Signed-off-by: LIU Zhiwei<zhiwei_liu@linux.alibaba.com>
> Reviewed-by: Weiwei Li<liweiwei@iscas.ac.cn>
> ---
> target/riscv/cpu.h | 2 ++
> target/riscv/cpu_helper.c | 2 ++
> target/riscv/translate.c | 10 +---------
> 3 files changed, 5 insertions(+), 9 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2 2/4] target/riscv: Add a general status enum for extensions
[not found] ` <20230324143031.1093-3-zhiwei_liu@linux.alibaba.com>
@ 2023-03-24 17:06 ` Richard Henderson
0 siblings, 0 replies; 4+ messages in thread
From: Richard Henderson @ 2023-03-24 17:06 UTC (permalink / raw)
To: LIU Zhiwei, qemu-devel
Cc: Alistair.Francis, palmer, bin.meng, liweiwei, dbarboza, qemu-riscv
On 3/24/23 07:30, LIU Zhiwei wrote:
> The pointer masking is the only extension that directly use status.
> The vector or float extension uses the status in an indirect way.
>
> Replace the pointer masking extension special status fields with
> the general status.
>
> Signed-off-by: LIU Zhiwei<zhiwei_liu@linux.alibaba.com>
> ---
> v1->v2:
> Move EXT_STATUS_MASK from enum to macro
> ---
> target/riscv/cpu.c | 2 +-
> target/riscv/cpu.h | 8 ++++++++
> target/riscv/cpu_bits.h | 12 ++++--------
> target/riscv/csr.c | 14 +++++++-------
> 4 files changed, 20 insertions(+), 16 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2 3/4] target/riscv: Encode the FS and VS on a normal way for tb flags
[not found] ` <20230324143031.1093-4-zhiwei_liu@linux.alibaba.com>
@ 2023-03-24 17:07 ` Richard Henderson
0 siblings, 0 replies; 4+ messages in thread
From: Richard Henderson @ 2023-03-24 17:07 UTC (permalink / raw)
To: LIU Zhiwei, qemu-devel
Cc: Alistair.Francis, palmer, bin.meng, liweiwei, dbarboza, qemu-riscv
On 3/24/23 07:30, LIU Zhiwei wrote:
> Reuse the MSTATUS_FS and MSTATUS_VS for the tb flags positions is not a
> normal way.
>
> It will make it hard to change the tb flags layout. And even worse, if we
> want to keep tb flags for a same extension togather without a hole.
>
> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> + flags = FIELD_DP32(flags, TB_FLAGS, FS,
> + flags = FIELD_DP32(flags, TB_FLAGS, VS,
Extra space after =.
r~
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2 4/4] target/riscv: Add a tb flags field for vstart
[not found] ` <20230324143031.1093-5-zhiwei_liu@linux.alibaba.com>
@ 2023-03-24 17:08 ` Richard Henderson
0 siblings, 0 replies; 4+ messages in thread
From: Richard Henderson @ 2023-03-24 17:08 UTC (permalink / raw)
To: LIU Zhiwei, qemu-devel
Cc: Alistair.Francis, palmer, bin.meng, liweiwei, dbarboza, qemu-riscv
On 3/24/23 07:30, LIU Zhiwei wrote:
> Once we mistook the vstart directly from the env->vstart. As env->vstart is not
> a constant, we should record it in the tb flags if we want to use
> it in translation.
>
> Reported-by: Richard Henderson<richard.henderson@linaro.org>
> Signed-off-by: LIU Zhiwei<zhiwei_liu@linux.alibaba.com>
> Reviewed-by: Weiwei Li<liweiwei@iscas.ac.cn>
> ---
> target/riscv/cpu.h | 21 +++++++++++----------
> target/riscv/cpu_helper.c | 1 +
> target/riscv/insn_trans/trans_rvv.c.inc | 14 +++++++-------
> target/riscv/translate.c | 4 ++--
> 4 files changed, 21 insertions(+), 19 deletions(-)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-03-24 17:08 UTC | newest]
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[not found] ` <20230324143031.1093-2-zhiwei_liu@linux.alibaba.com>
2023-03-24 17:05 ` [PATCH v2 1/4] target/riscv: Extract virt enabled state from tb flags Richard Henderson
[not found] ` <20230324143031.1093-3-zhiwei_liu@linux.alibaba.com>
2023-03-24 17:06 ` [PATCH v2 2/4] target/riscv: Add a general status enum for extensions Richard Henderson
[not found] ` <20230324143031.1093-4-zhiwei_liu@linux.alibaba.com>
2023-03-24 17:07 ` [PATCH v2 3/4] target/riscv: Encode the FS and VS on a normal way for tb flags Richard Henderson
[not found] ` <20230324143031.1093-5-zhiwei_liu@linux.alibaba.com>
2023-03-24 17:08 ` [PATCH v2 4/4] target/riscv: Add a tb flags field for vstart Richard Henderson
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