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From: Alistair Francis <alistair.francis@wdc.com>
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: weiying_hou@outlook.com, Ethan.Lee.QNL@gmail.com,
	alistair.francis@wdc.com, alistair23@gmail.com,
	palmer@dabbelt.com, bmeng.cn@gmail.com, camiyoru@gmail.com
Subject: [PATCH v1 0/8]  RISC-V: Add support for ePMP v0.9.1
Date: Fri,  2 Apr 2021 08:47:16 -0400	[thread overview]
Message-ID: <cover.1617367533.git.alistair.francis@wdc.com> (raw)

This series adds support for ePMP v0.9.1 to the QEMU RISC-V target.

This is based on previous patches, but has been rebased on the latest
master and updated for the latest spec.

The spec is avaliable at: https://docs.google.com/document/d/1Mh_aiHYxemL0umN3GTTw8vsbmzHZ_nxZXgjgOUzbvc8

This was tested by running Tock on the OpenTitan board.

This is based on the original work by
 Hongzheng-Li <Ethan.Lee.QNL@gmail.com>
 Hou Weiying <weiying_hou@outlook.com>
 Myriad-Dreamin <camiyoru@gmail.com>

Alistair Francis (4):
  target/riscv: Fix the PMP is locked check when using TOR
  target/riscv: Add the ePMP feature
  target/riscv/pmp: Remove outdated comment
  target/riscv: Add ePMP support for the Ibex CPU

Hou Weiying (4):
  target/riscv: Define ePMP mseccfg
  target/riscv: Add ePMP CSR access functions
  target/riscv: Implementation of enhanced PMP (ePMP)
  target/riscv: Add a config option for ePMP

 target/riscv/cpu.h        |   3 +
 target/riscv/cpu_bits.h   |   3 +
 target/riscv/pmp.h        |  14 +++
 target/riscv/cpu.c        |  11 ++
 target/riscv/csr.c        |  22 ++++
 target/riscv/pmp.c        | 228 +++++++++++++++++++++++++++++++++-----
 target/riscv/trace-events |   3 +
 7 files changed, 258 insertions(+), 26 deletions(-)

-- 
2.31.0



             reply	other threads:[~2021-04-02 12:50 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-02 12:47 Alistair Francis [this message]
2021-04-02 12:47 ` [PATCH v1 1/8] target/riscv: Fix the PMP is locked check when using TOR Alistair Francis
2021-04-08  9:25   ` Bin Meng
2021-04-02 12:47 ` [PATCH v1 2/8] target/riscv: Define ePMP mseccfg Alistair Francis
2021-04-07 14:24   ` Bin Meng
2021-04-02 12:47 ` [PATCH v1 3/8] target/riscv: Add the ePMP feature Alistair Francis
2021-04-07 14:24   ` Bin Meng
2021-04-02 12:47 ` [PATCH v1 4/8] target/riscv: Add ePMP CSR access functions Alistair Francis
2021-04-08 12:57   ` Bin Meng
2021-04-02 12:48 ` [PATCH v1 5/8] target/riscv: Implementation of enhanced PMP (ePMP) Alistair Francis
2021-04-09  4:24   ` Bin Meng
2021-04-11 23:03     ` Alistair Francis
2021-04-02 12:48 ` [PATCH v1 6/8] target/riscv: Add a config option for ePMP Alistair Francis
2021-04-07 14:28   ` Bin Meng
2021-04-02 12:48 ` [PATCH v1 7/8] target/riscv/pmp: Remove outdated comment Alistair Francis
2021-04-07 14:28   ` Bin Meng
2021-04-02 12:48 ` [PATCH v1 8/8] target/riscv: Add ePMP support for the Ibex CPU Alistair Francis
2021-04-07 14:28   ` Bin Meng

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