* [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties
@ 2019-05-18 20:54 Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 01/10] hw/boards: Add struct CpuTopology to MachineState Like Xu
` (12 more replies)
0 siblings, 13 replies; 32+ messages in thread
From: Like Xu @ 2019-05-18 20:54 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, qemu-devel,
Dr . David Alan Gilbert, Alistair Francis, Igor Mammedov
This patch series make existing cores/threads/sockets into machine
properties and get rid of global smp_* variables they use currently.
The purpose of getting rid of globals is disentangle layer violations and
let's do it one step at a time by replacing the smp_foo with qdev_get_machine()
as few calls as possible and delay other related refactoring efforts.
==changelog==
v3:
- rephrase commit messages
- s/of/of present/ for CpuTopology comment
- drop reduanct arguments such as cpu_type
- use ms instead of macs in migration context
- rebase to commit 1b46b4daa6
v2: https://patchwork.ozlabs.org/cover/1095727/
- pass MachineState via call chain with trivial fixups
- replace smp_cpus directly at places if it's only used once
- s/topo/smp/ and drop smp_ prefix inside CpuTopology structure
- add more commit messages to explaining what patch does
- fix Patchew build failure for xen usage
- use macs rather than ms in migration context for MigrationState
- cleanup unrelated and redundant changes
- spilt OpenRISC and RISC-V related patches
v1: https://patchwork.kernel.org/cover/10876667/
Like Xu (10):
hw/boards: Add struct CpuTopology to MachineState
machine: Refactor smp-related call chains to pass MachineState
general: Replace global smp variables with smp machine properties
hw/ppc: Replace global smp variables with machine smp properties
hw/riscv: Replace global smp variables with machine smp properties
hw/s390x: Replace global smp variables with machine smp properties
hw/i386: Replace global smp variables with machine smp properties
hw/arm: Replace global smp variables with machine smp properties
hw: Replace global smp variables with MachineState for all remaining archs
vl.c: Replace smp global variables with smp machine properties
accel/kvm/kvm-all.c | 4 +--
backends/hostmem.c | 6 +++--
cpus.c | 6 +++--
exec.c | 3 ++-
gdbstub.c | 4 +++
hw/alpha/dp264.c | 1 +
hw/arm/fsl-imx6.c | 6 ++++-
hw/arm/fsl-imx6ul.c | 6 ++++-
hw/arm/fsl-imx7.c | 7 +++--
hw/arm/highbank.c | 1 +
hw/arm/mcimx6ul-evk.c | 2 +-
hw/arm/mcimx7d-sabre.c | 2 +-
hw/arm/raspi.c | 4 +--
hw/arm/realview.c | 1 +
hw/arm/sabrelite.c | 2 +-
hw/arm/vexpress.c | 16 +++++++-----
hw/arm/virt.c | 10 ++++++--
hw/arm/xlnx-zynqmp.c | 16 +++++++-----
hw/cpu/core.c | 4 ++-
hw/hppa/machine.c | 4 ++-
hw/i386/acpi-build.c | 13 ++++++----
hw/i386/kvmvapic.c | 7 +++--
hw/i386/pc.c | 33 ++++++++++++++----------
hw/i386/xen/xen-hvm.c | 4 +++
hw/mips/boston.c | 2 +-
hw/mips/mips_malta.c | 24 +++++++++--------
hw/openrisc/openrisc_sim.c | 1 +
hw/ppc/e500.c | 3 +++
hw/ppc/mac_newworld.c | 3 ++-
hw/ppc/mac_oldworld.c | 3 ++-
hw/ppc/pnv.c | 9 ++++---
hw/ppc/prep.c | 4 +--
hw/ppc/spapr.c | 37 ++++++++++++++++++--------
hw/ppc/spapr_rtas.c | 4 ++-
hw/riscv/sifive_e.c | 6 +++--
hw/riscv/sifive_plic.c | 3 +++
hw/riscv/sifive_u.c | 6 +++--
hw/riscv/spike.c | 2 ++
hw/riscv/virt.c | 1 +
hw/s390x/s390-virtio-ccw.c | 9 ++++---
hw/s390x/sclp.c | 2 +-
hw/smbios/smbios.c | 26 +++++++++++--------
hw/sparc/sun4m.c | 2 ++
hw/sparc64/sun4u.c | 4 +--
hw/xtensa/sim.c | 2 +-
hw/xtensa/xtfpga.c | 1 +
include/hw/boards.h | 19 ++++++++++++--
include/hw/firmware/smbios.h | 5 ++--
include/hw/i386/pc.h | 2 +-
migration/postcopy-ram.c | 8 +++++-
numa.c | 1 +
qmp.c | 2 +-
target/arm/cpu.c | 8 +++++-
target/i386/cpu.c | 4 ++-
target/openrisc/sys_helper.c | 6 ++++-
target/s390x/cpu.c | 3 +++
target/s390x/excp_helper.c | 5 ++++
tcg/tcg.c | 13 +++++++++-
vl.c | 50 +++++++++++++++++++-----------------
59 files changed, 301 insertions(+), 141 deletions(-)
--
2.21.0
^ permalink raw reply [flat|nested] 32+ messages in thread
* [Qemu-devel] [PATCH v3 01/10] hw/boards: Add struct CpuTopology to MachineState
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
@ 2019-05-18 20:54 ` Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 02/10] machine: Refactor smp-related call chains to pass MachineState Like Xu
` (11 subsequent siblings)
12 siblings, 0 replies; 32+ messages in thread
From: Like Xu @ 2019-05-18 20:54 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, qemu-devel,
Dr . David Alan Gilbert, Alistair Francis, Igor Mammedov
The cpu topology property CpuTopology is added to the MachineState
and its members are initialized with the leagcy global smp variables.
From this commit, the code in the system emulation mode is supposed to
use cpu topology variables from MachineState instead of the global ones
defined in vl.c and there is no semantic change.
Suggested-by: Igor Mammedov <imammedo@redhat.com>
Suggested-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
include/hw/boards.h | 15 +++++++++++++++
vl.c | 5 +++++
2 files changed, 20 insertions(+)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 6f7916f88f..bc23b5db1d 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -230,6 +230,20 @@ typedef struct DeviceMemoryState {
MemoryRegion mr;
} DeviceMemoryState;
+/**
+ * CpuTopology:
+ * @cpus: the number of present logical processors on the machine
+ * @cores: the number of cores in one package
+ * @threads: the number of threads in one core
+ * @max_cpus: the maximum number of logical processors on the machine
+ */
+typedef struct CpuTopology {
+ unsigned int cpus;
+ unsigned int cores;
+ unsigned int threads;
+ unsigned int max_cpus;
+} CpuTopology;
+
/**
* MachineState:
*/
@@ -272,6 +286,7 @@ struct MachineState {
const char *cpu_type;
AccelState *accelerator;
CPUArchIdList *possible_cpus;
+ CpuTopology smp;
struct NVDIMMState *nvdimms_state;
};
diff --git a/vl.c b/vl.c
index c8ca9ff6ff..40b006577b 100644
--- a/vl.c
+++ b/vl.c
@@ -4133,6 +4133,11 @@ int main(int argc, char **argv, char **envp)
smp_parse(qemu_opts_find(qemu_find_opts("smp-opts"), NULL));
+ current_machine->smp.cpus = smp_cpus;
+ current_machine->smp.max_cpus = max_cpus;
+ current_machine->smp.cores = smp_cores;
+ current_machine->smp.threads = smp_threads;
+
/* sanity-check smp_cpus and max_cpus against machine_class */
if (smp_cpus < machine_class->min_cpus) {
error_report("Invalid SMP CPUs %d. The min CPUs "
--
2.21.0
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [Qemu-devel] [PATCH v3 02/10] machine: Refactor smp-related call chains to pass MachineState
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 01/10] hw/boards: Add struct CpuTopology to MachineState Like Xu
@ 2019-05-18 20:54 ` Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 03/10] general: Replace global smp variables with smp machine properties Like Xu
` (10 subsequent siblings)
12 siblings, 0 replies; 32+ messages in thread
From: Like Xu @ 2019-05-18 20:54 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, qemu-devel,
Dr . David Alan Gilbert, Alistair Francis, Igor Mammedov
To get rid of the global smp_* variables we're currently using, it's recommended
to pass MachineState in the list of incoming parameters for functions that use
global smp variables, thus some redundant parameters are dropped. It's applied
for legacy smbios_*(), *_machine_reset(), hot_add_cpu() and mips *_create_cpu().
Suggested-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/arm/virt.c | 2 +-
hw/hppa/machine.c | 2 +-
hw/i386/acpi-build.c | 2 +-
hw/i386/pc.c | 9 ++++-----
hw/mips/mips_malta.c | 22 +++++++++++-----------
hw/ppc/pnv.c | 3 +--
hw/ppc/spapr.c | 3 +--
hw/s390x/s390-virtio-ccw.c | 6 +++---
hw/smbios/smbios.c | 26 +++++++++++++++-----------
include/hw/boards.h | 4 ++--
include/hw/firmware/smbios.h | 5 +++--
include/hw/i386/pc.h | 2 +-
qmp.c | 2 +-
vl.c | 2 +-
14 files changed, 46 insertions(+), 44 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 5331ab71e2..6b2f2e96d3 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1342,7 +1342,7 @@ static void virt_build_smbios(VirtMachineState *vms)
vmc->smbios_old_sys_ver ? "1.0" : mc->name, false,
true, SMBIOS_ENTRY_POINT_30);
- smbios_get_tables(NULL, 0, &smbios_tables, &smbios_tables_len,
+ smbios_get_tables(MACHINE(vms), NULL, 0, &smbios_tables, &smbios_tables_len,
&smbios_anchor, &smbios_anchor_len);
if (smbios_anchor) {
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index d1b1d3caa4..416e67bab1 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -240,7 +240,7 @@ static void machine_hppa_init(MachineState *machine)
cpu[0]->env.gr[21] = smp_cpus;
}
-static void hppa_machine_reset(void)
+static void hppa_machine_reset(MachineState *ms)
{
int i;
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b4ec14e349..c8e47e5713 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -187,7 +187,7 @@ static void acpi_get_pm_info(AcpiPmInfo *pm)
pm->pcihp_io_len = 0;
assert(obj);
- init_common_fadt_data(obj, &pm->fadt);
+ init_common_fadt_data(machine, obj, &pm->fadt);
if (piix) {
/* w2k requires FADT(rev1) or it won't boot, keep PC compatible */
pm->fadt.rev = 1;
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index d98b737b8f..9bcd867ea3 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -962,7 +962,7 @@ static void pc_build_smbios(PCMachineState *pcms)
/* tell smbios about cpuid version and features */
smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
- smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
+ smbios_tables = smbios_get_table_legacy(ms, &smbios_tables_len);
if (smbios_tables) {
fw_cfg_add_bytes(pcms->fw_cfg, FW_CFG_SMBIOS_ENTRIES,
smbios_tables, smbios_tables_len);
@@ -979,7 +979,7 @@ static void pc_build_smbios(PCMachineState *pcms)
array_count++;
}
}
- smbios_get_tables(mem_array, array_count,
+ smbios_get_tables(ms, mem_array, array_count,
&smbios_tables, &smbios_tables_len,
&smbios_anchor, &smbios_anchor_len);
g_free(mem_array);
@@ -1534,9 +1534,8 @@ static void pc_new_cpu(const char *typename, int64_t apic_id, Error **errp)
error_propagate(errp, local_err);
}
-void pc_hot_add_cpu(const int64_t id, Error **errp)
+void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp)
{
- MachineState *ms = MACHINE(qdev_get_machine());
int64_t apic_id = x86_cpu_apic_id_from_index(id);
Error *local_err = NULL;
@@ -2622,7 +2621,7 @@ static void pc_machine_initfn(Object *obj)
pc_system_flash_create(pcms);
}
-static void pc_machine_reset(void)
+static void pc_machine_reset(MachineState *machine)
{
CPUState *cs;
X86CPU *cpu;
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 439665ab45..5fe9512c24 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -1124,15 +1124,15 @@ static void main_cpu_reset(void *opaque)
}
}
-static void create_cpu_without_cps(const char *cpu_type,
+static void create_cpu_without_cps(MachineState *ms,
qemu_irq *cbus_irq, qemu_irq *i8259_irq)
{
CPUMIPSState *env;
MIPSCPU *cpu;
int i;
- for (i = 0; i < smp_cpus; i++) {
- cpu = MIPS_CPU(cpu_create(cpu_type));
+ for (i = 0; i < ms->smp.cpus; i++) {
+ cpu = MIPS_CPU(cpu_create(ms->cpu_type));
/* Init internal devices */
cpu_mips_irq_init_cpu(cpu);
@@ -1146,7 +1146,7 @@ static void create_cpu_without_cps(const char *cpu_type,
*cbus_irq = env->irq[4];
}
-static void create_cps(MaltaState *s, const char *cpu_type,
+static void create_cps(MachineState *ms, MaltaState *s,
qemu_irq *cbus_irq, qemu_irq *i8259_irq)
{
Error *err = NULL;
@@ -1154,8 +1154,8 @@ static void create_cps(MaltaState *s, const char *cpu_type,
s->cps = MIPS_CPS(object_new(TYPE_MIPS_CPS));
qdev_set_parent_bus(DEVICE(s->cps), sysbus_get_default());
- object_property_set_str(OBJECT(s->cps), cpu_type, "cpu-type", &err);
- object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err);
+ object_property_set_str(OBJECT(s->cps), ms->cpu_type, "cpu-type", &err);
+ object_property_set_int(OBJECT(s->cps), ms->smp.cpus, "num-vp", &err);
object_property_set_bool(OBJECT(s->cps), true, "realized", &err);
if (err != NULL) {
error_report("%s", error_get_pretty(err));
@@ -1168,13 +1168,13 @@ static void create_cps(MaltaState *s, const char *cpu_type,
*cbus_irq = NULL;
}
-static void mips_create_cpu(MaltaState *s, const char *cpu_type,
+static void mips_create_cpu(MachineState *ms, MaltaState *s,
qemu_irq *cbus_irq, qemu_irq *i8259_irq)
{
- if ((smp_cpus > 1) && cpu_supports_cps_smp(cpu_type)) {
- create_cps(s, cpu_type, cbus_irq, i8259_irq);
+ if ((ms->smp.cpus > 1) && cpu_supports_cps_smp(ms->cpu_type)) {
+ create_cps(ms, s, cbus_irq, i8259_irq);
} else {
- create_cpu_without_cps(cpu_type, cbus_irq, i8259_irq);
+ create_cpu_without_cps(ms, cbus_irq, i8259_irq);
}
}
@@ -1218,7 +1218,7 @@ void mips_malta_init(MachineState *machine)
qdev_init_nofail(dev);
/* create CPU */
- mips_create_cpu(s, machine->cpu_type, &cbus_irq, &i8259_irq);
+ mips_create_cpu(machine, s, &cbus_irq, &i8259_irq);
/* allocate RAM */
if (ram_size > 2 * GiB) {
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index dfb4ea5742..1e8c505936 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -520,9 +520,8 @@ static void pnv_powerdown_notify(Notifier *n, void *opaque)
}
}
-static void pnv_reset(void)
+static void pnv_reset(MachineState *machine)
{
- MachineState *machine = MACHINE(qdev_get_machine());
PnvMachineState *pnv = PNV_MACHINE(machine);
void *fdt;
Object *obj;
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 2ef3ce4362..7fb34decb9 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1689,9 +1689,8 @@ static int spapr_reset_drcs(Object *child, void *opaque)
return 0;
}
-static void spapr_machine_reset(void)
+static void spapr_machine_reset(MachineState *machine)
{
- MachineState *machine = MACHINE(qdev_get_machine());
SpaprMachineState *spapr = SPAPR_MACHINE(machine);
PowerPCCPU *first_ppc_cpu;
uint32_t rtas_limit;
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index bbc6e8fa0b..ed1fe7a93e 100644
--- a/hw/s390x/s390-virtio-ccw.c
+++ b/hw/s390x/s390-virtio-ccw.c
@@ -338,7 +338,7 @@ static inline void s390_do_cpu_ipl(CPUState *cs, run_on_cpu_data arg)
s390_cpu_set_state(S390_CPU_STATE_OPERATING, cpu);
}
-static void s390_machine_reset(void)
+static void s390_machine_reset(MachineState *machine)
{
enum s390_reset reset_type;
CPUState *cs, *t;
@@ -439,9 +439,9 @@ static HotplugHandler *s390_get_hotplug_handler(MachineState *machine,
return NULL;
}
-static void s390_hot_add_cpu(const int64_t id, Error **errp)
+static void s390_hot_add_cpu(MachineState *machine,
+ const int64_t id, Error **errp)
{
- MachineState *machine = MACHINE(qdev_get_machine());
ObjectClass *oc;
g_assert(machine->possible_cpus->cpus[0].cpu);
diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
index 47be9071fa..0bf9a01edd 100644
--- a/hw/smbios/smbios.c
+++ b/hw/smbios/smbios.c
@@ -26,6 +26,7 @@
#include "sysemu/cpus.h"
#include "hw/firmware/smbios.h"
#include "hw/loader.h"
+#include "hw/boards.h"
#include "exec/cpu-common.h"
#include "smbios_build.h"
@@ -340,9 +341,10 @@ static void smbios_register_config(void)
opts_init(smbios_register_config);
-static void smbios_validate_table(void)
+static void smbios_validate_table(MachineState *ms)
{
- uint32_t expect_t4_count = smbios_legacy ? smp_cpus : smbios_smp_sockets;
+ uint32_t expect_t4_count = smbios_legacy ?
+ ms->smp.cpus : smbios_smp_sockets;
if (smbios_type4_count && smbios_type4_count != expect_t4_count) {
error_report("Expected %d SMBIOS Type 4 tables, got %d instead",
@@ -427,7 +429,7 @@ static void smbios_build_type_1_fields(void)
}
}
-uint8_t *smbios_get_table_legacy(size_t *length)
+uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length)
{
if (!smbios_legacy) {
*length = 0;
@@ -437,7 +439,7 @@ uint8_t *smbios_get_table_legacy(size_t *length)
if (!smbios_immutable) {
smbios_build_type_0_fields();
smbios_build_type_1_fields();
- smbios_validate_table();
+ smbios_validate_table(ms);
smbios_immutable = true;
}
*length = smbios_entries_len;
@@ -569,7 +571,7 @@ static void smbios_build_type_3_table(void)
SMBIOS_BUILD_TABLE_POST;
}
-static void smbios_build_type_4_table(unsigned instance)
+static void smbios_build_type_4_table(MachineState *ms, unsigned instance)
{
char sock_str[128];
@@ -596,8 +598,8 @@ static void smbios_build_type_4_table(unsigned instance)
SMBIOS_TABLE_SET_STR(4, serial_number_str, type4.serial);
SMBIOS_TABLE_SET_STR(4, asset_tag_number_str, type4.asset);
SMBIOS_TABLE_SET_STR(4, part_number_str, type4.part);
- t->core_count = t->core_enabled = smp_cores;
- t->thread_count = smp_threads;
+ t->core_count = t->core_enabled = ms->smp.cores;
+ t->thread_count = ms->smp.threads;
t->processor_characteristics = cpu_to_le16(0x02); /* Unknown */
t->processor_family2 = cpu_to_le16(0x01); /* Other */
@@ -838,7 +840,8 @@ static void smbios_entry_point_setup(void)
}
}
-void smbios_get_tables(const struct smbios_phys_mem_area *mem_array,
+void smbios_get_tables(MachineState *ms,
+ const struct smbios_phys_mem_area *mem_array,
const unsigned int mem_array_size,
uint8_t **tables, size_t *tables_len,
uint8_t **anchor, size_t *anchor_len)
@@ -857,11 +860,12 @@ void smbios_get_tables(const struct smbios_phys_mem_area *mem_array,
smbios_build_type_2_table();
smbios_build_type_3_table();
- smbios_smp_sockets = DIV_ROUND_UP(smp_cpus, smp_cores * smp_threads);
+ smbios_smp_sockets = DIV_ROUND_UP(ms->smp.cpus,
+ ms->smp.cores * ms->smp.threads);
assert(smbios_smp_sockets >= 1);
for (i = 0; i < smbios_smp_sockets; i++) {
- smbios_build_type_4_table(i);
+ smbios_build_type_4_table(ms, i);
}
smbios_build_type_11_table();
@@ -887,7 +891,7 @@ void smbios_get_tables(const struct smbios_phys_mem_area *mem_array,
smbios_build_type_38_table();
smbios_build_type_127_table();
- smbios_validate_table();
+ smbios_validate_table(ms);
smbios_entry_point_setup();
smbios_immutable = true;
}
diff --git a/include/hw/boards.h b/include/hw/boards.h
index bc23b5db1d..324c611e99 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -171,8 +171,8 @@ struct MachineClass {
const char *deprecation_reason;
void (*init)(MachineState *state);
- void (*reset)(void);
- void (*hot_add_cpu)(const int64_t id, Error **errp);
+ void (*reset)(MachineState *state);
+ void (*hot_add_cpu)(MachineState *state, const int64_t id, Error **errp);
int (*kvm_type)(MachineState *machine, const char *arg);
BlockInterfaceType block_default_type;
diff --git a/include/hw/firmware/smbios.h b/include/hw/firmware/smbios.h
index 6fef32a3c9..02a0ced0a0 100644
--- a/include/hw/firmware/smbios.h
+++ b/include/hw/firmware/smbios.h
@@ -268,8 +268,9 @@ void smbios_set_cpuid(uint32_t version, uint32_t features);
void smbios_set_defaults(const char *manufacturer, const char *product,
const char *version, bool legacy_mode,
bool uuid_encoded, SmbiosEntryPointType ep_type);
-uint8_t *smbios_get_table_legacy(size_t *length);
-void smbios_get_tables(const struct smbios_phys_mem_area *mem_array,
+uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length);
+void smbios_get_tables(MachineState *ms,
+ const struct smbios_phys_mem_area *mem_array,
const unsigned int mem_array_size,
uint8_t **tables, size_t *tables_len,
uint8_t **anchor, size_t *anchor_len);
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 43df7230a2..ce3c22951e 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -186,7 +186,7 @@ void pc_register_ferr_irq(qemu_irq irq);
void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
void pc_cpus_init(PCMachineState *pcms);
-void pc_hot_add_cpu(const int64_t id, Error **errp);
+void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp);
void pc_guest_info_init(PCMachineState *pcms);
diff --git a/qmp.c b/qmp.c
index b92d62cd5f..ba7aa043c7 100644
--- a/qmp.c
+++ b/qmp.c
@@ -123,7 +123,7 @@ void qmp_cpu_add(int64_t id, Error **errp)
mc = MACHINE_GET_CLASS(current_machine);
if (mc->hot_add_cpu) {
- mc->hot_add_cpu(id, errp);
+ mc->hot_add_cpu(current_machine, id, errp);
} else {
error_setg(errp, "Not supported");
}
diff --git a/vl.c b/vl.c
index 40b006577b..15d519e371 100644
--- a/vl.c
+++ b/vl.c
@@ -1706,7 +1706,7 @@ void qemu_system_reset(ShutdownCause reason)
cpu_synchronize_all_states();
if (mc && mc->reset) {
- mc->reset();
+ mc->reset(current_machine);
} else {
qemu_devices_reset();
}
--
2.21.0
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [Qemu-devel] [PATCH v3 03/10] general: Replace global smp variables with smp machine properties
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 01/10] hw/boards: Add struct CpuTopology to MachineState Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 02/10] machine: Refactor smp-related call chains to pass MachineState Like Xu
@ 2019-05-18 20:54 ` Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 04/10] hw/ppc: Replace global smp variables with machine smp properties Like Xu
` (9 subsequent siblings)
12 siblings, 0 replies; 32+ messages in thread
From: Like Xu @ 2019-05-18 20:54 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, qemu-devel,
Dr . David Alan Gilbert, Alistair Francis, Igor Mammedov
Basically, the context could get the MachineState reference via call
chains or unrecommended qdev_get_machine() in !CONFIG_USER_ONLY mode.
A local variable of the same name would be introduced in the declaration
phase out of less effort OR replace it on the spot if it's only used
once in the context. No semantic changes.
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
accel/kvm/kvm-all.c | 4 ++--
backends/hostmem.c | 6 ++++--
cpus.c | 6 ++++--
exec.c | 3 ++-
gdbstub.c | 4 ++++
hw/cpu/core.c | 4 +++-
migration/postcopy-ram.c | 8 +++++++-
numa.c | 1 +
target/openrisc/sys_helper.c | 6 +++++-
tcg/tcg.c | 13 ++++++++++++-
10 files changed, 44 insertions(+), 11 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 524c4ddfbd..f8ef39d845 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -1533,8 +1533,8 @@ static int kvm_init(MachineState *ms)
const char *name;
int num;
} num_cpus[] = {
- { "SMP", smp_cpus },
- { "hotpluggable", max_cpus },
+ { "SMP", ms->smp.cpus },
+ { "hotpluggable", ms->smp.max_cpus },
{ NULL, }
}, *nc = num_cpus;
int soft_vcpus_limit, hard_vcpus_limit;
diff --git a/backends/hostmem.c b/backends/hostmem.c
index 04baf479a1..463102aa15 100644
--- a/backends/hostmem.c
+++ b/backends/hostmem.c
@@ -222,6 +222,7 @@ static void host_memory_backend_set_prealloc(Object *obj, bool value,
{
Error *local_err = NULL;
HostMemoryBackend *backend = MEMORY_BACKEND(obj);
+ MachineState *ms = MACHINE(qdev_get_machine());
if (backend->force_prealloc) {
if (value) {
@@ -241,7 +242,7 @@ static void host_memory_backend_set_prealloc(Object *obj, bool value,
void *ptr = memory_region_get_ram_ptr(&backend->mr);
uint64_t sz = memory_region_size(&backend->mr);
- os_mem_prealloc(fd, ptr, sz, smp_cpus, &local_err);
+ os_mem_prealloc(fd, ptr, sz, ms->smp.cpus, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
@@ -311,6 +312,7 @@ host_memory_backend_memory_complete(UserCreatable *uc, Error **errp)
{
HostMemoryBackend *backend = MEMORY_BACKEND(uc);
HostMemoryBackendClass *bc = MEMORY_BACKEND_GET_CLASS(uc);
+ MachineState *ms = MACHINE(qdev_get_machine());
Error *local_err = NULL;
void *ptr;
uint64_t sz;
@@ -375,7 +377,7 @@ host_memory_backend_memory_complete(UserCreatable *uc, Error **errp)
*/
if (backend->prealloc) {
os_mem_prealloc(memory_region_get_fd(&backend->mr), ptr, sz,
- smp_cpus, &local_err);
+ ms->smp.cpus, &local_err);
if (local_err) {
goto out;
}
diff --git a/cpus.c b/cpus.c
index e58e7ab0f6..b49db3604a 100644
--- a/cpus.c
+++ b/cpus.c
@@ -2068,8 +2068,10 @@ static void qemu_dummy_start_vcpu(CPUState *cpu)
void qemu_init_vcpu(CPUState *cpu)
{
- cpu->nr_cores = smp_cores;
- cpu->nr_threads = smp_threads;
+ MachineState *ms = MACHINE(qdev_get_machine());
+
+ cpu->nr_cores = ms->smp.cores;
+ cpu->nr_threads = ms->smp.threads;
cpu->stopped = true;
if (!cpu->as) {
diff --git a/exec.c b/exec.c
index 4e734770c2..2744df648c 100644
--- a/exec.c
+++ b/exec.c
@@ -1871,6 +1871,7 @@ static void *file_ram_alloc(RAMBlock *block,
bool truncate,
Error **errp)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
void *area;
block->page_size = qemu_fd_getpagesize(fd);
@@ -1927,7 +1928,7 @@ static void *file_ram_alloc(RAMBlock *block,
}
if (mem_prealloc) {
- os_mem_prealloc(fd, area, memory, smp_cpus, errp);
+ os_mem_prealloc(fd, area, memory, ms->smp.cpus, errp);
if (errp && *errp) {
qemu_ram_munmap(fd, area, memory);
return NULL;
diff --git a/gdbstub.c b/gdbstub.c
index d54abd17cc..dba37df2e9 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -30,6 +30,7 @@
#include "sysemu/sysemu.h"
#include "exec/gdbstub.h"
#include "hw/cpu/cluster.h"
+#include "hw/boards.h"
#endif
#define MAX_PACKET_LENGTH 4096
@@ -1159,6 +1160,9 @@ static int gdb_handle_vcont(GDBState *s, const char *p)
CPU_FOREACH(cpu) {
max_cpus = max_cpus <= cpu->cpu_index ? cpu->cpu_index + 1 : max_cpus;
}
+#else
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int max_cpus = ms->smp.max_cpus;
#endif
/* uninitialised CPUs stay 0 */
newstates = g_new0(char, max_cpus);
diff --git a/hw/cpu/core.c b/hw/cpu/core.c
index 7e42e2c87a..be2c7e10f7 100644
--- a/hw/cpu/core.c
+++ b/hw/cpu/core.c
@@ -11,6 +11,7 @@
#include "qapi/visitor.h"
#include "qapi/error.h"
#include "sysemu/cpus.h"
+#include "hw/boards.h"
static void core_prop_get_core_id(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
@@ -69,13 +70,14 @@ static void core_prop_set_nr_threads(Object *obj, Visitor *v, const char *name,
static void cpu_core_instance_init(Object *obj)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
CPUCore *core = CPU_CORE(obj);
object_property_add(obj, "core-id", "int", core_prop_get_core_id,
core_prop_set_core_id, NULL, NULL, NULL);
object_property_add(obj, "nr-threads", "int", core_prop_get_nr_threads,
core_prop_set_nr_threads, NULL, NULL, NULL);
- core->nr_threads = smp_threads;
+ core->nr_threads = ms->smp.threads;
}
static void cpu_core_class_init(ObjectClass *oc, void *data)
diff --git a/migration/postcopy-ram.c b/migration/postcopy-ram.c
index e2aa57a701..9faacacc9e 100644
--- a/migration/postcopy-ram.c
+++ b/migration/postcopy-ram.c
@@ -29,6 +29,7 @@
#include "sysemu/balloon.h"
#include "qemu/error-report.h"
#include "trace.h"
+#include "hw/boards.h"
/* Arbitrary limit on size of each discard command,
* keeps them around ~200 bytes
@@ -128,6 +129,8 @@ static void migration_exit_cb(Notifier *n, void *data)
static struct PostcopyBlocktimeContext *blocktime_context_new(void)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int smp_cpus = ms->smp.cpus;
PostcopyBlocktimeContext *ctx = g_new0(PostcopyBlocktimeContext, 1);
ctx->page_fault_vcpu_time = g_new0(uint32_t, smp_cpus);
ctx->vcpu_addr = g_new0(uintptr_t, smp_cpus);
@@ -141,10 +144,11 @@ static struct PostcopyBlocktimeContext *blocktime_context_new(void)
static uint32List *get_vcpu_blocktime_list(PostcopyBlocktimeContext *ctx)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
uint32List *list = NULL, *entry = NULL;
int i;
- for (i = smp_cpus - 1; i >= 0; i--) {
+ for (i = ms->smp.cpus - 1; i >= 0; i--) {
entry = g_new0(uint32List, 1);
entry->value = ctx->vcpu_blocktime[i];
entry->next = list;
@@ -807,6 +811,8 @@ static void mark_postcopy_blocktime_end(uintptr_t addr)
{
MigrationIncomingState *mis = migration_incoming_get_current();
PostcopyBlocktimeContext *dc = mis->blocktime_ctx;
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int smp_cpus = ms->smp.cpus;
int i, affected_cpu = 0;
bool vcpu_total_blocktime = false;
uint32_t read_vcpu_time, low_time_offset;
diff --git a/numa.c b/numa.c
index 3875e1efda..844be0171b 100644
--- a/numa.c
+++ b/numa.c
@@ -64,6 +64,7 @@ static void parse_numa_node(MachineState *ms, NumaNodeOptions *node,
uint16_t nodenr;
uint16List *cpus = NULL;
MachineClass *mc = MACHINE_GET_CLASS(ms);
+ unsigned int max_cpus = ms->smp.max_cpus;
if (node->has_nodeid) {
nodenr = node->nodeid;
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
index 05f66c455b..deae88f62c 100644
--- a/target/openrisc/sys_helper.c
+++ b/target/openrisc/sys_helper.c
@@ -24,6 +24,9 @@
#include "exec/helper-proto.h"
#include "exception.h"
#include "sysemu/sysemu.h"
+#ifndef CONFIG_USER_ONLY
+#include "hw/boards.h"
+#endif
#define TO_SPR(group, number) (((group) << 11) + (number))
@@ -194,6 +197,7 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
target_ulong spr)
{
#ifndef CONFIG_USER_ONLY
+ MachineState *ms = MACHINE(qdev_get_machine());
OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
CPUState *cs = CPU(cpu);
int idx;
@@ -241,7 +245,7 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
return cpu->parent_obj.cpu_index;
case TO_SPR(0, 129): /* NUMCORES */
- return max_cpus;
+ return ms->smp.max_cpus;
case TO_SPR(0, 1024) ... TO_SPR(0, 1024 + (16 * 32)): /* Shadow GPRs */
idx = (spr - 1024);
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 24083b8c00..1b1168f5c4 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -45,6 +45,10 @@
#include "exec/cpu-common.h"
#include "exec/exec-all.h"
+#if !defined(CONFIG_USER_ONLY)
+#include "hw/boards.h"
+#endif
+
#include "tcg-op.h"
#if UINTPTR_MAX == UINT32_MAX
@@ -620,6 +624,10 @@ static size_t tcg_n_regions(void)
size_t i;
/* Use a single region if all we have is one vCPU thread */
+#if !defined(CONFIG_USER_ONLY)
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int max_cpus = ms->smp.max_cpus;
+#endif
if (max_cpus == 1 || !qemu_tcg_mttcg_enabled()) {
return 1;
}
@@ -752,6 +760,7 @@ void tcg_register_thread(void)
#else
void tcg_register_thread(void)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
TCGContext *s = g_malloc(sizeof(*s));
unsigned int i, n;
bool err;
@@ -769,7 +778,7 @@ void tcg_register_thread(void)
/* Claim an entry in tcg_ctxs */
n = atomic_fetch_inc(&n_tcg_ctxs);
- g_assert(n < max_cpus);
+ g_assert(n < ms->smp.max_cpus);
atomic_set(&tcg_ctxs[n], s);
tcg_ctx = s;
@@ -979,6 +988,8 @@ void tcg_context_init(TCGContext *s)
tcg_ctxs = &tcg_ctx;
n_tcg_ctxs = 1;
#else
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int max_cpus = ms->smp.max_cpus;
tcg_ctxs = g_new(TCGContext *, max_cpus);
#endif
--
2.21.0
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [Qemu-devel] [PATCH v3 04/10] hw/ppc: Replace global smp variables with machine smp properties
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
` (2 preceding siblings ...)
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 03/10] general: Replace global smp variables with smp machine properties Like Xu
@ 2019-05-18 20:54 ` Like Xu
2019-06-06 2:52 ` Eduardo Habkost
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 05/10] hw/riscv: " Like Xu
` (8 subsequent siblings)
12 siblings, 1 reply; 32+ messages in thread
From: Like Xu @ 2019-05-18 20:54 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, qemu-devel,
Dr . David Alan Gilbert, Alistair Francis, Igor Mammedov
The global smp variables in ppc are replaced with smp machine properties.
A local variable of the same name would be introduced in the declaration
phase if it's used widely in the context OR replace it on the spot if it's
only used once. No semantic changes.
Signed-off-by: Like Xu <like.xu@linux.intel.com>
---
hw/ppc/e500.c | 3 +++
hw/ppc/mac_newworld.c | 3 ++-
hw/ppc/mac_oldworld.c | 3 ++-
hw/ppc/pnv.c | 6 ++++--
hw/ppc/prep.c | 4 ++--
hw/ppc/spapr.c | 34 ++++++++++++++++++++++++++--------
hw/ppc/spapr_rtas.c | 4 +++-
7 files changed, 42 insertions(+), 15 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index beb2efd694..5e42e5a059 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -307,6 +307,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
bool dry_run)
{
MachineState *machine = MACHINE(pms);
+ unsigned int smp_cpus = machine->smp.cpus;
const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms);
CPUPPCState *env = first_cpu->env_ptr;
int ret = -1;
@@ -734,6 +735,7 @@ static DeviceState *ppce500_init_mpic_qemu(PPCE500MachineState *pms,
SysBusDevice *s;
int i, j, k;
MachineState *machine = MACHINE(pms);
+ unsigned int smp_cpus = machine->smp.cpus;
const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms);
dev = qdev_create(NULL, TYPE_OPENPIC);
@@ -846,6 +848,7 @@ void ppce500_init(MachineState *machine)
struct boot_info *boot_info;
int dt_size;
int i;
+ unsigned int smp_cpus = machine->smp.cpus;
/* irq num for pin INTA, INTB, INTC and INTD is 1, 2, 3 and
* 4 respectively */
unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4};
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 02d8559621..257b26ee24 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -135,6 +135,7 @@ static void ppc_core99_init(MachineState *machine)
DeviceState *dev, *pic_dev;
hwaddr nvram_addr = 0xFFF04000;
uint64_t tbfreq;
+ unsigned int smp_cpus = machine->smp.cpus;
linux_boot = (kernel_filename != NULL);
@@ -464,7 +465,7 @@ static void ppc_core99_init(MachineState *machine)
sysbus_mmio_map(s, 1, CFG_ADDR + 2);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
- fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 460cbc7923..1968f05a6c 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -99,6 +99,7 @@ static void ppc_heathrow_init(MachineState *machine)
DeviceState *dev, *pic_dev;
BusState *adb_bus;
int bios_size;
+ unsigned int smp_cpus = machine->smp.cpus;
uint16_t ppc_boot_device;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
void *fw_cfg;
@@ -322,7 +323,7 @@ static void ppc_heathrow_init(MachineState *machine)
sysbus_mmio_map(s, 1, CFG_ADDR + 2);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
- fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 1e8c505936..3bb15338de 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -678,7 +678,8 @@ static void pnv_init(MachineState *machine)
object_property_add_child(OBJECT(pnv), chip_name, chip, &error_fatal);
object_property_set_int(chip, PNV_CHIP_HWID(i), "chip-id",
&error_fatal);
- object_property_set_int(chip, smp_cores, "nr-cores", &error_fatal);
+ object_property_set_int(chip, machine->smp.cores,
+ "nr-cores", &error_fatal);
object_property_set_bool(chip, true, "realized", &error_fatal);
}
g_free(chip_typename);
@@ -1134,6 +1135,7 @@ static void pnv_chip_instance_init(Object *obj)
static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
Error *error = NULL;
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
const char *typename = pnv_chip_core_typename(chip);
@@ -1168,7 +1170,7 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
snprintf(core_name, sizeof(core_name), "core[%d]", core_hwid);
object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core),
&error_fatal);
- object_property_set_int(OBJECT(pnv_core), smp_threads, "nr-threads",
+ object_property_set_int(OBJECT(pnv_core), ms->smp.threads, "nr-threads",
&error_fatal);
object_property_set_int(OBJECT(pnv_core), core_hwid,
CPU_CORE_PROP_CORE_ID, &error_fatal);
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index b7f459d475..968fd3ade2 100644
--- a/hw/ppc/prep.c
+++ b/hw/ppc/prep.c
@@ -428,7 +428,7 @@ static void ppc_prep_init(MachineState *machine)
linux_boot = (kernel_filename != NULL);
/* init CPUs */
- for (i = 0; i < smp_cpus; i++) {
+ for (i = 0; i < machine->smp.cpus; i++) {
cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
@@ -765,7 +765,7 @@ static void ibm_40p_init(MachineState *machine)
boot_device = machine->boot_order[0];
}
- fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_PREP);
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 7fb34decb9..25da337f84 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -105,6 +105,9 @@
*/
static int spapr_vcpu_id(SpaprMachineState *spapr, int cpu_index)
{
+ MachineState *ms = MACHINE(spapr);
+ unsigned int smp_threads = ms->smp.threads;
+
assert(spapr->vsmt);
return
(cpu_index / smp_threads) * spapr->vsmt + cpu_index % smp_threads;
@@ -152,8 +155,10 @@ static void pre_2_10_vmstate_unregister_dummy_icp(int i)
int spapr_max_server_number(SpaprMachineState *spapr)
{
+ MachineState *ms = MACHINE(spapr);
+
assert(spapr->vsmt);
- return DIV_ROUND_UP(max_cpus * spapr->vsmt, smp_threads);
+ return DIV_ROUND_UP(ms->smp.max_cpus * spapr->vsmt, ms->smp.threads);
}
static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
@@ -286,6 +291,7 @@ static void spapr_populate_pa_features(SpaprMachineState *spapr,
static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState *spapr)
{
+ MachineState *ms = MACHINE(spapr);
int ret = 0, offset, cpus_offset;
CPUState *cs;
char cpu_model[32];
@@ -295,7 +301,7 @@ static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState *spapr)
PowerPCCPU *cpu = POWERPC_CPU(cs);
DeviceClass *dc = DEVICE_GET_CLASS(cs);
int index = spapr_get_vcpu_id(cpu);
- int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
+ int compat_smt = MIN(ms->smp.threads, ppc_compat_max_vthreads(cpu));
if (!spapr_is_thread0_in_vcore(spapr, cpu)) {
continue;
@@ -441,6 +447,7 @@ static int spapr_populate_memory(SpaprMachineState *spapr, void *fdt)
static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
SpaprMachineState *spapr)
{
+ MachineState *ms = MACHINE(spapr);
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
@@ -452,7 +459,8 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
uint32_t page_sizes_prop[64];
size_t page_sizes_prop_size;
- uint32_t vcpus_per_socket = smp_threads * smp_cores;
+ unsigned int smp_threads = ms->smp.threads;
+ uint32_t vcpus_per_socket = smp_threads * ms->smp.cores;
uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
SpaprDrc *drc;
@@ -1022,6 +1030,7 @@ int spapr_h_cas_compose_response(SpaprMachineState *spapr,
static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt)
{
+ MachineState *ms = MACHINE(spapr);
int rtas;
GString *hypertas = g_string_sized_new(256);
GString *qemu_hypertas = g_string_sized_new(256);
@@ -1032,7 +1041,7 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt)
cpu_to_be32(max_device_addr >> 32),
cpu_to_be32(max_device_addr & 0xffffffff),
0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE),
- cpu_to_be32(max_cpus / smp_threads),
+ cpu_to_be32(ms->smp.max_cpus / ms->smp.threads),
};
uint32_t maxdomain = cpu_to_be32(spapr->gpu_numa_id > 1 ? 1 : 0);
uint32_t maxdomains[] = {
@@ -2540,7 +2549,7 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp)
/* find cpu slot in machine->possible_cpus by core_id */
static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
{
- int index = id / smp_threads;
+ int index = id / ms->smp.threads;
if (index >= ms->possible_cpus->len) {
return NULL;
@@ -2553,10 +2562,12 @@ static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
static void spapr_set_vsmt_mode(SpaprMachineState *spapr, Error **errp)
{
+ MachineState *ms = MACHINE(spapr);
Error *local_err = NULL;
bool vsmt_user = !!spapr->vsmt;
int kvm_smt = kvmppc_smt_threads();
int ret;
+ unsigned int smp_threads = ms->smp.threads;
if (!kvm_enabled() && (smp_threads > 1)) {
error_setg(&local_err, "TCG cannot support more than 1 thread/core "
@@ -2630,6 +2641,9 @@ static void spapr_init_cpus(SpaprMachineState *spapr)
SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
const char *type = spapr_get_cpu_core_type(machine->cpu_type);
const CPUArchIdList *possible_cpus;
+ unsigned int smp_cpus = machine->smp.cpus;
+ unsigned int smp_threads = machine->smp.threads;
+ unsigned int max_cpus = machine->smp.max_cpus;
int boot_cores_nr = smp_cpus / smp_threads;
int i;
@@ -3856,6 +3870,7 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
const char *type = object_get_typename(OBJECT(dev));
CPUArchId *core_slot;
int index;
+ unsigned int smp_threads = machine->smp.threads;
if (dev->hotplugged && !mc->has_hotpluggable_cpus) {
error_setg(&local_err, "CPU hotplug not supported for this machine");
@@ -4110,14 +4125,16 @@ spapr_cpu_index_to_props(MachineState *machine, unsigned cpu_index)
static int64_t spapr_get_default_cpu_node_id(const MachineState *ms, int idx)
{
- return idx / smp_cores % nb_numa_nodes;
+ return idx / ms->smp.cores % nb_numa_nodes;
}
static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine)
{
int i;
+ unsigned int smp_threads = machine->smp.threads;
+ unsigned int smp_cpus = machine->smp.cpus;
const char *core_type;
- int spapr_max_cores = max_cpus / smp_threads;
+ int spapr_max_cores = machine->smp.max_cpus / smp_threads;
MachineClass *mc = MACHINE_GET_CLASS(machine);
if (!mc->has_hotpluggable_cpus) {
@@ -4240,6 +4257,7 @@ int spapr_get_vcpu_id(PowerPCCPU *cpu)
void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp)
{
SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
+ MachineState *ms = MACHINE(spapr);
int vcpu_id;
vcpu_id = spapr_vcpu_id(spapr, cpu_index);
@@ -4248,7 +4266,7 @@ void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp)
error_setg(errp, "Can't create CPU with id %d in KVM", vcpu_id);
error_append_hint(errp, "Adjust the number of cpus to %d "
"or try to raise the number of threads per core\n",
- vcpu_id * smp_threads / spapr->vsmt);
+ vcpu_id * ms->smp.threads / spapr->vsmt);
return;
}
diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
index ee24212765..c9ffe9786c 100644
--- a/hw/ppc/spapr_rtas.c
+++ b/hw/ppc/spapr_rtas.c
@@ -231,6 +231,8 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
target_ulong args,
uint32_t nret, target_ulong rets)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int max_cpus = ms->smp.max_cpus;
target_ulong parameter = rtas_ld(args, 0);
target_ulong buffer = rtas_ld(args, 1);
target_ulong length = rtas_ld(args, 2);
@@ -244,7 +246,7 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
"MaxPlatProcs=%d",
max_cpus,
current_machine->ram_size / MiB,
- smp_cpus,
+ ms->smp.cpus,
max_cpus);
ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
g_free(param_val);
--
2.21.0
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [Qemu-devel] [PATCH v3 05/10] hw/riscv: Replace global smp variables with machine smp properties
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
` (3 preceding siblings ...)
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 04/10] hw/ppc: Replace global smp variables with machine smp properties Like Xu
@ 2019-05-18 20:54 ` Like Xu
2019-05-20 21:45 ` Alistair Francis
2019-06-20 14:52 ` Eduardo Habkost
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 06/10] hw/s390x: " Like Xu
` (7 subsequent siblings)
12 siblings, 2 replies; 32+ messages in thread
From: Like Xu @ 2019-05-18 20:54 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, qemu-devel,
Dr . David Alan Gilbert, Alistair Francis, Igor Mammedov
The global smp variables in riscv are replaced with smp machine properties.
A local variable of the same name would be introduced in the declaration
phase if it's used widely in the context OR replace it on the spot if it's
only used once. No semantic changes.
Signed-off-by: Like Xu <like.xu@linux.intel.com>
---
hw/riscv/sifive_e.c | 6 ++++--
hw/riscv/sifive_plic.c | 3 +++
hw/riscv/sifive_u.c | 6 ++++--
hw/riscv/spike.c | 2 ++
hw/riscv/virt.c | 1 +
5 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index b1cd11363c..ae86a63c04 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -137,6 +137,7 @@ static void riscv_sifive_e_init(MachineState *machine)
static void riscv_sifive_e_soc_init(Object *obj)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
SiFiveESoCState *s = RISCV_E_SOC(obj);
object_initialize_child(obj, "cpus", &s->cpus,
@@ -144,12 +145,13 @@ static void riscv_sifive_e_soc_init(Object *obj)
&error_abort, NULL);
object_property_set_str(OBJECT(&s->cpus), SIFIVE_E_CPU, "cpu-type",
&error_abort);
- object_property_set_int(OBJECT(&s->cpus), smp_cpus, "num-harts",
+ object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts",
&error_abort);
}
static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
const struct MemmapEntry *memmap = sifive_e_memmap;
SiFiveESoCState *s = RISCV_E_SOC(dev);
@@ -179,7 +181,7 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
SIFIVE_E_PLIC_CONTEXT_STRIDE,
memmap[SIFIVE_E_PLIC].size);
sifive_clint_create(memmap[SIFIVE_E_CLINT].base,
- memmap[SIFIVE_E_CLINT].size, smp_cpus,
+ memmap[SIFIVE_E_CLINT].size, ms->smp.cpus,
SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE);
sifive_mmio_emulate(sys_mem, "riscv.sifive.e.aon",
memmap[SIFIVE_E_AON].base, memmap[SIFIVE_E_AON].size);
diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c
index 07a032d93d..d4010a1f39 100644
--- a/hw/riscv/sifive_plic.c
+++ b/hw/riscv/sifive_plic.c
@@ -23,6 +23,7 @@
#include "qemu/error-report.h"
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
+#include "hw/boards.h"
#include "target/riscv/cpu.h"
#include "sysemu/sysemu.h"
#include "hw/riscv/sifive_plic.h"
@@ -438,6 +439,8 @@ static void sifive_plic_irq_request(void *opaque, int irq, int level)
static void sifive_plic_realize(DeviceState *dev, Error **errp)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int smp_cpus = ms->smp.cpus;
SiFivePLICState *plic = SIFIVE_PLIC(dev);
int i;
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 5ecc47cea3..43bf256946 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -321,13 +321,14 @@ static void riscv_sifive_u_init(MachineState *machine)
static void riscv_sifive_u_soc_init(Object *obj)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
SiFiveUSoCState *s = RISCV_U_SOC(obj);
object_initialize_child(obj, "cpus", &s->cpus, sizeof(s->cpus),
TYPE_RISCV_HART_ARRAY, &error_abort, NULL);
object_property_set_str(OBJECT(&s->cpus), SIFIVE_U_CPU, "cpu-type",
&error_abort);
- object_property_set_int(OBJECT(&s->cpus), smp_cpus, "num-harts",
+ object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts",
&error_abort);
sysbus_init_child_obj(obj, "gem", &s->gem, sizeof(s->gem),
@@ -336,6 +337,7 @@ static void riscv_sifive_u_soc_init(Object *obj)
static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
SiFiveUSoCState *s = RISCV_U_SOC(dev);
const struct MemmapEntry *memmap = sifive_u_memmap;
MemoryRegion *system_memory = get_system_memory();
@@ -371,7 +373,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
sifive_uart_create(system_memory, memmap[SIFIVE_U_UART1].base,
serial_hd(1), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART1_IRQ));
sifive_clint_create(memmap[SIFIVE_U_CLINT].base,
- memmap[SIFIVE_U_CLINT].size, smp_cpus,
+ memmap[SIFIVE_U_CLINT].size, ms->smp.cpus,
SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE);
for (i = 0; i < SIFIVE_U_PLIC_NUM_SOURCES; i++) {
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 2a000a5800..6a747ff22e 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -171,6 +171,7 @@ static void spike_v1_10_0_board_init(MachineState *machine)
MemoryRegion *main_mem = g_new(MemoryRegion, 1);
MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
int i;
+ unsigned int smp_cpus = machine->smp.cpus;
/* Initialize SOC */
object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
@@ -253,6 +254,7 @@ static void spike_v1_09_1_board_init(MachineState *machine)
MemoryRegion *main_mem = g_new(MemoryRegion, 1);
MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
int i;
+ unsigned int smp_cpus = machine->smp.cpus;
/* Initialize SOC */
object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index fc4c6b306e..b3f1962384 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -395,6 +395,7 @@ static void riscv_virt_board_init(MachineState *machine)
char *plic_hart_config;
size_t plic_hart_config_len;
int i;
+ unsigned int smp_cpus = machine->smp.cpus;
void *fdt;
/* Initialize SOC */
--
2.21.0
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [Qemu-devel] [PATCH v3 06/10] hw/s390x: Replace global smp variables with machine smp properties
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
` (4 preceding siblings ...)
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 05/10] hw/riscv: " Like Xu
@ 2019-05-18 20:54 ` Like Xu
2019-06-06 2:56 ` Eduardo Habkost
2019-06-28 18:33 ` [Qemu-devel] [PATCH] fixup! " Eduardo Habkost
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 07/10] hw/i386: " Like Xu
` (6 subsequent siblings)
12 siblings, 2 replies; 32+ messages in thread
From: Like Xu @ 2019-05-18 20:54 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, qemu-devel,
Dr . David Alan Gilbert, Alistair Francis, Igor Mammedov
The global smp variables in s390x are replaced with smp machine properties.
A local variable of the same name would be introduced in the declaration
phase if it's used widely in the context OR replace it on the spot if it's
only used once. No semantic changes.
Signed-off-by: Like Xu <like.xu@linux.intel.com>
---
hw/s390x/s390-virtio-ccw.c | 3 ++-
hw/s390x/sclp.c | 2 +-
target/s390x/cpu.c | 3 +++
target/s390x/excp_helper.c | 5 +++++
4 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index ed1fe7a93e..692ad6e372 100644
--- a/hw/s390x/s390-virtio-ccw.c
+++ b/hw/s390x/s390-virtio-ccw.c
@@ -83,7 +83,7 @@ static void s390_init_cpus(MachineState *machine)
/* initialize possible_cpus */
mc->possible_cpu_arch_ids(machine);
- for (i = 0; i < smp_cpus; i++) {
+ for (i = 0; i < machine->smp.cpus; i++) {
s390x_new_cpu(machine->cpu_type, i, &error_fatal);
}
}
@@ -410,6 +410,7 @@ static CpuInstanceProperties s390_cpu_index_to_props(MachineState *ms,
static const CPUArchIdList *s390_possible_cpu_arch_ids(MachineState *ms)
{
int i;
+ unsigned int max_cpus = ms->smp.max_cpus;
if (ms->possible_cpus) {
g_assert(ms->possible_cpus && ms->possible_cpus->len == max_cpus);
diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c
index 4510a800cb..fac7c3bb6c 100644
--- a/hw/s390x/sclp.c
+++ b/hw/s390x/sclp.c
@@ -64,7 +64,7 @@ static void read_SCP_info(SCLPDevice *sclp, SCCB *sccb)
prepare_cpu_entries(sclp, read_info->entries, &cpu_count);
read_info->entries_cpu = cpu_to_be16(cpu_count);
read_info->offset_cpu = cpu_to_be16(offsetof(ReadInfo, entries));
- read_info->highest_cpu = cpu_to_be16(max_cpus - 1);
+ read_info->highest_cpu = cpu_to_be16(machine->smp.max_cpus - 1);
read_info->ibc_val = cpu_to_be32(s390_get_ibc_val());
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index b1df63d82c..f1e5c0d9c3 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -37,6 +37,7 @@
#include "hw/qdev-properties.h"
#ifndef CONFIG_USER_ONLY
#include "hw/hw.h"
+#include "hw/boards.h"
#include "sysemu/arch_init.h"
#include "sysemu/sysemu.h"
#endif
@@ -193,6 +194,8 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
}
#if !defined(CONFIG_USER_ONLY)
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int max_cpus = ms->smp.max_cpus;
if (cpu->env.core_id >= max_cpus) {
error_setg(&err, "Unable to add CPU with core-id: %" PRIu32
", maximum core-id: %d", cpu->env.core_id,
diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c
index 3a467b72c5..1c6938effc 100644
--- a/target/s390x/excp_helper.c
+++ b/target/s390x/excp_helper.c
@@ -31,6 +31,7 @@
#ifndef CONFIG_USER_ONLY
#include "sysemu/sysemu.h"
#include "hw/s390x/s390_flic.h"
+#include "hw/boards.h"
#endif
void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code,
@@ -300,6 +301,10 @@ static void do_ext_interrupt(CPUS390XState *env)
g_assert(cpu_addr < S390_MAX_CPUS);
lowcore->cpu_addr = cpu_to_be16(cpu_addr);
clear_bit(cpu_addr, env->emergency_signals);
+#ifndef CONFIG_USER_ONLY
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int max_cpus = ms->smp.max_cpus;
+#endif
if (bitmap_empty(env->emergency_signals, max_cpus)) {
env->pending_int &= ~INTERRUPT_EMERGENCY_SIGNAL;
}
--
2.21.0
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [Qemu-devel] [PATCH v3 07/10] hw/i386: Replace global smp variables with machine smp properties
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
` (5 preceding siblings ...)
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 06/10] hw/s390x: " Like Xu
@ 2019-05-18 20:54 ` Like Xu
2019-06-06 2:57 ` Eduardo Habkost
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 08/10] hw/arm: " Like Xu
` (5 subsequent siblings)
12 siblings, 1 reply; 32+ messages in thread
From: Like Xu @ 2019-05-18 20:54 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, qemu-devel,
Dr . David Alan Gilbert, Alistair Francis, Igor Mammedov
The global smp variables in i386 are replaced with smp machine properties.
To avoid calling qdev_get_machine() as much as possible, some related funtions
for acpi data generations are refactored. No semantic changes.
A local variable of the same name would be introduced in the declaration
phase if it's used widely in the context OR replace it on the spot if it's
only used once. No semantic changes.
Signed-off-by: Like Xu <like.xu@linux.intel.com>
---
hw/i386/acpi-build.c | 11 +++++++----
hw/i386/kvmvapic.c | 7 +++++--
hw/i386/pc.c | 24 +++++++++++++++---------
hw/i386/xen/xen-hvm.c | 4 ++++
target/i386/cpu.c | 4 +++-
5 files changed, 34 insertions(+), 16 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index c8e47e5713..eb41af04ce 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -45,6 +45,7 @@
#include "sysemu/tpm.h"
#include "hw/acpi/tpm.h"
#include "hw/acpi/vmgenid.h"
+#include "hw/boards.h"
#include "sysemu/tpm_backend.h"
#include "hw/timer/mc146818rtc_regs.h"
#include "hw/mem/memory-device.h"
@@ -126,7 +127,8 @@ typedef struct FwCfgTPMConfig {
uint8_t tpmppi_version;
} QEMU_PACKED FwCfgTPMConfig;
-static void init_common_fadt_data(Object *o, AcpiFadtData *data)
+static void init_common_fadt_data(MachineState *ms, Object *o,
+ AcpiFadtData *data)
{
uint32_t io = object_property_get_uint(o, ACPI_PM_PROP_PM_IO_BASE, NULL);
AmlAddressSpace as = AML_AS_SYSTEM_IO;
@@ -142,7 +144,8 @@ static void init_common_fadt_data(Object *o, AcpiFadtData *data)
* CPUs for more than 8 CPUs, "Clustered Logical" mode has to be
* used
*/
- ((max_cpus > 8) ? (1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL) : 0),
+ ((ms->smp.max_cpus > 8) ?
+ (1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL) : 0),
.int_model = 1 /* Multiple APIC */,
.rtc_century = RTC_CENTURY,
.plvl2_lat = 0xfff /* C2 state not supported */,
@@ -176,7 +179,7 @@ static Object *object_resolve_type_unambiguous(const char *typename)
return o;
}
-static void acpi_get_pm_info(AcpiPmInfo *pm)
+static void acpi_get_pm_info(MachineState *machine, AcpiPmInfo *pm)
{
Object *piix = object_resolve_type_unambiguous(TYPE_PIIX4_PM);
Object *lpc = object_resolve_type_unambiguous(TYPE_ICH9_LPC_DEVICE);
@@ -2629,7 +2632,7 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine)
AcpiSlicOem slic_oem = { .id = NULL, .table_id = NULL };
Object *vmgenid_dev;
- acpi_get_pm_info(&pm);
+ acpi_get_pm_info(machine, &pm);
acpi_get_misc_info(&misc);
acpi_get_pci_holes(&pci_hole, &pci_hole64);
acpi_get_slic_oem(&slic_oem);
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index 70f6f26a94..3fce704613 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -17,6 +17,7 @@
#include "sysemu/kvm.h"
#include "hw/i386/apic_internal.h"
#include "hw/sysbus.h"
+#include "hw/boards.h"
#include "tcg/tcg.h"
#define VAPIC_IO_PORT 0x7e
@@ -441,11 +442,12 @@ static void do_patch_instruction(CPUState *cs, run_on_cpu_data data)
static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
CPUState *cs = CPU(cpu);
VAPICHandlers *handlers;
PatchInfo *info;
- if (smp_cpus == 1) {
+ if (ms->smp.cpus == 1) {
handlers = &s->rom_state.up;
} else {
handlers = &s->rom_state.mp;
@@ -746,6 +748,7 @@ static void do_vapic_enable(CPUState *cs, run_on_cpu_data data)
static void kvmvapic_vm_state_change(void *opaque, int running,
RunState state)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
VAPICROMState *s = opaque;
uint8_t *zero;
@@ -754,7 +757,7 @@ static void kvmvapic_vm_state_change(void *opaque, int running,
}
if (s->state == VAPIC_ACTIVE) {
- if (smp_cpus == 1) {
+ if (ms->smp.cpus == 1) {
run_on_cpu(first_cpu, do_vapic_enable, RUN_ON_CPU_HOST_PTR(s));
} else {
zero = g_malloc0(s->rom_state.vapic_size);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 9bcd867ea3..896c22e32e 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -932,12 +932,14 @@ void enable_compat_apic_id_mode(void)
* no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
* all CPUs up to max_cpus.
*/
-static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
+static uint32_t x86_cpu_apic_id_from_index(MachineState *ms,
+ unsigned int cpu_index)
{
uint32_t correct_id;
static bool warned;
- correct_id = x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_index);
+ correct_id = x86_apicid_from_cpu_idx(ms->smp.cores,
+ ms->smp.threads, cpu_index);
if (compat_apic_id_mode) {
if (cpu_index != correct_id && !warned && !qtest_enabled()) {
error_report("APIC IDs set in compatibility mode, "
@@ -1536,7 +1538,7 @@ static void pc_new_cpu(const char *typename, int64_t apic_id, Error **errp)
void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp)
{
- int64_t apic_id = x86_cpu_apic_id_from_index(id);
+ int64_t apic_id = x86_cpu_apic_id_from_index(ms, id);
Error *local_err = NULL;
if (id < 0) {
@@ -1572,9 +1574,10 @@ void pc_cpus_init(PCMachineState *pcms)
*
* This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().
*/
- pcms->apic_id_limit = x86_cpu_apic_id_from_index(max_cpus - 1) + 1;
+ pcms->apic_id_limit = x86_cpu_apic_id_from_index(ms,
+ ms->smp.max_cpus - 1) + 1;
possible_cpus = mc->possible_cpu_arch_ids(ms);
- for (i = 0; i < smp_cpus; i++) {
+ for (i = 0; i < ms->smp.cpus; i++) {
pc_new_cpu(possible_cpus->cpus[i].type, possible_cpus->cpus[i].arch_id,
&error_fatal);
}
@@ -2298,6 +2301,8 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
X86CPU *cpu = X86_CPU(dev);
MachineState *ms = MACHINE(hotplug_dev);
PCMachineState *pcms = PC_MACHINE(hotplug_dev);
+ unsigned int smp_cores = ms->smp.cores;
+ unsigned int smp_threads = ms->smp.threads;
if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) {
error_setg(errp, "Invalid CPU type, expected cpu type: '%s'",
@@ -2307,7 +2312,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
/* if APIC ID is not set, set it based on socket/core/thread properties */
if (cpu->apic_id == UNASSIGNED_APIC_ID) {
- int max_socket = (max_cpus - 1) / smp_threads / smp_cores;
+ int max_socket = (ms->smp.max_cpus - 1) / smp_threads / smp_cores;
if (cpu->socket_id < 0) {
error_setg(errp, "CPU socket-id is not set");
@@ -2656,13 +2661,14 @@ static int64_t pc_get_default_cpu_node_id(const MachineState *ms, int idx)
assert(idx < ms->possible_cpus->len);
x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
- smp_cores, smp_threads, &topo);
+ ms->smp.cores, ms->smp.threads, &topo);
return topo.pkg_id % nb_numa_nodes;
}
static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms)
{
int i;
+ unsigned int max_cpus = ms->smp.max_cpus;
if (ms->possible_cpus) {
/*
@@ -2681,9 +2687,9 @@ static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms)
ms->possible_cpus->cpus[i].type = ms->cpu_type;
ms->possible_cpus->cpus[i].vcpus_count = 1;
- ms->possible_cpus->cpus[i].arch_id = x86_cpu_apic_id_from_index(i);
+ ms->possible_cpus->cpus[i].arch_id = x86_cpu_apic_id_from_index(ms, i);
x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
- smp_cores, smp_threads, &topo);
+ ms->smp.cores, ms->smp.threads, &topo);
ms->possible_cpus->cpus[i].props.has_socket_id = true;
ms->possible_cpus->cpus[i].props.socket_id = topo.pkg_id;
ms->possible_cpus->cpus[i].props.has_core_id = true;
diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index 2939122e7c..941bd25e66 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -750,6 +750,8 @@ static ioreq_t *cpu_get_ioreq_from_shared_memory(XenIOState *state, int vcpu)
/* retval--the number of ioreq packet */
static ioreq_t *cpu_get_ioreq(XenIOState *state)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int max_cpus = ms->smp.max_cpus;
int i;
evtchn_port_t port;
@@ -1377,6 +1379,8 @@ static int xen_map_ioreq_server(XenIOState *state)
void xen_hvm_init(PCMachineState *pcms, MemoryRegion **ram_memory)
{
+ MachineState *ms = MACHINE(pcms);
+ unsigned int max_cpus = ms->smp.max_cpus;
int i, rc;
xen_pfn_t ioreq_pfn;
XenIOState *state;
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 2df56fa977..9a93dd8be7 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -54,6 +54,7 @@
#include "hw/hw.h"
#include "hw/xen/xen.h"
#include "hw/i386/apic_internal.h"
+#include "hw/boards.h"
#endif
#include "disas/capstone.h"
@@ -5340,9 +5341,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
}
#ifndef CONFIG_USER_ONLY
+ MachineState *ms = MACHINE(qdev_get_machine());
qemu_register_reset(x86_cpu_machine_reset_cb, cpu);
- if (cpu->env.features[FEAT_1_EDX] & CPUID_APIC || smp_cpus > 1) {
+ if (cpu->env.features[FEAT_1_EDX] & CPUID_APIC || ms->smp.cpus > 1) {
x86_cpu_apic_create(cpu, &local_err);
if (local_err != NULL) {
goto out;
--
2.21.0
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [Qemu-devel] [PATCH v3 08/10] hw/arm: Replace global smp variables with machine smp properties
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
` (6 preceding siblings ...)
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 07/10] hw/i386: " Like Xu
@ 2019-05-18 20:54 ` Like Xu
2019-06-06 2:58 ` Eduardo Habkost
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 09/10] hw: Replace global smp variables with MachineState for all remaining archs Like Xu
` (4 subsequent siblings)
12 siblings, 1 reply; 32+ messages in thread
From: Like Xu @ 2019-05-18 20:54 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, qemu-devel,
Dr . David Alan Gilbert, Alistair Francis, Igor Mammedov
The global smp variables in arm are replaced with smp machine properties.
The init_cpus() and *_create_rpu() are refactored to pass MachineState.
A local variable of the same name would be introduced in the declaration
phase if it's used widely in the context OR replace it on the spot if it's
only used once. No semantic changes.
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/arm/fsl-imx6.c | 6 +++++-
hw/arm/fsl-imx6ul.c | 6 +++++-
hw/arm/fsl-imx7.c | 7 +++++--
hw/arm/highbank.c | 1 +
hw/arm/mcimx6ul-evk.c | 2 +-
hw/arm/mcimx7d-sabre.c | 2 +-
hw/arm/raspi.c | 4 ++--
hw/arm/realview.c | 1 +
hw/arm/sabrelite.c | 2 +-
hw/arm/vexpress.c | 16 ++++++++++------
hw/arm/virt.c | 8 +++++++-
hw/arm/xlnx-zynqmp.c | 16 ++++++++++------
target/arm/cpu.c | 8 +++++++-
13 files changed, 56 insertions(+), 23 deletions(-)
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 7b7b97f74c..ed772d5bd9 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -23,6 +23,7 @@
#include "qapi/error.h"
#include "qemu-common.h"
#include "hw/arm/fsl-imx6.h"
+#include "hw/boards.h"
#include "sysemu/sysemu.h"
#include "chardev/char.h"
#include "qemu/error-report.h"
@@ -33,11 +34,12 @@
static void fsl_imx6_init(Object *obj)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6State *s = FSL_IMX6(obj);
char name[NAME_SIZE];
int i;
- for (i = 0; i < MIN(smp_cpus, FSL_IMX6_NUM_CPUS); i++) {
+ for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) {
snprintf(name, NAME_SIZE, "cpu%d", i);
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
"cortex-a9-" TYPE_ARM_CPU, &error_abort, NULL);
@@ -93,9 +95,11 @@ static void fsl_imx6_init(Object *obj)
static void fsl_imx6_realize(DeviceState *dev, Error **errp)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6State *s = FSL_IMX6(dev);
uint16_t i;
Error *err = NULL;
+ unsigned int smp_cpus = ms->smp.cpus;
if (smp_cpus > FSL_IMX6_NUM_CPUS) {
error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index 4b56bfa8d1..74b8ecbbb6 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -21,6 +21,7 @@
#include "qemu-common.h"
#include "hw/arm/fsl-imx6ul.h"
#include "hw/misc/unimp.h"
+#include "hw/boards.h"
#include "sysemu/sysemu.h"
#include "qemu/error-report.h"
@@ -28,11 +29,12 @@
static void fsl_imx6ul_init(Object *obj)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6ULState *s = FSL_IMX6UL(obj);
char name[NAME_SIZE];
int i;
- for (i = 0; i < MIN(smp_cpus, FSL_IMX6UL_NUM_CPUS); i++) {
+ for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6UL_NUM_CPUS); i++) {
snprintf(name, NAME_SIZE, "cpu%d", i);
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
"cortex-a7-" TYPE_ARM_CPU, &error_abort, NULL);
@@ -156,10 +158,12 @@ static void fsl_imx6ul_init(Object *obj)
static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6ULState *s = FSL_IMX6UL(dev);
int i;
qemu_irq irq;
char name[NAME_SIZE];
+ unsigned int smp_cpus = ms->smp.cpus;
if (smp_cpus > FSL_IMX6UL_NUM_CPUS) {
error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index 7663ad6861..71cc414de6 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -23,6 +23,7 @@
#include "qemu-common.h"
#include "hw/arm/fsl-imx7.h"
#include "hw/misc/unimp.h"
+#include "hw/boards.h"
#include "sysemu/sysemu.h"
#include "qemu/error-report.h"
@@ -30,12 +31,12 @@
static void fsl_imx7_init(Object *obj)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
FslIMX7State *s = FSL_IMX7(obj);
char name[NAME_SIZE];
int i;
-
- for (i = 0; i < MIN(smp_cpus, FSL_IMX7_NUM_CPUS); i++) {
+ for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX7_NUM_CPUS); i++) {
snprintf(name, NAME_SIZE, "cpu%d", i);
object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
ARM_CPU_TYPE_NAME("cortex-a7"), &error_abort,
@@ -155,11 +156,13 @@ static void fsl_imx7_init(Object *obj)
static void fsl_imx7_realize(DeviceState *dev, Error **errp)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
FslIMX7State *s = FSL_IMX7(dev);
Object *o;
int i;
qemu_irq irq;
char name[NAME_SIZE];
+ unsigned int smp_cpus = ms->smp.cpus;
if (smp_cpus > FSL_IMX7_NUM_CPUS) {
error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
index 96ccf18d86..f3b1712fc9 100644
--- a/hw/arm/highbank.c
+++ b/hw/arm/highbank.c
@@ -240,6 +240,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
SysBusDevice *busdev;
qemu_irq pic[128];
int n;
+ unsigned int smp_cpus = machine->smp.cpus;
qemu_irq cpu_irq[4];
qemu_irq cpu_fiq[4];
qemu_irq cpu_virq[4];
diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
index fb2b015bf6..47c44dd83a 100644
--- a/hw/arm/mcimx6ul-evk.c
+++ b/hw/arm/mcimx6ul-evk.c
@@ -43,7 +43,7 @@ static void mcimx6ul_evk_init(MachineState *machine)
.kernel_filename = machine->kernel_filename,
.kernel_cmdline = machine->kernel_cmdline,
.initrd_filename = machine->initrd_filename,
- .nb_cpus = smp_cpus,
+ .nb_cpus = machine->smp.cpus,
};
object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
index 9c5f0e70c3..a8df0cce6e 100644
--- a/hw/arm/mcimx7d-sabre.c
+++ b/hw/arm/mcimx7d-sabre.c
@@ -46,7 +46,7 @@ static void mcimx7d_sabre_init(MachineState *machine)
.kernel_filename = machine->kernel_filename,
.kernel_cmdline = machine->kernel_cmdline,
.initrd_filename = machine->initrd_filename,
- .nb_cpus = smp_cpus,
+ .nb_cpus = machine->smp.cpus,
};
object_initialize(&s->soc, sizeof(s->soc), TYPE_FSL_IMX7);
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index fe2bb511b9..d3e4c201c0 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -117,7 +117,7 @@ static void setup_boot(MachineState *machine, int version, size_t ram_size)
binfo.board_id = raspi_boardid[version];
binfo.ram_size = ram_size;
- binfo.nb_cpus = smp_cpus;
+ binfo.nb_cpus = machine->smp.cpus;
if (version <= 2) {
/* The rpi1 and 2 require some custom setup code to run in Secure
@@ -196,7 +196,7 @@ static void raspi_init(MachineState *machine, int version)
/* Setup the SOC */
object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(&s->ram),
&error_abort);
- object_property_set_int(OBJECT(&s->soc), smp_cpus, "enabled-cpus",
+ object_property_set_int(OBJECT(&s->soc), machine->smp.cpus, "enabled-cpus",
&error_abort);
int board_rev = version == 3 ? 0xa02082 : 0xa21041;
object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev",
diff --git a/hw/arm/realview.c b/hw/arm/realview.c
index 05a244df25..f470f21b0d 100644
--- a/hw/arm/realview.c
+++ b/hw/arm/realview.c
@@ -70,6 +70,7 @@ static void realview_init(MachineState *machine,
NICInfo *nd;
I2CBus *i2c;
int n;
+ unsigned int smp_cpus = machine->smp.cpus;
int done_nic = 0;
qemu_irq cpu_irq[4];
int is_mpcore = 0;
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index ee140e5d9e..f9e7dc5a00 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -107,7 +107,7 @@ static void sabrelite_init(MachineState *machine)
sabrelite_binfo.kernel_filename = machine->kernel_filename;
sabrelite_binfo.kernel_cmdline = machine->kernel_cmdline;
sabrelite_binfo.initrd_filename = machine->initrd_filename;
- sabrelite_binfo.nb_cpus = smp_cpus;
+ sabrelite_binfo.nb_cpus = machine->smp.cpus;
sabrelite_binfo.secure_boot = true;
sabrelite_binfo.write_secondary_boot = sabrelite_write_secondary;
sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary;
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index d8634f3dd2..6d93d9f0bf 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -203,12 +203,14 @@ struct VEDBoardInfo {
DBoardInitFn *init;
};
-static void init_cpus(const char *cpu_type, const char *privdev,
- hwaddr periphbase, qemu_irq *pic, bool secure, bool virt)
+static void init_cpus(MachineState *ms, const char *cpu_type,
+ const char *privdev, hwaddr periphbase,
+ qemu_irq *pic, bool secure, bool virt)
{
DeviceState *dev;
SysBusDevice *busdev;
int n;
+ unsigned int smp_cpus = ms->smp.cpus;
/* Create the actual CPUs */
for (n = 0; n < smp_cpus; n++) {
@@ -269,6 +271,7 @@ static void a9_daughterboard_init(const VexpressMachineState *vms,
const char *cpu_type,
qemu_irq *pic)
{
+ MachineState *machine = MACHINE(vms);
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *lowram = g_new(MemoryRegion, 1);
@@ -295,7 +298,7 @@ static void a9_daughterboard_init(const VexpressMachineState *vms,
memory_region_add_subregion(sysmem, 0x60000000, ram);
/* 0x1e000000 A9MPCore (SCU) private memory region */
- init_cpus(cpu_type, TYPE_A9MPCORE_PRIV, 0x1e000000, pic,
+ init_cpus(machine, cpu_type, TYPE_A9MPCORE_PRIV, 0x1e000000, pic,
vms->secure, vms->virt);
/* Daughterboard peripherals : 0x10020000 .. 0x20000000 */
@@ -355,6 +358,7 @@ static void a15_daughterboard_init(const VexpressMachineState *vms,
const char *cpu_type,
qemu_irq *pic)
{
+ MachineState *machine = MACHINE(vms);
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *sram = g_new(MemoryRegion, 1);
@@ -377,8 +381,8 @@ static void a15_daughterboard_init(const VexpressMachineState *vms,
memory_region_add_subregion(sysmem, 0x80000000, ram);
/* 0x2c000000 A15MPCore private memory region (GIC) */
- init_cpus(cpu_type, TYPE_A15MPCORE_PRIV, 0x2c000000, pic, vms->secure,
- vms->virt);
+ init_cpus(machine, cpu_type, TYPE_A15MPCORE_PRIV,
+ 0x2c000000, pic, vms->secure, vms->virt);
/* A15 daughterboard peripherals: */
@@ -706,7 +710,7 @@ static void vexpress_common_init(MachineState *machine)
daughterboard->bootinfo.kernel_filename = machine->kernel_filename;
daughterboard->bootinfo.kernel_cmdline = machine->kernel_cmdline;
daughterboard->bootinfo.initrd_filename = machine->initrd_filename;
- daughterboard->bootinfo.nb_cpus = smp_cpus;
+ daughterboard->bootinfo.nb_cpus = machine->smp.cpus;
daughterboard->bootinfo.board_id = VEXPRESS_BOARD_ID;
daughterboard->bootinfo.loader_start = daughterboard->loader_start;
daughterboard->bootinfo.smp_loader_start = map[VE_SRAM];
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 6b2f2e96d3..00852dbe81 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -556,11 +556,13 @@ static void create_v2m(VirtMachineState *vms, qemu_irq *pic)
static void create_gic(VirtMachineState *vms, qemu_irq *pic)
{
+ MachineState *ms = MACHINE(vms);
/* We create a standalone GIC */
DeviceState *gicdev;
SysBusDevice *gicbusdev;
const char *gictype;
int type = vms->gic_version, i;
+ unsigned int smp_cpus = ms->smp.cpus;
uint32_t nb_redist_regions = 0;
gictype = (type == 3) ? gicv3_class_name() : gic_class_name();
@@ -1036,13 +1038,14 @@ static bool virt_firmware_init(VirtMachineState *vms,
static FWCfgState *create_fw_cfg(const VirtMachineState *vms, AddressSpace *as)
{
+ MachineState *ms = MACHINE(vms);
hwaddr base = vms->memmap[VIRT_FW_CFG].base;
hwaddr size = vms->memmap[VIRT_FW_CFG].size;
FWCfgState *fw_cfg;
char *nodename;
fw_cfg = fw_cfg_init_mem_wide(base + 8, base, 8, base + 16, as);
- fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus);
nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base);
qemu_fdt_add_subnode(vms->fdt, nodename);
@@ -1475,6 +1478,8 @@ static void machvirt_init(MachineState *machine)
MemoryRegion *ram = g_new(MemoryRegion, 1);
bool firmware_loaded;
bool aarch64 = true;
+ unsigned int smp_cpus = machine->smp.cpus;
+ unsigned int max_cpus = machine->smp.max_cpus;
/*
* In accelerated mode, the memory map is computed earlier in kvm_type()
@@ -1842,6 +1847,7 @@ static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int idx)
static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms)
{
int n;
+ unsigned int max_cpus = ms->smp.max_cpus;
VirtMachineState *vms = VIRT_MACHINE(ms);
if (ms->possible_cpus) {
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 4f8bc41d9d..fc8e1a9550 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -21,6 +21,7 @@
#include "cpu.h"
#include "hw/arm/xlnx-zynqmp.h"
#include "hw/intc/arm_gic_common.h"
+#include "hw/boards.h"
#include "exec/address-spaces.h"
#include "sysemu/kvm.h"
#include "kvm_arm.h"
@@ -171,12 +172,13 @@ static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index)
return GIC_NUM_SPI_INTR + cpu_nr * GIC_INTERNAL + ppi_index;
}
-static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu,
- Error **errp)
+static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
+ const char *boot_cpu, Error **errp)
{
Error *err = NULL;
int i;
- int num_rpus = MIN(smp_cpus - XLNX_ZYNQMP_NUM_APU_CPUS, XLNX_ZYNQMP_NUM_RPU_CPUS);
+ int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS,
+ XLNX_ZYNQMP_NUM_RPU_CPUS);
if (num_rpus <= 0) {
/* Don't create rpu-cluster object if there's nothing to put in it */
@@ -221,9 +223,10 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu,
static void xlnx_zynqmp_init(Object *obj)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
int i;
- int num_apus = MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
+ int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
object_initialize_child(obj, "apu-cluster", &s->apu_cluster,
sizeof(s->apu_cluster), TYPE_CPU_CLUSTER,
@@ -290,11 +293,12 @@ static void xlnx_zynqmp_init(Object *obj)
static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
XlnxZynqMPState *s = XLNX_ZYNQMP(dev);
MemoryRegion *system_memory = get_system_memory();
uint8_t i;
uint64_t ram_size;
- int num_apus = MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
+ int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
const char *boot_cpu = s->boot_cpu ? s->boot_cpu : "apu-cpu[0]";
ram_addr_t ddr_low_size, ddr_high_size;
qemu_irq gic_spi[GIC_NUM_SPI_INTR];
@@ -456,7 +460,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
"RPUs just use -smp 6.");
}
- xlnx_zynqmp_create_rpu(s, boot_cpu, &err);
+ xlnx_zynqmp_create_rpu(ms, s, boot_cpu, &err);
if (err) {
error_propagate(errp, err);
return;
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 8eee1d8c59..c8cba212e4 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -29,6 +29,7 @@
#include "hw/qdev-properties.h"
#if !defined(CONFIG_USER_ONLY)
#include "hw/loader.h"
+#include "hw/boards.h"
#endif
#include "hw/arm/arm.h"
#include "sysemu/sysemu.h"
@@ -1194,6 +1195,9 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
init_cpreg_list(cpu);
#ifndef CONFIG_USER_ONLY
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int smp_cpus = ms->smp.cpus;
+
if (cpu->has_el3 || arm_feature(env, ARM_FEATURE_M_SECURITY)) {
cs->num_ases = 2;
@@ -1732,10 +1736,12 @@ static void cortex_a9_initfn(Object *obj)
#ifndef CONFIG_USER_ONLY
static uint64_t a15_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
+
/* Linux wants the number of processors from here.
* Might as well set the interrupt-controller bit too.
*/
- return ((smp_cpus - 1) << 24) | (1 << 23);
+ return ((ms->smp.cpus - 1) << 24) | (1 << 23);
}
#endif
--
2.21.0
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [Qemu-devel] [PATCH v3 09/10] hw: Replace global smp variables with MachineState for all remaining archs
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
` (7 preceding siblings ...)
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 08/10] hw/arm: " Like Xu
@ 2019-05-18 20:54 ` Like Xu
2019-06-06 3:00 ` Eduardo Habkost
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 10/10] vl.c: Replace smp global variables with smp machine properties Like Xu
` (3 subsequent siblings)
12 siblings, 1 reply; 32+ messages in thread
From: Like Xu @ 2019-05-18 20:54 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, qemu-devel,
Dr . David Alan Gilbert, Alistair Francis, Igor Mammedov
The global smp variables in alpha/hppa/mips/openrisc/sparc*/xtensa codes
are replaced with smp properties from MachineState.
A local variable of the same name would be introduced in the declaration
phase if it's used widely in the context OR replace it on the spot if it's
only used once. No semantic changes.
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/alpha/dp264.c | 1 +
hw/hppa/machine.c | 2 ++
hw/mips/boston.c | 2 +-
hw/mips/mips_malta.c | 2 ++
hw/openrisc/openrisc_sim.c | 1 +
hw/sparc/sun4m.c | 2 ++
hw/sparc64/sun4u.c | 4 ++--
hw/xtensa/sim.c | 2 +-
hw/xtensa/xtfpga.c | 1 +
9 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 0347eb897c..9dfb835013 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -63,6 +63,7 @@ static void clipper_init(MachineState *machine)
char *palcode_filename;
uint64_t palcode_entry, palcode_low, palcode_high;
uint64_t kernel_entry, kernel_low, kernel_high;
+ unsigned int smp_cpus = machine->smp.cpus;
/* Create up to 4 cpus. */
memset(cpus, 0, sizeof(cpus));
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 416e67bab1..662838d83b 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -72,6 +72,7 @@ static void machine_hppa_init(MachineState *machine)
MemoryRegion *ram_region;
MemoryRegion *cpu_region;
long i;
+ unsigned int smp_cpus = machine->smp.cpus;
ram_size = machine->ram_size;
@@ -242,6 +243,7 @@ static void machine_hppa_init(MachineState *machine)
static void hppa_machine_reset(MachineState *ms)
{
+ unsigned int smp_cpus = ms->smp.cpus;
int i;
qemu_devices_reset();
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index a8b29f62f5..ccbfac54ef 100644
--- a/hw/mips/boston.c
+++ b/hw/mips/boston.c
@@ -460,7 +460,7 @@ static void boston_mach_init(MachineState *machine)
object_property_set_str(OBJECT(s->cps), machine->cpu_type, "cpu-type",
&err);
- object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err);
+ object_property_set_int(OBJECT(s->cps), machine->smp.cpus, "num-vp", &err);
object_property_set_bool(OBJECT(s->cps), true, "realized", &err);
if (err != NULL) {
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 5fe9512c24..ead5976d1a 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -1095,6 +1095,8 @@ static int64_t load_kernel (void)
static void malta_mips_config(MIPSCPU *cpu)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int smp_cpus = ms->smp.cpus;
CPUMIPSState *env = &cpu->env;
CPUState *cs = CPU(cpu);
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index 0a906d815e..8d828e78ee 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -131,6 +131,7 @@ static void openrisc_sim_init(MachineState *machine)
qemu_irq *cpu_irqs[2];
qemu_irq serial_irq;
int n;
+ unsigned int smp_cpus = machine->smp.cpus;
for (n = 0; n < smp_cpus; n++) {
cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 07d126aea8..5c3739f2ef 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -852,6 +852,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
FWCfgState *fw_cfg;
DeviceState *dev;
SysBusDevice *s;
+ unsigned int smp_cpus = machine->smp.cpus;
+ unsigned int max_cpus = machine->smp.max_cpus;
/* init CPUs */
for(i = 0; i < smp_cpus; i++) {
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 399f2d73c8..0807f274bf 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -678,8 +678,8 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
&FW_CFG_IO(dev)->comb_iomem);
fw_cfg = FW_CFG(dev);
- fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
- fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)machine->smp.cpus);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
fw_cfg_add_i64(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_entry);
diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
index 12c7437398..a4eef76fbc 100644
--- a/hw/xtensa/sim.c
+++ b/hw/xtensa/sim.c
@@ -60,7 +60,7 @@ static void xtensa_sim_init(MachineState *machine)
const char *kernel_filename = machine->kernel_filename;
int n;
- for (n = 0; n < smp_cpus; n++) {
+ for (n = 0; n < machine->smp.cpus; n++) {
cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
env = &cpu->env;
diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
index e05ef75a75..f7f3e11e93 100644
--- a/hw/xtensa/xtfpga.c
+++ b/hw/xtensa/xtfpga.c
@@ -238,6 +238,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
const unsigned system_io_size = 224 * MiB;
uint32_t freq = 10000000;
int n;
+ unsigned int smp_cpus = machine->smp.cpus;
if (smp_cpus > 1) {
mx_pic = xtensa_mx_pic_init(31);
--
2.21.0
^ permalink raw reply related [flat|nested] 32+ messages in thread
* [Qemu-devel] [PATCH v3 10/10] vl.c: Replace smp global variables with smp machine properties
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
` (8 preceding siblings ...)
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 09/10] hw: Replace global smp variables with MachineState for all remaining archs Like Xu
@ 2019-05-18 20:54 ` Like Xu
2019-06-06 3:00 ` Eduardo Habkost
2019-05-26 13:51 ` [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into " Like Xu
` (2 subsequent siblings)
12 siblings, 1 reply; 32+ messages in thread
From: Like Xu @ 2019-05-18 20:54 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, qemu-devel,
Dr . David Alan Gilbert, Alistair Francis, Igor Mammedov
The global smp variables in vl.c are completely replaced with machine properties.
Form this commit, the smp_cpus/smp_cores/smp_threads/max_cpus are deprecated
and only machine properties within MachineState are fully applied and enabled.
Signed-off-by: Like Xu <like.xu@linux.intel.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
vl.c | 53 ++++++++++++++++++++++++++---------------------------
1 file changed, 26 insertions(+), 27 deletions(-)
diff --git a/vl.c b/vl.c
index 15d519e371..a700c93c77 100644
--- a/vl.c
+++ b/vl.c
@@ -162,10 +162,6 @@ static Chardev **serial_hds;
Chardev *parallel_hds[MAX_PARALLEL_PORTS];
int win2k_install_hack = 0;
int singlestep = 0;
-int smp_cpus;
-unsigned int max_cpus;
-int smp_cores = 1;
-int smp_threads = 1;
int acpi_enabled = 1;
int no_hpet = 0;
int fd_bootchk = 1;
@@ -1282,8 +1278,9 @@ static void smp_parse(QemuOpts *opts)
sockets = sockets > 0 ? sockets : 1;
cpus = cores * threads * sockets;
} else {
- max_cpus = qemu_opt_get_number(opts, "maxcpus", cpus);
- sockets = max_cpus / (cores * threads);
+ current_machine->smp.max_cpus =
+ qemu_opt_get_number(opts, "maxcpus", cpus);
+ sockets = current_machine->smp.max_cpus / (cores * threads);
}
} else if (cores == 0) {
threads = threads > 0 ? threads : 1;
@@ -1300,34 +1297,37 @@ static void smp_parse(QemuOpts *opts)
exit(1);
}
- max_cpus = qemu_opt_get_number(opts, "maxcpus", cpus);
+ current_machine->smp.max_cpus =
+ qemu_opt_get_number(opts, "maxcpus", cpus);
- if (max_cpus < cpus) {
+ if (current_machine->smp.max_cpus < cpus) {
error_report("maxcpus must be equal to or greater than smp");
exit(1);
}
- if (sockets * cores * threads > max_cpus) {
+ if (sockets * cores * threads > current_machine->smp.max_cpus) {
error_report("cpu topology: "
"sockets (%u) * cores (%u) * threads (%u) > "
"maxcpus (%u)",
- sockets, cores, threads, max_cpus);
+ sockets, cores, threads,
+ current_machine->smp.max_cpus);
exit(1);
}
- if (sockets * cores * threads != max_cpus) {
+ if (sockets * cores * threads != current_machine->smp.max_cpus) {
warn_report("Invalid CPU topology deprecated: "
"sockets (%u) * cores (%u) * threads (%u) "
"!= maxcpus (%u)",
- sockets, cores, threads, max_cpus);
+ sockets, cores, threads,
+ current_machine->smp.max_cpus);
}
- smp_cpus = cpus;
- smp_cores = cores;
- smp_threads = threads;
+ current_machine->smp.cpus = cpus;
+ current_machine->smp.cores = cores;
+ current_machine->smp.threads = threads;
}
- if (smp_cpus > 1) {
+ if (current_machine->smp.cpus > 1) {
Error *blocker = NULL;
error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp");
replay_add_blocker(blocker);
@@ -4128,26 +4128,25 @@ int main(int argc, char **argv, char **envp)
machine_class->default_cpus = machine_class->default_cpus ?: 1;
/* default to machine_class->default_cpus */
- smp_cpus = machine_class->default_cpus;
- max_cpus = machine_class->default_cpus;
+ current_machine->smp.cpus = machine_class->default_cpus;
+ current_machine->smp.max_cpus = machine_class->default_cpus;
+ current_machine->smp.cores = 1;
+ current_machine->smp.threads = 1;
smp_parse(qemu_opts_find(qemu_find_opts("smp-opts"), NULL));
- current_machine->smp.cpus = smp_cpus;
- current_machine->smp.max_cpus = max_cpus;
- current_machine->smp.cores = smp_cores;
- current_machine->smp.threads = smp_threads;
-
/* sanity-check smp_cpus and max_cpus against machine_class */
- if (smp_cpus < machine_class->min_cpus) {
+ if (current_machine->smp.cpus < machine_class->min_cpus) {
error_report("Invalid SMP CPUs %d. The min CPUs "
- "supported by machine '%s' is %d", smp_cpus,
+ "supported by machine '%s' is %d",
+ current_machine->smp.cpus,
machine_class->name, machine_class->min_cpus);
exit(1);
}
- if (max_cpus > machine_class->max_cpus) {
+ if (current_machine->smp.max_cpus > machine_class->max_cpus) {
error_report("Invalid SMP CPUs %d. The max CPUs "
- "supported by machine '%s' is %d", max_cpus,
+ "supported by machine '%s' is %d",
+ current_machine->smp.max_cpus,
machine_class->name, machine_class->max_cpus);
exit(1);
}
--
2.21.0
^ permalink raw reply related [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 05/10] hw/riscv: Replace global smp variables with machine smp properties
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 05/10] hw/riscv: " Like Xu
@ 2019-05-20 21:45 ` Alistair Francis
2019-06-20 14:52 ` Eduardo Habkost
1 sibling, 0 replies; 32+ messages in thread
From: Alistair Francis @ 2019-05-20 21:45 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, Eduardo Habkost, QEMU Trivial,
qemu-devel@nongnu.org Developers, Dr . David Alan Gilbert,
Igor Mammedov
On Sun, May 19, 2019 at 5:56 AM Like Xu <like.xu@linux.intel.com> wrote:
>
> The global smp variables in riscv are replaced with smp machine properties.
>
> A local variable of the same name would be introduced in the declaration
> phase if it's used widely in the context OR replace it on the spot if it's
> only used once. No semantic changes.
>
> Signed-off-by: Like Xu <like.xu@linux.intel.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/sifive_e.c | 6 ++++--
> hw/riscv/sifive_plic.c | 3 +++
> hw/riscv/sifive_u.c | 6 ++++--
> hw/riscv/spike.c | 2 ++
> hw/riscv/virt.c | 1 +
> 5 files changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index b1cd11363c..ae86a63c04 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -137,6 +137,7 @@ static void riscv_sifive_e_init(MachineState *machine)
>
> static void riscv_sifive_e_soc_init(Object *obj)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> SiFiveESoCState *s = RISCV_E_SOC(obj);
>
> object_initialize_child(obj, "cpus", &s->cpus,
> @@ -144,12 +145,13 @@ static void riscv_sifive_e_soc_init(Object *obj)
> &error_abort, NULL);
> object_property_set_str(OBJECT(&s->cpus), SIFIVE_E_CPU, "cpu-type",
> &error_abort);
> - object_property_set_int(OBJECT(&s->cpus), smp_cpus, "num-harts",
> + object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts",
> &error_abort);
> }
>
> static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> const struct MemmapEntry *memmap = sifive_e_memmap;
>
> SiFiveESoCState *s = RISCV_E_SOC(dev);
> @@ -179,7 +181,7 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
> SIFIVE_E_PLIC_CONTEXT_STRIDE,
> memmap[SIFIVE_E_PLIC].size);
> sifive_clint_create(memmap[SIFIVE_E_CLINT].base,
> - memmap[SIFIVE_E_CLINT].size, smp_cpus,
> + memmap[SIFIVE_E_CLINT].size, ms->smp.cpus,
> SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE);
> sifive_mmio_emulate(sys_mem, "riscv.sifive.e.aon",
> memmap[SIFIVE_E_AON].base, memmap[SIFIVE_E_AON].size);
> diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c
> index 07a032d93d..d4010a1f39 100644
> --- a/hw/riscv/sifive_plic.c
> +++ b/hw/riscv/sifive_plic.c
> @@ -23,6 +23,7 @@
> #include "qemu/error-report.h"
> #include "hw/sysbus.h"
> #include "hw/pci/msi.h"
> +#include "hw/boards.h"
> #include "target/riscv/cpu.h"
> #include "sysemu/sysemu.h"
> #include "hw/riscv/sifive_plic.h"
> @@ -438,6 +439,8 @@ static void sifive_plic_irq_request(void *opaque, int irq, int level)
>
> static void sifive_plic_realize(DeviceState *dev, Error **errp)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> + unsigned int smp_cpus = ms->smp.cpus;
> SiFivePLICState *plic = SIFIVE_PLIC(dev);
> int i;
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index 5ecc47cea3..43bf256946 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -321,13 +321,14 @@ static void riscv_sifive_u_init(MachineState *machine)
>
> static void riscv_sifive_u_soc_init(Object *obj)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> SiFiveUSoCState *s = RISCV_U_SOC(obj);
>
> object_initialize_child(obj, "cpus", &s->cpus, sizeof(s->cpus),
> TYPE_RISCV_HART_ARRAY, &error_abort, NULL);
> object_property_set_str(OBJECT(&s->cpus), SIFIVE_U_CPU, "cpu-type",
> &error_abort);
> - object_property_set_int(OBJECT(&s->cpus), smp_cpus, "num-harts",
> + object_property_set_int(OBJECT(&s->cpus), ms->smp.cpus, "num-harts",
> &error_abort);
>
> sysbus_init_child_obj(obj, "gem", &s->gem, sizeof(s->gem),
> @@ -336,6 +337,7 @@ static void riscv_sifive_u_soc_init(Object *obj)
>
> static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> SiFiveUSoCState *s = RISCV_U_SOC(dev);
> const struct MemmapEntry *memmap = sifive_u_memmap;
> MemoryRegion *system_memory = get_system_memory();
> @@ -371,7 +373,7 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
> sifive_uart_create(system_memory, memmap[SIFIVE_U_UART1].base,
> serial_hd(1), qdev_get_gpio_in(DEVICE(s->plic), SIFIVE_U_UART1_IRQ));
> sifive_clint_create(memmap[SIFIVE_U_CLINT].base,
> - memmap[SIFIVE_U_CLINT].size, smp_cpus,
> + memmap[SIFIVE_U_CLINT].size, ms->smp.cpus,
> SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE);
>
> for (i = 0; i < SIFIVE_U_PLIC_NUM_SOURCES; i++) {
> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
> index 2a000a5800..6a747ff22e 100644
> --- a/hw/riscv/spike.c
> +++ b/hw/riscv/spike.c
> @@ -171,6 +171,7 @@ static void spike_v1_10_0_board_init(MachineState *machine)
> MemoryRegion *main_mem = g_new(MemoryRegion, 1);
> MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
> int i;
> + unsigned int smp_cpus = machine->smp.cpus;
>
> /* Initialize SOC */
> object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
> @@ -253,6 +254,7 @@ static void spike_v1_09_1_board_init(MachineState *machine)
> MemoryRegion *main_mem = g_new(MemoryRegion, 1);
> MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
> int i;
> + unsigned int smp_cpus = machine->smp.cpus;
>
> /* Initialize SOC */
> object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index fc4c6b306e..b3f1962384 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -395,6 +395,7 @@ static void riscv_virt_board_init(MachineState *machine)
> char *plic_hart_config;
> size_t plic_hart_config_len;
> int i;
> + unsigned int smp_cpus = machine->smp.cpus;
> void *fdt;
>
> /* Initialize SOC */
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
` (9 preceding siblings ...)
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 10/10] vl.c: Replace smp global variables with smp machine properties Like Xu
@ 2019-05-26 13:51 ` Like Xu
2019-05-29 0:37 ` Like Xu
2019-06-06 3:02 ` Eduardo Habkost
2019-06-07 21:25 ` Eduardo Habkost
12 siblings, 1 reply; 32+ messages in thread
From: Like Xu @ 2019-05-26 13:51 UTC (permalink / raw)
To: qemu-trivial
Cc: Peter Maydell, Eduardo Habkost, Dr . David Alan Gilbert,
qemu-devel, Alistair Francis, Igor Mammedov
On 2019/5/19 4:54, Like Xu wrote:
> This patch series make existing cores/threads/sockets into machine
> properties and get rid of global smp_* variables they use currently.
>
> The purpose of getting rid of globals is disentangle layer violations and
> let's do it one step at a time by replacing the smp_foo with qdev_get_machine()
> as few calls as possible and delay other related refactoring efforts.
>
Hi Eduardo & Igor,
Do you have any comments on this new version of CpuTopology refactoring?
With this series of patch, we may move forward to review [Qemu-devel]
[PATCH v2 0/5] Introduce cpu die topology and enable CPUID.1F for i386.
Thanks,
Like Xu
> ==changelog==
>
> v3:
>
> - rephrase commit messages
> - s/of/of present/ for CpuTopology comment
> - drop reduanct arguments such as cpu_type
> - use ms instead of macs in migration context
> - rebase to commit 1b46b4daa6
>
<snip>
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties
2019-05-26 13:51 ` [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into " Like Xu
@ 2019-05-29 0:37 ` Like Xu
0 siblings, 0 replies; 32+ messages in thread
From: Like Xu @ 2019-05-29 0:37 UTC (permalink / raw)
To: Eduardo Habkost, Igor Mammedov; +Cc: qemu-devel@nongnu.org Developers
Ping for [PATCH v3 00/10] Refactor cpu topo into machine properties.
On 2019/5/26 21:51, Like Xu wrote:
> On 2019/5/19 4:54, Like Xu wrote:
>> This patch series make existing cores/threads/sockets into machine
>> properties and get rid of global smp_* variables they use currently.
>>
>> The purpose of getting rid of globals is disentangle layer violations and
>> let's do it one step at a time by replacing the smp_foo with
>> qdev_get_machine()
>> as few calls as possible and delay other related refactoring efforts.
>>
>
> Hi Eduardo & Igor,
> Do you have any comments on this new version of CpuTopology refactoring?
>
> With this series of patch, we may move forward to review [Qemu-devel]
> [PATCH v2 0/5] Introduce cpu die topology and enable CPUID.1F for i386.
>
> Thanks,
> Like Xu
>
>> ==changelog==
>>
>> v3:
>>
>> - rephrase commit messages
>> - s/of/of present/ for CpuTopology comment
>> - drop reduanct arguments such as cpu_type
>> - use ms instead of macs in migration context
>> - rebase to commit 1b46b4daa6
>>
>
> <snip>
>
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 04/10] hw/ppc: Replace global smp variables with machine smp properties
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 04/10] hw/ppc: Replace global smp variables with machine smp properties Like Xu
@ 2019-06-06 2:52 ` Eduardo Habkost
2019-06-06 2:54 ` Eduardo Habkost
0 siblings, 1 reply; 32+ messages in thread
From: Eduardo Habkost @ 2019-06-06 2:52 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, qemu-trivial, qemu-devel, Dr . David Alan Gilbert,
Alistair Francis, Igor Mammedov
On Sun, May 19, 2019 at 04:54:22AM +0800, Like Xu wrote:
> The global smp variables in ppc are replaced with smp machine properties.
>
> A local variable of the same name would be introduced in the declaration
> phase if it's used widely in the context OR replace it on the spot if it's
> only used once. No semantic changes.
>
> Signed-off-by: Like Xu <like.xu@linux.intel.com>
Any objections from the ppc maintainers to queueing this through
the Machine Core tree?
> ---
> hw/ppc/e500.c | 3 +++
> hw/ppc/mac_newworld.c | 3 ++-
> hw/ppc/mac_oldworld.c | 3 ++-
> hw/ppc/pnv.c | 6 ++++--
> hw/ppc/prep.c | 4 ++--
> hw/ppc/spapr.c | 34 ++++++++++++++++++++++++++--------
> hw/ppc/spapr_rtas.c | 4 +++-
> 7 files changed, 42 insertions(+), 15 deletions(-)
>
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index beb2efd694..5e42e5a059 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -307,6 +307,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
> bool dry_run)
> {
> MachineState *machine = MACHINE(pms);
> + unsigned int smp_cpus = machine->smp.cpus;
> const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms);
> CPUPPCState *env = first_cpu->env_ptr;
> int ret = -1;
> @@ -734,6 +735,7 @@ static DeviceState *ppce500_init_mpic_qemu(PPCE500MachineState *pms,
> SysBusDevice *s;
> int i, j, k;
> MachineState *machine = MACHINE(pms);
> + unsigned int smp_cpus = machine->smp.cpus;
> const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms);
>
> dev = qdev_create(NULL, TYPE_OPENPIC);
> @@ -846,6 +848,7 @@ void ppce500_init(MachineState *machine)
> struct boot_info *boot_info;
> int dt_size;
> int i;
> + unsigned int smp_cpus = machine->smp.cpus;
> /* irq num for pin INTA, INTB, INTC and INTD is 1, 2, 3 and
> * 4 respectively */
> unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4};
> diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> index 02d8559621..257b26ee24 100644
> --- a/hw/ppc/mac_newworld.c
> +++ b/hw/ppc/mac_newworld.c
> @@ -135,6 +135,7 @@ static void ppc_core99_init(MachineState *machine)
> DeviceState *dev, *pic_dev;
> hwaddr nvram_addr = 0xFFF04000;
> uint64_t tbfreq;
> + unsigned int smp_cpus = machine->smp.cpus;
>
> linux_boot = (kernel_filename != NULL);
>
> @@ -464,7 +465,7 @@ static void ppc_core99_init(MachineState *machine)
> sysbus_mmio_map(s, 1, CFG_ADDR + 2);
>
> fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
> - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
> + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
> fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
> fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
> fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
> diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
> index 460cbc7923..1968f05a6c 100644
> --- a/hw/ppc/mac_oldworld.c
> +++ b/hw/ppc/mac_oldworld.c
> @@ -99,6 +99,7 @@ static void ppc_heathrow_init(MachineState *machine)
> DeviceState *dev, *pic_dev;
> BusState *adb_bus;
> int bios_size;
> + unsigned int smp_cpus = machine->smp.cpus;
> uint16_t ppc_boot_device;
> DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
> void *fw_cfg;
> @@ -322,7 +323,7 @@ static void ppc_heathrow_init(MachineState *machine)
> sysbus_mmio_map(s, 1, CFG_ADDR + 2);
>
> fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
> - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
> + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
> fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
> fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
> fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 1e8c505936..3bb15338de 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -678,7 +678,8 @@ static void pnv_init(MachineState *machine)
> object_property_add_child(OBJECT(pnv), chip_name, chip, &error_fatal);
> object_property_set_int(chip, PNV_CHIP_HWID(i), "chip-id",
> &error_fatal);
> - object_property_set_int(chip, smp_cores, "nr-cores", &error_fatal);
> + object_property_set_int(chip, machine->smp.cores,
> + "nr-cores", &error_fatal);
> object_property_set_bool(chip, true, "realized", &error_fatal);
> }
> g_free(chip_typename);
> @@ -1134,6 +1135,7 @@ static void pnv_chip_instance_init(Object *obj)
>
> static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> Error *error = NULL;
> PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
> const char *typename = pnv_chip_core_typename(chip);
> @@ -1168,7 +1170,7 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
> snprintf(core_name, sizeof(core_name), "core[%d]", core_hwid);
> object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core),
> &error_fatal);
> - object_property_set_int(OBJECT(pnv_core), smp_threads, "nr-threads",
> + object_property_set_int(OBJECT(pnv_core), ms->smp.threads, "nr-threads",
> &error_fatal);
> object_property_set_int(OBJECT(pnv_core), core_hwid,
> CPU_CORE_PROP_CORE_ID, &error_fatal);
> diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
> index b7f459d475..968fd3ade2 100644
> --- a/hw/ppc/prep.c
> +++ b/hw/ppc/prep.c
> @@ -428,7 +428,7 @@ static void ppc_prep_init(MachineState *machine)
> linux_boot = (kernel_filename != NULL);
>
> /* init CPUs */
> - for (i = 0; i < smp_cpus; i++) {
> + for (i = 0; i < machine->smp.cpus; i++) {
> cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
> env = &cpu->env;
>
> @@ -765,7 +765,7 @@ static void ibm_40p_init(MachineState *machine)
> boot_device = machine->boot_order[0];
> }
>
> - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
> + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
> fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
> fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_PREP);
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 7fb34decb9..25da337f84 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -105,6 +105,9 @@
> */
> static int spapr_vcpu_id(SpaprMachineState *spapr, int cpu_index)
> {
> + MachineState *ms = MACHINE(spapr);
> + unsigned int smp_threads = ms->smp.threads;
> +
> assert(spapr->vsmt);
> return
> (cpu_index / smp_threads) * spapr->vsmt + cpu_index % smp_threads;
> @@ -152,8 +155,10 @@ static void pre_2_10_vmstate_unregister_dummy_icp(int i)
>
> int spapr_max_server_number(SpaprMachineState *spapr)
> {
> + MachineState *ms = MACHINE(spapr);
> +
> assert(spapr->vsmt);
> - return DIV_ROUND_UP(max_cpus * spapr->vsmt, smp_threads);
> + return DIV_ROUND_UP(ms->smp.max_cpus * spapr->vsmt, ms->smp.threads);
> }
>
> static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
> @@ -286,6 +291,7 @@ static void spapr_populate_pa_features(SpaprMachineState *spapr,
>
> static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState *spapr)
> {
> + MachineState *ms = MACHINE(spapr);
> int ret = 0, offset, cpus_offset;
> CPUState *cs;
> char cpu_model[32];
> @@ -295,7 +301,7 @@ static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState *spapr)
> PowerPCCPU *cpu = POWERPC_CPU(cs);
> DeviceClass *dc = DEVICE_GET_CLASS(cs);
> int index = spapr_get_vcpu_id(cpu);
> - int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
> + int compat_smt = MIN(ms->smp.threads, ppc_compat_max_vthreads(cpu));
>
> if (!spapr_is_thread0_in_vcore(spapr, cpu)) {
> continue;
> @@ -441,6 +447,7 @@ static int spapr_populate_memory(SpaprMachineState *spapr, void *fdt)
> static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
> SpaprMachineState *spapr)
> {
> + MachineState *ms = MACHINE(spapr);
> PowerPCCPU *cpu = POWERPC_CPU(cs);
> CPUPPCState *env = &cpu->env;
> PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
> @@ -452,7 +459,8 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
> uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
> uint32_t page_sizes_prop[64];
> size_t page_sizes_prop_size;
> - uint32_t vcpus_per_socket = smp_threads * smp_cores;
> + unsigned int smp_threads = ms->smp.threads;
> + uint32_t vcpus_per_socket = smp_threads * ms->smp.cores;
> uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
> int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
> SpaprDrc *drc;
> @@ -1022,6 +1030,7 @@ int spapr_h_cas_compose_response(SpaprMachineState *spapr,
>
> static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt)
> {
> + MachineState *ms = MACHINE(spapr);
> int rtas;
> GString *hypertas = g_string_sized_new(256);
> GString *qemu_hypertas = g_string_sized_new(256);
> @@ -1032,7 +1041,7 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt)
> cpu_to_be32(max_device_addr >> 32),
> cpu_to_be32(max_device_addr & 0xffffffff),
> 0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE),
> - cpu_to_be32(max_cpus / smp_threads),
> + cpu_to_be32(ms->smp.max_cpus / ms->smp.threads),
> };
> uint32_t maxdomain = cpu_to_be32(spapr->gpu_numa_id > 1 ? 1 : 0);
> uint32_t maxdomains[] = {
> @@ -2540,7 +2549,7 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp)
> /* find cpu slot in machine->possible_cpus by core_id */
> static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
> {
> - int index = id / smp_threads;
> + int index = id / ms->smp.threads;
>
> if (index >= ms->possible_cpus->len) {
> return NULL;
> @@ -2553,10 +2562,12 @@ static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
>
> static void spapr_set_vsmt_mode(SpaprMachineState *spapr, Error **errp)
> {
> + MachineState *ms = MACHINE(spapr);
> Error *local_err = NULL;
> bool vsmt_user = !!spapr->vsmt;
> int kvm_smt = kvmppc_smt_threads();
> int ret;
> + unsigned int smp_threads = ms->smp.threads;
>
> if (!kvm_enabled() && (smp_threads > 1)) {
> error_setg(&local_err, "TCG cannot support more than 1 thread/core "
> @@ -2630,6 +2641,9 @@ static void spapr_init_cpus(SpaprMachineState *spapr)
> SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
> const char *type = spapr_get_cpu_core_type(machine->cpu_type);
> const CPUArchIdList *possible_cpus;
> + unsigned int smp_cpus = machine->smp.cpus;
> + unsigned int smp_threads = machine->smp.threads;
> + unsigned int max_cpus = machine->smp.max_cpus;
> int boot_cores_nr = smp_cpus / smp_threads;
> int i;
>
> @@ -3856,6 +3870,7 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
> const char *type = object_get_typename(OBJECT(dev));
> CPUArchId *core_slot;
> int index;
> + unsigned int smp_threads = machine->smp.threads;
>
> if (dev->hotplugged && !mc->has_hotpluggable_cpus) {
> error_setg(&local_err, "CPU hotplug not supported for this machine");
> @@ -4110,14 +4125,16 @@ spapr_cpu_index_to_props(MachineState *machine, unsigned cpu_index)
>
> static int64_t spapr_get_default_cpu_node_id(const MachineState *ms, int idx)
> {
> - return idx / smp_cores % nb_numa_nodes;
> + return idx / ms->smp.cores % nb_numa_nodes;
> }
>
> static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine)
> {
> int i;
> + unsigned int smp_threads = machine->smp.threads;
> + unsigned int smp_cpus = machine->smp.cpus;
> const char *core_type;
> - int spapr_max_cores = max_cpus / smp_threads;
> + int spapr_max_cores = machine->smp.max_cpus / smp_threads;
> MachineClass *mc = MACHINE_GET_CLASS(machine);
>
> if (!mc->has_hotpluggable_cpus) {
> @@ -4240,6 +4257,7 @@ int spapr_get_vcpu_id(PowerPCCPU *cpu)
> void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp)
> {
> SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
> + MachineState *ms = MACHINE(spapr);
> int vcpu_id;
>
> vcpu_id = spapr_vcpu_id(spapr, cpu_index);
> @@ -4248,7 +4266,7 @@ void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp)
> error_setg(errp, "Can't create CPU with id %d in KVM", vcpu_id);
> error_append_hint(errp, "Adjust the number of cpus to %d "
> "or try to raise the number of threads per core\n",
> - vcpu_id * smp_threads / spapr->vsmt);
> + vcpu_id * ms->smp.threads / spapr->vsmt);
> return;
> }
>
> diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
> index ee24212765..c9ffe9786c 100644
> --- a/hw/ppc/spapr_rtas.c
> +++ b/hw/ppc/spapr_rtas.c
> @@ -231,6 +231,8 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
> target_ulong args,
> uint32_t nret, target_ulong rets)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> + unsigned int max_cpus = ms->smp.max_cpus;
> target_ulong parameter = rtas_ld(args, 0);
> target_ulong buffer = rtas_ld(args, 1);
> target_ulong length = rtas_ld(args, 2);
> @@ -244,7 +246,7 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
> "MaxPlatProcs=%d",
> max_cpus,
> current_machine->ram_size / MiB,
> - smp_cpus,
> + ms->smp.cpus,
> max_cpus);
> ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
> g_free(param_val);
> --
> 2.21.0
>
>
--
Eduardo
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 04/10] hw/ppc: Replace global smp variables with machine smp properties
2019-06-06 2:52 ` Eduardo Habkost
@ 2019-06-06 2:54 ` Eduardo Habkost
2019-06-06 3:07 ` David Gibson
0 siblings, 1 reply; 32+ messages in thread
From: Eduardo Habkost @ 2019-06-06 2:54 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, qemu-trivial, Mark Cave-Ayland, qemu-devel,
Dr . David Alan Gilbert, Hervé Poussineau,
Cédric Le Goater, Alistair Francis, Igor Mammedov, qemu-ppc,
David Gibson
On Wed, Jun 05, 2019 at 11:52:41PM -0300, Eduardo Habkost wrote:
> On Sun, May 19, 2019 at 04:54:22AM +0800, Like Xu wrote:
> > The global smp variables in ppc are replaced with smp machine properties.
> >
> > A local variable of the same name would be introduced in the declaration
> > phase if it's used widely in the context OR replace it on the spot if it's
> > only used once. No semantic changes.
> >
> > Signed-off-by: Like Xu <like.xu@linux.intel.com>
>
> Any objections from the ppc maintainers to queueing this through
> the Machine Core tree?
Oops, CCing the ppc maintainers.
>
> > ---
> > hw/ppc/e500.c | 3 +++
> > hw/ppc/mac_newworld.c | 3 ++-
> > hw/ppc/mac_oldworld.c | 3 ++-
> > hw/ppc/pnv.c | 6 ++++--
> > hw/ppc/prep.c | 4 ++--
> > hw/ppc/spapr.c | 34 ++++++++++++++++++++++++++--------
> > hw/ppc/spapr_rtas.c | 4 +++-
> > 7 files changed, 42 insertions(+), 15 deletions(-)
> >
> > diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> > index beb2efd694..5e42e5a059 100644
> > --- a/hw/ppc/e500.c
> > +++ b/hw/ppc/e500.c
> > @@ -307,6 +307,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
> > bool dry_run)
> > {
> > MachineState *machine = MACHINE(pms);
> > + unsigned int smp_cpus = machine->smp.cpus;
> > const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms);
> > CPUPPCState *env = first_cpu->env_ptr;
> > int ret = -1;
> > @@ -734,6 +735,7 @@ static DeviceState *ppce500_init_mpic_qemu(PPCE500MachineState *pms,
> > SysBusDevice *s;
> > int i, j, k;
> > MachineState *machine = MACHINE(pms);
> > + unsigned int smp_cpus = machine->smp.cpus;
> > const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms);
> >
> > dev = qdev_create(NULL, TYPE_OPENPIC);
> > @@ -846,6 +848,7 @@ void ppce500_init(MachineState *machine)
> > struct boot_info *boot_info;
> > int dt_size;
> > int i;
> > + unsigned int smp_cpus = machine->smp.cpus;
> > /* irq num for pin INTA, INTB, INTC and INTD is 1, 2, 3 and
> > * 4 respectively */
> > unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4};
> > diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> > index 02d8559621..257b26ee24 100644
> > --- a/hw/ppc/mac_newworld.c
> > +++ b/hw/ppc/mac_newworld.c
> > @@ -135,6 +135,7 @@ static void ppc_core99_init(MachineState *machine)
> > DeviceState *dev, *pic_dev;
> > hwaddr nvram_addr = 0xFFF04000;
> > uint64_t tbfreq;
> > + unsigned int smp_cpus = machine->smp.cpus;
> >
> > linux_boot = (kernel_filename != NULL);
> >
> > @@ -464,7 +465,7 @@ static void ppc_core99_init(MachineState *machine)
> > sysbus_mmio_map(s, 1, CFG_ADDR + 2);
> >
> > fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
> > - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
> > + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
> > fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
> > fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
> > fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
> > diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
> > index 460cbc7923..1968f05a6c 100644
> > --- a/hw/ppc/mac_oldworld.c
> > +++ b/hw/ppc/mac_oldworld.c
> > @@ -99,6 +99,7 @@ static void ppc_heathrow_init(MachineState *machine)
> > DeviceState *dev, *pic_dev;
> > BusState *adb_bus;
> > int bios_size;
> > + unsigned int smp_cpus = machine->smp.cpus;
> > uint16_t ppc_boot_device;
> > DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
> > void *fw_cfg;
> > @@ -322,7 +323,7 @@ static void ppc_heathrow_init(MachineState *machine)
> > sysbus_mmio_map(s, 1, CFG_ADDR + 2);
> >
> > fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
> > - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
> > + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
> > fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
> > fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
> > fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
> > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> > index 1e8c505936..3bb15338de 100644
> > --- a/hw/ppc/pnv.c
> > +++ b/hw/ppc/pnv.c
> > @@ -678,7 +678,8 @@ static void pnv_init(MachineState *machine)
> > object_property_add_child(OBJECT(pnv), chip_name, chip, &error_fatal);
> > object_property_set_int(chip, PNV_CHIP_HWID(i), "chip-id",
> > &error_fatal);
> > - object_property_set_int(chip, smp_cores, "nr-cores", &error_fatal);
> > + object_property_set_int(chip, machine->smp.cores,
> > + "nr-cores", &error_fatal);
> > object_property_set_bool(chip, true, "realized", &error_fatal);
> > }
> > g_free(chip_typename);
> > @@ -1134,6 +1135,7 @@ static void pnv_chip_instance_init(Object *obj)
> >
> > static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
> > {
> > + MachineState *ms = MACHINE(qdev_get_machine());
> > Error *error = NULL;
> > PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
> > const char *typename = pnv_chip_core_typename(chip);
> > @@ -1168,7 +1170,7 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
> > snprintf(core_name, sizeof(core_name), "core[%d]", core_hwid);
> > object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core),
> > &error_fatal);
> > - object_property_set_int(OBJECT(pnv_core), smp_threads, "nr-threads",
> > + object_property_set_int(OBJECT(pnv_core), ms->smp.threads, "nr-threads",
> > &error_fatal);
> > object_property_set_int(OBJECT(pnv_core), core_hwid,
> > CPU_CORE_PROP_CORE_ID, &error_fatal);
> > diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
> > index b7f459d475..968fd3ade2 100644
> > --- a/hw/ppc/prep.c
> > +++ b/hw/ppc/prep.c
> > @@ -428,7 +428,7 @@ static void ppc_prep_init(MachineState *machine)
> > linux_boot = (kernel_filename != NULL);
> >
> > /* init CPUs */
> > - for (i = 0; i < smp_cpus; i++) {
> > + for (i = 0; i < machine->smp.cpus; i++) {
> > cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
> > env = &cpu->env;
> >
> > @@ -765,7 +765,7 @@ static void ibm_40p_init(MachineState *machine)
> > boot_device = machine->boot_order[0];
> > }
> >
> > - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
> > + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
> > fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
> > fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_PREP);
> >
> > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> > index 7fb34decb9..25da337f84 100644
> > --- a/hw/ppc/spapr.c
> > +++ b/hw/ppc/spapr.c
> > @@ -105,6 +105,9 @@
> > */
> > static int spapr_vcpu_id(SpaprMachineState *spapr, int cpu_index)
> > {
> > + MachineState *ms = MACHINE(spapr);
> > + unsigned int smp_threads = ms->smp.threads;
> > +
> > assert(spapr->vsmt);
> > return
> > (cpu_index / smp_threads) * spapr->vsmt + cpu_index % smp_threads;
> > @@ -152,8 +155,10 @@ static void pre_2_10_vmstate_unregister_dummy_icp(int i)
> >
> > int spapr_max_server_number(SpaprMachineState *spapr)
> > {
> > + MachineState *ms = MACHINE(spapr);
> > +
> > assert(spapr->vsmt);
> > - return DIV_ROUND_UP(max_cpus * spapr->vsmt, smp_threads);
> > + return DIV_ROUND_UP(ms->smp.max_cpus * spapr->vsmt, ms->smp.threads);
> > }
> >
> > static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
> > @@ -286,6 +291,7 @@ static void spapr_populate_pa_features(SpaprMachineState *spapr,
> >
> > static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState *spapr)
> > {
> > + MachineState *ms = MACHINE(spapr);
> > int ret = 0, offset, cpus_offset;
> > CPUState *cs;
> > char cpu_model[32];
> > @@ -295,7 +301,7 @@ static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState *spapr)
> > PowerPCCPU *cpu = POWERPC_CPU(cs);
> > DeviceClass *dc = DEVICE_GET_CLASS(cs);
> > int index = spapr_get_vcpu_id(cpu);
> > - int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
> > + int compat_smt = MIN(ms->smp.threads, ppc_compat_max_vthreads(cpu));
> >
> > if (!spapr_is_thread0_in_vcore(spapr, cpu)) {
> > continue;
> > @@ -441,6 +447,7 @@ static int spapr_populate_memory(SpaprMachineState *spapr, void *fdt)
> > static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
> > SpaprMachineState *spapr)
> > {
> > + MachineState *ms = MACHINE(spapr);
> > PowerPCCPU *cpu = POWERPC_CPU(cs);
> > CPUPPCState *env = &cpu->env;
> > PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
> > @@ -452,7 +459,8 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
> > uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
> > uint32_t page_sizes_prop[64];
> > size_t page_sizes_prop_size;
> > - uint32_t vcpus_per_socket = smp_threads * smp_cores;
> > + unsigned int smp_threads = ms->smp.threads;
> > + uint32_t vcpus_per_socket = smp_threads * ms->smp.cores;
> > uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
> > int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
> > SpaprDrc *drc;
> > @@ -1022,6 +1030,7 @@ int spapr_h_cas_compose_response(SpaprMachineState *spapr,
> >
> > static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt)
> > {
> > + MachineState *ms = MACHINE(spapr);
> > int rtas;
> > GString *hypertas = g_string_sized_new(256);
> > GString *qemu_hypertas = g_string_sized_new(256);
> > @@ -1032,7 +1041,7 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt)
> > cpu_to_be32(max_device_addr >> 32),
> > cpu_to_be32(max_device_addr & 0xffffffff),
> > 0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE),
> > - cpu_to_be32(max_cpus / smp_threads),
> > + cpu_to_be32(ms->smp.max_cpus / ms->smp.threads),
> > };
> > uint32_t maxdomain = cpu_to_be32(spapr->gpu_numa_id > 1 ? 1 : 0);
> > uint32_t maxdomains[] = {
> > @@ -2540,7 +2549,7 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp)
> > /* find cpu slot in machine->possible_cpus by core_id */
> > static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
> > {
> > - int index = id / smp_threads;
> > + int index = id / ms->smp.threads;
> >
> > if (index >= ms->possible_cpus->len) {
> > return NULL;
> > @@ -2553,10 +2562,12 @@ static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
> >
> > static void spapr_set_vsmt_mode(SpaprMachineState *spapr, Error **errp)
> > {
> > + MachineState *ms = MACHINE(spapr);
> > Error *local_err = NULL;
> > bool vsmt_user = !!spapr->vsmt;
> > int kvm_smt = kvmppc_smt_threads();
> > int ret;
> > + unsigned int smp_threads = ms->smp.threads;
> >
> > if (!kvm_enabled() && (smp_threads > 1)) {
> > error_setg(&local_err, "TCG cannot support more than 1 thread/core "
> > @@ -2630,6 +2641,9 @@ static void spapr_init_cpus(SpaprMachineState *spapr)
> > SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
> > const char *type = spapr_get_cpu_core_type(machine->cpu_type);
> > const CPUArchIdList *possible_cpus;
> > + unsigned int smp_cpus = machine->smp.cpus;
> > + unsigned int smp_threads = machine->smp.threads;
> > + unsigned int max_cpus = machine->smp.max_cpus;
> > int boot_cores_nr = smp_cpus / smp_threads;
> > int i;
> >
> > @@ -3856,6 +3870,7 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
> > const char *type = object_get_typename(OBJECT(dev));
> > CPUArchId *core_slot;
> > int index;
> > + unsigned int smp_threads = machine->smp.threads;
> >
> > if (dev->hotplugged && !mc->has_hotpluggable_cpus) {
> > error_setg(&local_err, "CPU hotplug not supported for this machine");
> > @@ -4110,14 +4125,16 @@ spapr_cpu_index_to_props(MachineState *machine, unsigned cpu_index)
> >
> > static int64_t spapr_get_default_cpu_node_id(const MachineState *ms, int idx)
> > {
> > - return idx / smp_cores % nb_numa_nodes;
> > + return idx / ms->smp.cores % nb_numa_nodes;
> > }
> >
> > static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine)
> > {
> > int i;
> > + unsigned int smp_threads = machine->smp.threads;
> > + unsigned int smp_cpus = machine->smp.cpus;
> > const char *core_type;
> > - int spapr_max_cores = max_cpus / smp_threads;
> > + int spapr_max_cores = machine->smp.max_cpus / smp_threads;
> > MachineClass *mc = MACHINE_GET_CLASS(machine);
> >
> > if (!mc->has_hotpluggable_cpus) {
> > @@ -4240,6 +4257,7 @@ int spapr_get_vcpu_id(PowerPCCPU *cpu)
> > void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp)
> > {
> > SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
> > + MachineState *ms = MACHINE(spapr);
> > int vcpu_id;
> >
> > vcpu_id = spapr_vcpu_id(spapr, cpu_index);
> > @@ -4248,7 +4266,7 @@ void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp)
> > error_setg(errp, "Can't create CPU with id %d in KVM", vcpu_id);
> > error_append_hint(errp, "Adjust the number of cpus to %d "
> > "or try to raise the number of threads per core\n",
> > - vcpu_id * smp_threads / spapr->vsmt);
> > + vcpu_id * ms->smp.threads / spapr->vsmt);
> > return;
> > }
> >
> > diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
> > index ee24212765..c9ffe9786c 100644
> > --- a/hw/ppc/spapr_rtas.c
> > +++ b/hw/ppc/spapr_rtas.c
> > @@ -231,6 +231,8 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
> > target_ulong args,
> > uint32_t nret, target_ulong rets)
> > {
> > + MachineState *ms = MACHINE(qdev_get_machine());
> > + unsigned int max_cpus = ms->smp.max_cpus;
> > target_ulong parameter = rtas_ld(args, 0);
> > target_ulong buffer = rtas_ld(args, 1);
> > target_ulong length = rtas_ld(args, 2);
> > @@ -244,7 +246,7 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
> > "MaxPlatProcs=%d",
> > max_cpus,
> > current_machine->ram_size / MiB,
> > - smp_cpus,
> > + ms->smp.cpus,
> > max_cpus);
> > ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
> > g_free(param_val);
> > --
> > 2.21.0
> >
> >
>
> --
> Eduardo
--
Eduardo
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 06/10] hw/s390x: Replace global smp variables with machine smp properties
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 06/10] hw/s390x: " Like Xu
@ 2019-06-06 2:56 ` Eduardo Habkost
2019-06-06 7:07 ` [Qemu-devel] [qemu-s390x] " Christian Borntraeger
2019-06-06 7:56 ` [Qemu-devel] " Cornelia Huck
2019-06-28 18:33 ` [Qemu-devel] [PATCH] fixup! " Eduardo Habkost
1 sibling, 2 replies; 32+ messages in thread
From: Eduardo Habkost @ 2019-06-06 2:56 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, David Hildenbrand, qemu-trivial, Cornelia Huck,
qemu-devel, Dr . David Alan Gilbert, Halil Pasic,
Christian Borntraeger, qemu-s390x, Alistair Francis,
Igor Mammedov, Richard Henderson
On Sun, May 19, 2019 at 04:54:24AM +0800, Like Xu wrote:
> The global smp variables in s390x are replaced with smp machine properties.
>
> A local variable of the same name would be introduced in the declaration
> phase if it's used widely in the context OR replace it on the spot if it's
> only used once. No semantic changes.
>
> Signed-off-by: Like Xu <like.xu@linux.intel.com>
CCing s390 maintainers.
Any objections to merging this through the Machine Core tree?
> ---
> hw/s390x/s390-virtio-ccw.c | 3 ++-
> hw/s390x/sclp.c | 2 +-
> target/s390x/cpu.c | 3 +++
> target/s390x/excp_helper.c | 5 +++++
> 4 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
> index ed1fe7a93e..692ad6e372 100644
> --- a/hw/s390x/s390-virtio-ccw.c
> +++ b/hw/s390x/s390-virtio-ccw.c
> @@ -83,7 +83,7 @@ static void s390_init_cpus(MachineState *machine)
> /* initialize possible_cpus */
> mc->possible_cpu_arch_ids(machine);
>
> - for (i = 0; i < smp_cpus; i++) {
> + for (i = 0; i < machine->smp.cpus; i++) {
> s390x_new_cpu(machine->cpu_type, i, &error_fatal);
> }
> }
> @@ -410,6 +410,7 @@ static CpuInstanceProperties s390_cpu_index_to_props(MachineState *ms,
> static const CPUArchIdList *s390_possible_cpu_arch_ids(MachineState *ms)
> {
> int i;
> + unsigned int max_cpus = ms->smp.max_cpus;
>
> if (ms->possible_cpus) {
> g_assert(ms->possible_cpus && ms->possible_cpus->len == max_cpus);
> diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c
> index 4510a800cb..fac7c3bb6c 100644
> --- a/hw/s390x/sclp.c
> +++ b/hw/s390x/sclp.c
> @@ -64,7 +64,7 @@ static void read_SCP_info(SCLPDevice *sclp, SCCB *sccb)
> prepare_cpu_entries(sclp, read_info->entries, &cpu_count);
> read_info->entries_cpu = cpu_to_be16(cpu_count);
> read_info->offset_cpu = cpu_to_be16(offsetof(ReadInfo, entries));
> - read_info->highest_cpu = cpu_to_be16(max_cpus - 1);
> + read_info->highest_cpu = cpu_to_be16(machine->smp.max_cpus - 1);
>
> read_info->ibc_val = cpu_to_be32(s390_get_ibc_val());
>
> diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
> index b1df63d82c..f1e5c0d9c3 100644
> --- a/target/s390x/cpu.c
> +++ b/target/s390x/cpu.c
> @@ -37,6 +37,7 @@
> #include "hw/qdev-properties.h"
> #ifndef CONFIG_USER_ONLY
> #include "hw/hw.h"
> +#include "hw/boards.h"
> #include "sysemu/arch_init.h"
> #include "sysemu/sysemu.h"
> #endif
> @@ -193,6 +194,8 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
> }
>
> #if !defined(CONFIG_USER_ONLY)
> + MachineState *ms = MACHINE(qdev_get_machine());
> + unsigned int max_cpus = ms->smp.max_cpus;
> if (cpu->env.core_id >= max_cpus) {
> error_setg(&err, "Unable to add CPU with core-id: %" PRIu32
> ", maximum core-id: %d", cpu->env.core_id,
> diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c
> index 3a467b72c5..1c6938effc 100644
> --- a/target/s390x/excp_helper.c
> +++ b/target/s390x/excp_helper.c
> @@ -31,6 +31,7 @@
> #ifndef CONFIG_USER_ONLY
> #include "sysemu/sysemu.h"
> #include "hw/s390x/s390_flic.h"
> +#include "hw/boards.h"
> #endif
>
> void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code,
> @@ -300,6 +301,10 @@ static void do_ext_interrupt(CPUS390XState *env)
> g_assert(cpu_addr < S390_MAX_CPUS);
> lowcore->cpu_addr = cpu_to_be16(cpu_addr);
> clear_bit(cpu_addr, env->emergency_signals);
> +#ifndef CONFIG_USER_ONLY
> + MachineState *ms = MACHINE(qdev_get_machine());
> + unsigned int max_cpus = ms->smp.max_cpus;
> +#endif
> if (bitmap_empty(env->emergency_signals, max_cpus)) {
> env->pending_int &= ~INTERRUPT_EMERGENCY_SIGNAL;
> }
> --
> 2.21.0
>
>
--
Eduardo
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 07/10] hw/i386: Replace global smp variables with machine smp properties
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 07/10] hw/i386: " Like Xu
@ 2019-06-06 2:57 ` Eduardo Habkost
0 siblings, 0 replies; 32+ messages in thread
From: Eduardo Habkost @ 2019-06-06 2:57 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, qemu-trivial, qemu-devel, Dr . David Alan Gilbert,
Alistair Francis, Igor Mammedov
On Sun, May 19, 2019 at 04:54:25AM +0800, Like Xu wrote:
> The global smp variables in i386 are replaced with smp machine properties.
> To avoid calling qdev_get_machine() as much as possible, some related funtions
> for acpi data generations are refactored. No semantic changes.
>
> A local variable of the same name would be introduced in the declaration
> phase if it's used widely in the context OR replace it on the spot if it's
> only used once. No semantic changes.
>
> Signed-off-by: Like Xu <like.xu@linux.intel.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 08/10] hw/arm: Replace global smp variables with machine smp properties
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 08/10] hw/arm: " Like Xu
@ 2019-06-06 2:58 ` Eduardo Habkost
0 siblings, 0 replies; 32+ messages in thread
From: Eduardo Habkost @ 2019-06-06 2:58 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, Rob Herring, qemu-trivial, Alistair Francis,
Edgar E. Iglesias, qemu-devel, Andrew Baumann,
Dr . David Alan Gilbert, Andrey Smirnov, qemu-arm,
Alistair Francis, Igor Mammedov, Jean-Christophe Dubois,
Philippe Mathieu-Daudé
On Sun, May 19, 2019 at 04:54:26AM +0800, Like Xu wrote:
> The global smp variables in arm are replaced with smp machine properties.
> The init_cpus() and *_create_rpu() are refactored to pass MachineState.
>
> A local variable of the same name would be introduced in the declaration
> phase if it's used widely in the context OR replace it on the spot if it's
> only used once. No semantic changes.
>
> Signed-off-by: Like Xu <like.xu@linux.intel.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
CCing arm maintainers. Any objection to merging this through the
Machine Core tree?
> ---
> hw/arm/fsl-imx6.c | 6 +++++-
> hw/arm/fsl-imx6ul.c | 6 +++++-
> hw/arm/fsl-imx7.c | 7 +++++--
> hw/arm/highbank.c | 1 +
> hw/arm/mcimx6ul-evk.c | 2 +-
> hw/arm/mcimx7d-sabre.c | 2 +-
> hw/arm/raspi.c | 4 ++--
> hw/arm/realview.c | 1 +
> hw/arm/sabrelite.c | 2 +-
> hw/arm/vexpress.c | 16 ++++++++++------
> hw/arm/virt.c | 8 +++++++-
> hw/arm/xlnx-zynqmp.c | 16 ++++++++++------
> target/arm/cpu.c | 8 +++++++-
> 13 files changed, 56 insertions(+), 23 deletions(-)
>
> diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
> index 7b7b97f74c..ed772d5bd9 100644
> --- a/hw/arm/fsl-imx6.c
> +++ b/hw/arm/fsl-imx6.c
> @@ -23,6 +23,7 @@
> #include "qapi/error.h"
> #include "qemu-common.h"
> #include "hw/arm/fsl-imx6.h"
> +#include "hw/boards.h"
> #include "sysemu/sysemu.h"
> #include "chardev/char.h"
> #include "qemu/error-report.h"
> @@ -33,11 +34,12 @@
>
> static void fsl_imx6_init(Object *obj)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> FslIMX6State *s = FSL_IMX6(obj);
> char name[NAME_SIZE];
> int i;
>
> - for (i = 0; i < MIN(smp_cpus, FSL_IMX6_NUM_CPUS); i++) {
> + for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) {
> snprintf(name, NAME_SIZE, "cpu%d", i);
> object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
> "cortex-a9-" TYPE_ARM_CPU, &error_abort, NULL);
> @@ -93,9 +95,11 @@ static void fsl_imx6_init(Object *obj)
>
> static void fsl_imx6_realize(DeviceState *dev, Error **errp)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> FslIMX6State *s = FSL_IMX6(dev);
> uint16_t i;
> Error *err = NULL;
> + unsigned int smp_cpus = ms->smp.cpus;
>
> if (smp_cpus > FSL_IMX6_NUM_CPUS) {
> error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
> diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
> index 4b56bfa8d1..74b8ecbbb6 100644
> --- a/hw/arm/fsl-imx6ul.c
> +++ b/hw/arm/fsl-imx6ul.c
> @@ -21,6 +21,7 @@
> #include "qemu-common.h"
> #include "hw/arm/fsl-imx6ul.h"
> #include "hw/misc/unimp.h"
> +#include "hw/boards.h"
> #include "sysemu/sysemu.h"
> #include "qemu/error-report.h"
>
> @@ -28,11 +29,12 @@
>
> static void fsl_imx6ul_init(Object *obj)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> FslIMX6ULState *s = FSL_IMX6UL(obj);
> char name[NAME_SIZE];
> int i;
>
> - for (i = 0; i < MIN(smp_cpus, FSL_IMX6UL_NUM_CPUS); i++) {
> + for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6UL_NUM_CPUS); i++) {
> snprintf(name, NAME_SIZE, "cpu%d", i);
> object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
> "cortex-a7-" TYPE_ARM_CPU, &error_abort, NULL);
> @@ -156,10 +158,12 @@ static void fsl_imx6ul_init(Object *obj)
>
> static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> FslIMX6ULState *s = FSL_IMX6UL(dev);
> int i;
> qemu_irq irq;
> char name[NAME_SIZE];
> + unsigned int smp_cpus = ms->smp.cpus;
>
> if (smp_cpus > FSL_IMX6UL_NUM_CPUS) {
> error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
> diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
> index 7663ad6861..71cc414de6 100644
> --- a/hw/arm/fsl-imx7.c
> +++ b/hw/arm/fsl-imx7.c
> @@ -23,6 +23,7 @@
> #include "qemu-common.h"
> #include "hw/arm/fsl-imx7.h"
> #include "hw/misc/unimp.h"
> +#include "hw/boards.h"
> #include "sysemu/sysemu.h"
> #include "qemu/error-report.h"
>
> @@ -30,12 +31,12 @@
>
> static void fsl_imx7_init(Object *obj)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> FslIMX7State *s = FSL_IMX7(obj);
> char name[NAME_SIZE];
> int i;
>
> -
> - for (i = 0; i < MIN(smp_cpus, FSL_IMX7_NUM_CPUS); i++) {
> + for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX7_NUM_CPUS); i++) {
> snprintf(name, NAME_SIZE, "cpu%d", i);
> object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]),
> ARM_CPU_TYPE_NAME("cortex-a7"), &error_abort,
> @@ -155,11 +156,13 @@ static void fsl_imx7_init(Object *obj)
>
> static void fsl_imx7_realize(DeviceState *dev, Error **errp)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> FslIMX7State *s = FSL_IMX7(dev);
> Object *o;
> int i;
> qemu_irq irq;
> char name[NAME_SIZE];
> + unsigned int smp_cpus = ms->smp.cpus;
>
> if (smp_cpus > FSL_IMX7_NUM_CPUS) {
> error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
> diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c
> index 96ccf18d86..f3b1712fc9 100644
> --- a/hw/arm/highbank.c
> +++ b/hw/arm/highbank.c
> @@ -240,6 +240,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
> SysBusDevice *busdev;
> qemu_irq pic[128];
> int n;
> + unsigned int smp_cpus = machine->smp.cpus;
> qemu_irq cpu_irq[4];
> qemu_irq cpu_fiq[4];
> qemu_irq cpu_virq[4];
> diff --git a/hw/arm/mcimx6ul-evk.c b/hw/arm/mcimx6ul-evk.c
> index fb2b015bf6..47c44dd83a 100644
> --- a/hw/arm/mcimx6ul-evk.c
> +++ b/hw/arm/mcimx6ul-evk.c
> @@ -43,7 +43,7 @@ static void mcimx6ul_evk_init(MachineState *machine)
> .kernel_filename = machine->kernel_filename,
> .kernel_cmdline = machine->kernel_cmdline,
> .initrd_filename = machine->initrd_filename,
> - .nb_cpus = smp_cpus,
> + .nb_cpus = machine->smp.cpus,
> };
>
> object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
> diff --git a/hw/arm/mcimx7d-sabre.c b/hw/arm/mcimx7d-sabre.c
> index 9c5f0e70c3..a8df0cce6e 100644
> --- a/hw/arm/mcimx7d-sabre.c
> +++ b/hw/arm/mcimx7d-sabre.c
> @@ -46,7 +46,7 @@ static void mcimx7d_sabre_init(MachineState *machine)
> .kernel_filename = machine->kernel_filename,
> .kernel_cmdline = machine->kernel_cmdline,
> .initrd_filename = machine->initrd_filename,
> - .nb_cpus = smp_cpus,
> + .nb_cpus = machine->smp.cpus,
> };
>
> object_initialize(&s->soc, sizeof(s->soc), TYPE_FSL_IMX7);
> diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
> index fe2bb511b9..d3e4c201c0 100644
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -117,7 +117,7 @@ static void setup_boot(MachineState *machine, int version, size_t ram_size)
>
> binfo.board_id = raspi_boardid[version];
> binfo.ram_size = ram_size;
> - binfo.nb_cpus = smp_cpus;
> + binfo.nb_cpus = machine->smp.cpus;
>
> if (version <= 2) {
> /* The rpi1 and 2 require some custom setup code to run in Secure
> @@ -196,7 +196,7 @@ static void raspi_init(MachineState *machine, int version)
> /* Setup the SOC */
> object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(&s->ram),
> &error_abort);
> - object_property_set_int(OBJECT(&s->soc), smp_cpus, "enabled-cpus",
> + object_property_set_int(OBJECT(&s->soc), machine->smp.cpus, "enabled-cpus",
> &error_abort);
> int board_rev = version == 3 ? 0xa02082 : 0xa21041;
> object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev",
> diff --git a/hw/arm/realview.c b/hw/arm/realview.c
> index 05a244df25..f470f21b0d 100644
> --- a/hw/arm/realview.c
> +++ b/hw/arm/realview.c
> @@ -70,6 +70,7 @@ static void realview_init(MachineState *machine,
> NICInfo *nd;
> I2CBus *i2c;
> int n;
> + unsigned int smp_cpus = machine->smp.cpus;
> int done_nic = 0;
> qemu_irq cpu_irq[4];
> int is_mpcore = 0;
> diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
> index ee140e5d9e..f9e7dc5a00 100644
> --- a/hw/arm/sabrelite.c
> +++ b/hw/arm/sabrelite.c
> @@ -107,7 +107,7 @@ static void sabrelite_init(MachineState *machine)
> sabrelite_binfo.kernel_filename = machine->kernel_filename;
> sabrelite_binfo.kernel_cmdline = machine->kernel_cmdline;
> sabrelite_binfo.initrd_filename = machine->initrd_filename;
> - sabrelite_binfo.nb_cpus = smp_cpus;
> + sabrelite_binfo.nb_cpus = machine->smp.cpus;
> sabrelite_binfo.secure_boot = true;
> sabrelite_binfo.write_secondary_boot = sabrelite_write_secondary;
> sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary;
> diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
> index d8634f3dd2..6d93d9f0bf 100644
> --- a/hw/arm/vexpress.c
> +++ b/hw/arm/vexpress.c
> @@ -203,12 +203,14 @@ struct VEDBoardInfo {
> DBoardInitFn *init;
> };
>
> -static void init_cpus(const char *cpu_type, const char *privdev,
> - hwaddr periphbase, qemu_irq *pic, bool secure, bool virt)
> +static void init_cpus(MachineState *ms, const char *cpu_type,
> + const char *privdev, hwaddr periphbase,
> + qemu_irq *pic, bool secure, bool virt)
> {
> DeviceState *dev;
> SysBusDevice *busdev;
> int n;
> + unsigned int smp_cpus = ms->smp.cpus;
>
> /* Create the actual CPUs */
> for (n = 0; n < smp_cpus; n++) {
> @@ -269,6 +271,7 @@ static void a9_daughterboard_init(const VexpressMachineState *vms,
> const char *cpu_type,
> qemu_irq *pic)
> {
> + MachineState *machine = MACHINE(vms);
> MemoryRegion *sysmem = get_system_memory();
> MemoryRegion *ram = g_new(MemoryRegion, 1);
> MemoryRegion *lowram = g_new(MemoryRegion, 1);
> @@ -295,7 +298,7 @@ static void a9_daughterboard_init(const VexpressMachineState *vms,
> memory_region_add_subregion(sysmem, 0x60000000, ram);
>
> /* 0x1e000000 A9MPCore (SCU) private memory region */
> - init_cpus(cpu_type, TYPE_A9MPCORE_PRIV, 0x1e000000, pic,
> + init_cpus(machine, cpu_type, TYPE_A9MPCORE_PRIV, 0x1e000000, pic,
> vms->secure, vms->virt);
>
> /* Daughterboard peripherals : 0x10020000 .. 0x20000000 */
> @@ -355,6 +358,7 @@ static void a15_daughterboard_init(const VexpressMachineState *vms,
> const char *cpu_type,
> qemu_irq *pic)
> {
> + MachineState *machine = MACHINE(vms);
> MemoryRegion *sysmem = get_system_memory();
> MemoryRegion *ram = g_new(MemoryRegion, 1);
> MemoryRegion *sram = g_new(MemoryRegion, 1);
> @@ -377,8 +381,8 @@ static void a15_daughterboard_init(const VexpressMachineState *vms,
> memory_region_add_subregion(sysmem, 0x80000000, ram);
>
> /* 0x2c000000 A15MPCore private memory region (GIC) */
> - init_cpus(cpu_type, TYPE_A15MPCORE_PRIV, 0x2c000000, pic, vms->secure,
> - vms->virt);
> + init_cpus(machine, cpu_type, TYPE_A15MPCORE_PRIV,
> + 0x2c000000, pic, vms->secure, vms->virt);
>
> /* A15 daughterboard peripherals: */
>
> @@ -706,7 +710,7 @@ static void vexpress_common_init(MachineState *machine)
> daughterboard->bootinfo.kernel_filename = machine->kernel_filename;
> daughterboard->bootinfo.kernel_cmdline = machine->kernel_cmdline;
> daughterboard->bootinfo.initrd_filename = machine->initrd_filename;
> - daughterboard->bootinfo.nb_cpus = smp_cpus;
> + daughterboard->bootinfo.nb_cpus = machine->smp.cpus;
> daughterboard->bootinfo.board_id = VEXPRESS_BOARD_ID;
> daughterboard->bootinfo.loader_start = daughterboard->loader_start;
> daughterboard->bootinfo.smp_loader_start = map[VE_SRAM];
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 6b2f2e96d3..00852dbe81 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -556,11 +556,13 @@ static void create_v2m(VirtMachineState *vms, qemu_irq *pic)
>
> static void create_gic(VirtMachineState *vms, qemu_irq *pic)
> {
> + MachineState *ms = MACHINE(vms);
> /* We create a standalone GIC */
> DeviceState *gicdev;
> SysBusDevice *gicbusdev;
> const char *gictype;
> int type = vms->gic_version, i;
> + unsigned int smp_cpus = ms->smp.cpus;
> uint32_t nb_redist_regions = 0;
>
> gictype = (type == 3) ? gicv3_class_name() : gic_class_name();
> @@ -1036,13 +1038,14 @@ static bool virt_firmware_init(VirtMachineState *vms,
>
> static FWCfgState *create_fw_cfg(const VirtMachineState *vms, AddressSpace *as)
> {
> + MachineState *ms = MACHINE(vms);
> hwaddr base = vms->memmap[VIRT_FW_CFG].base;
> hwaddr size = vms->memmap[VIRT_FW_CFG].size;
> FWCfgState *fw_cfg;
> char *nodename;
>
> fw_cfg = fw_cfg_init_mem_wide(base + 8, base, 8, base + 16, as);
> - fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
> + fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus);
>
> nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base);
> qemu_fdt_add_subnode(vms->fdt, nodename);
> @@ -1475,6 +1478,8 @@ static void machvirt_init(MachineState *machine)
> MemoryRegion *ram = g_new(MemoryRegion, 1);
> bool firmware_loaded;
> bool aarch64 = true;
> + unsigned int smp_cpus = machine->smp.cpus;
> + unsigned int max_cpus = machine->smp.max_cpus;
>
> /*
> * In accelerated mode, the memory map is computed earlier in kvm_type()
> @@ -1842,6 +1847,7 @@ static int64_t virt_get_default_cpu_node_id(const MachineState *ms, int idx)
> static const CPUArchIdList *virt_possible_cpu_arch_ids(MachineState *ms)
> {
> int n;
> + unsigned int max_cpus = ms->smp.max_cpus;
> VirtMachineState *vms = VIRT_MACHINE(ms);
>
> if (ms->possible_cpus) {
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index 4f8bc41d9d..fc8e1a9550 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -21,6 +21,7 @@
> #include "cpu.h"
> #include "hw/arm/xlnx-zynqmp.h"
> #include "hw/intc/arm_gic_common.h"
> +#include "hw/boards.h"
> #include "exec/address-spaces.h"
> #include "sysemu/kvm.h"
> #include "kvm_arm.h"
> @@ -171,12 +172,13 @@ static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index)
> return GIC_NUM_SPI_INTR + cpu_nr * GIC_INTERNAL + ppi_index;
> }
>
> -static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu,
> - Error **errp)
> +static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
> + const char *boot_cpu, Error **errp)
> {
> Error *err = NULL;
> int i;
> - int num_rpus = MIN(smp_cpus - XLNX_ZYNQMP_NUM_APU_CPUS, XLNX_ZYNQMP_NUM_RPU_CPUS);
> + int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS,
> + XLNX_ZYNQMP_NUM_RPU_CPUS);
>
> if (num_rpus <= 0) {
> /* Don't create rpu-cluster object if there's nothing to put in it */
> @@ -221,9 +223,10 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu,
>
> static void xlnx_zynqmp_init(Object *obj)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> XlnxZynqMPState *s = XLNX_ZYNQMP(obj);
> int i;
> - int num_apus = MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
> + int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
>
> object_initialize_child(obj, "apu-cluster", &s->apu_cluster,
> sizeof(s->apu_cluster), TYPE_CPU_CLUSTER,
> @@ -290,11 +293,12 @@ static void xlnx_zynqmp_init(Object *obj)
>
> static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> XlnxZynqMPState *s = XLNX_ZYNQMP(dev);
> MemoryRegion *system_memory = get_system_memory();
> uint8_t i;
> uint64_t ram_size;
> - int num_apus = MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
> + int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS);
> const char *boot_cpu = s->boot_cpu ? s->boot_cpu : "apu-cpu[0]";
> ram_addr_t ddr_low_size, ddr_high_size;
> qemu_irq gic_spi[GIC_NUM_SPI_INTR];
> @@ -456,7 +460,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
> "RPUs just use -smp 6.");
> }
>
> - xlnx_zynqmp_create_rpu(s, boot_cpu, &err);
> + xlnx_zynqmp_create_rpu(ms, s, boot_cpu, &err);
> if (err) {
> error_propagate(errp, err);
> return;
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 8eee1d8c59..c8cba212e4 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -29,6 +29,7 @@
> #include "hw/qdev-properties.h"
> #if !defined(CONFIG_USER_ONLY)
> #include "hw/loader.h"
> +#include "hw/boards.h"
> #endif
> #include "hw/arm/arm.h"
> #include "sysemu/sysemu.h"
> @@ -1194,6 +1195,9 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
> init_cpreg_list(cpu);
>
> #ifndef CONFIG_USER_ONLY
> + MachineState *ms = MACHINE(qdev_get_machine());
> + unsigned int smp_cpus = ms->smp.cpus;
> +
> if (cpu->has_el3 || arm_feature(env, ARM_FEATURE_M_SECURITY)) {
> cs->num_ases = 2;
>
> @@ -1732,10 +1736,12 @@ static void cortex_a9_initfn(Object *obj)
> #ifndef CONFIG_USER_ONLY
> static uint64_t a15_l2ctlr_read(CPUARMState *env, const ARMCPRegInfo *ri)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> +
> /* Linux wants the number of processors from here.
> * Might as well set the interrupt-controller bit too.
> */
> - return ((smp_cpus - 1) << 24) | (1 << 23);
> + return ((ms->smp.cpus - 1) << 24) | (1 << 23);
> }
> #endif
>
> --
> 2.21.0
>
>
--
Eduardo
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 09/10] hw: Replace global smp variables with MachineState for all remaining archs
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 09/10] hw: Replace global smp variables with MachineState for all remaining archs Like Xu
@ 2019-06-06 3:00 ` Eduardo Habkost
0 siblings, 0 replies; 32+ messages in thread
From: Eduardo Habkost @ 2019-06-06 3:00 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, Jia Liu, Paul Burton, Aleksandar Rikalo,
Helge Deller, Mark Cave-Ayland, qemu-devel,
Dr . David Alan Gilbert, Max Filippov, Artyom Tarasenko,
Aleksandar Markovic, Alistair Francis, Igor Mammedov,
Stafford Horne, Aurelien Jarno, Richard Henderson
On Sun, May 19, 2019 at 04:54:27AM +0800, Like Xu wrote:
> The global smp variables in alpha/hppa/mips/openrisc/sparc*/xtensa codes
> are replaced with smp properties from MachineState.
>
> A local variable of the same name would be introduced in the declaration
> phase if it's used widely in the context OR replace it on the spot if it's
> only used once. No semantic changes.
>
> Signed-off-by: Like Xu <like.xu@linux.intel.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
CCing the maintainers for those machines. Any objections to merging this
through the Machine Core tree?
> ---
> hw/alpha/dp264.c | 1 +
> hw/hppa/machine.c | 2 ++
> hw/mips/boston.c | 2 +-
> hw/mips/mips_malta.c | 2 ++
> hw/openrisc/openrisc_sim.c | 1 +
> hw/sparc/sun4m.c | 2 ++
> hw/sparc64/sun4u.c | 4 ++--
> hw/xtensa/sim.c | 2 +-
> hw/xtensa/xtfpga.c | 1 +
> 9 files changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
> index 0347eb897c..9dfb835013 100644
> --- a/hw/alpha/dp264.c
> +++ b/hw/alpha/dp264.c
> @@ -63,6 +63,7 @@ static void clipper_init(MachineState *machine)
> char *palcode_filename;
> uint64_t palcode_entry, palcode_low, palcode_high;
> uint64_t kernel_entry, kernel_low, kernel_high;
> + unsigned int smp_cpus = machine->smp.cpus;
>
> /* Create up to 4 cpus. */
> memset(cpus, 0, sizeof(cpus));
> diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
> index 416e67bab1..662838d83b 100644
> --- a/hw/hppa/machine.c
> +++ b/hw/hppa/machine.c
> @@ -72,6 +72,7 @@ static void machine_hppa_init(MachineState *machine)
> MemoryRegion *ram_region;
> MemoryRegion *cpu_region;
> long i;
> + unsigned int smp_cpus = machine->smp.cpus;
>
> ram_size = machine->ram_size;
>
> @@ -242,6 +243,7 @@ static void machine_hppa_init(MachineState *machine)
>
> static void hppa_machine_reset(MachineState *ms)
> {
> + unsigned int smp_cpus = ms->smp.cpus;
> int i;
>
> qemu_devices_reset();
> diff --git a/hw/mips/boston.c b/hw/mips/boston.c
> index a8b29f62f5..ccbfac54ef 100644
> --- a/hw/mips/boston.c
> +++ b/hw/mips/boston.c
> @@ -460,7 +460,7 @@ static void boston_mach_init(MachineState *machine)
>
> object_property_set_str(OBJECT(s->cps), machine->cpu_type, "cpu-type",
> &err);
> - object_property_set_int(OBJECT(s->cps), smp_cpus, "num-vp", &err);
> + object_property_set_int(OBJECT(s->cps), machine->smp.cpus, "num-vp", &err);
> object_property_set_bool(OBJECT(s->cps), true, "realized", &err);
>
> if (err != NULL) {
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index 5fe9512c24..ead5976d1a 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -1095,6 +1095,8 @@ static int64_t load_kernel (void)
>
> static void malta_mips_config(MIPSCPU *cpu)
> {
> + MachineState *ms = MACHINE(qdev_get_machine());
> + unsigned int smp_cpus = ms->smp.cpus;
> CPUMIPSState *env = &cpu->env;
> CPUState *cs = CPU(cpu);
>
> diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
> index 0a906d815e..8d828e78ee 100644
> --- a/hw/openrisc/openrisc_sim.c
> +++ b/hw/openrisc/openrisc_sim.c
> @@ -131,6 +131,7 @@ static void openrisc_sim_init(MachineState *machine)
> qemu_irq *cpu_irqs[2];
> qemu_irq serial_irq;
> int n;
> + unsigned int smp_cpus = machine->smp.cpus;
>
> for (n = 0; n < smp_cpus; n++) {
> cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));
> diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
> index 07d126aea8..5c3739f2ef 100644
> --- a/hw/sparc/sun4m.c
> +++ b/hw/sparc/sun4m.c
> @@ -852,6 +852,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
> FWCfgState *fw_cfg;
> DeviceState *dev;
> SysBusDevice *s;
> + unsigned int smp_cpus = machine->smp.cpus;
> + unsigned int max_cpus = machine->smp.max_cpus;
>
> /* init CPUs */
> for(i = 0; i < smp_cpus; i++) {
> diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
> index 399f2d73c8..0807f274bf 100644
> --- a/hw/sparc64/sun4u.c
> +++ b/hw/sparc64/sun4u.c
> @@ -678,8 +678,8 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
> &FW_CFG_IO(dev)->comb_iomem);
>
> fw_cfg = FW_CFG(dev);
> - fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
> - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
> + fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)machine->smp.cpus);
> + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
> fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
> fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
> fw_cfg_add_i64(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_entry);
> diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c
> index 12c7437398..a4eef76fbc 100644
> --- a/hw/xtensa/sim.c
> +++ b/hw/xtensa/sim.c
> @@ -60,7 +60,7 @@ static void xtensa_sim_init(MachineState *machine)
> const char *kernel_filename = machine->kernel_filename;
> int n;
>
> - for (n = 0; n < smp_cpus; n++) {
> + for (n = 0; n < machine->smp.cpus; n++) {
> cpu = XTENSA_CPU(cpu_create(machine->cpu_type));
> env = &cpu->env;
>
> diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c
> index e05ef75a75..f7f3e11e93 100644
> --- a/hw/xtensa/xtfpga.c
> +++ b/hw/xtensa/xtfpga.c
> @@ -238,6 +238,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine)
> const unsigned system_io_size = 224 * MiB;
> uint32_t freq = 10000000;
> int n;
> + unsigned int smp_cpus = machine->smp.cpus;
>
> if (smp_cpus > 1) {
> mx_pic = xtensa_mx_pic_init(31);
> --
> 2.21.0
>
>
--
Eduardo
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 10/10] vl.c: Replace smp global variables with smp machine properties
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 10/10] vl.c: Replace smp global variables with smp machine properties Like Xu
@ 2019-06-06 3:00 ` Eduardo Habkost
0 siblings, 0 replies; 32+ messages in thread
From: Eduardo Habkost @ 2019-06-06 3:00 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, qemu-trivial, qemu-devel, Dr . David Alan Gilbert,
Alistair Francis, Igor Mammedov
On Sun, May 19, 2019 at 04:54:28AM +0800, Like Xu wrote:
> The global smp variables in vl.c are completely replaced with machine properties.
>
> Form this commit, the smp_cpus/smp_cores/smp_threads/max_cpus are deprecated
> and only machine properties within MachineState are fully applied and enabled.
>
> Signed-off-by: Like Xu <like.xu@linux.intel.com>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
--
Eduardo
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
` (10 preceding siblings ...)
2019-05-26 13:51 ` [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into " Like Xu
@ 2019-06-06 3:02 ` Eduardo Habkost
2019-06-07 21:25 ` Eduardo Habkost
12 siblings, 0 replies; 32+ messages in thread
From: Eduardo Habkost @ 2019-06-06 3:02 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, qemu-trivial, qemu-devel, Dr . David Alan Gilbert,
Alistair Francis, Igor Mammedov
On Sun, May 19, 2019 at 04:54:18AM +0800, Like Xu wrote:
> This patch series make existing cores/threads/sockets into machine
> properties and get rid of global smp_* variables they use currently.
>
> The purpose of getting rid of globals is disentangle layer violations and
> let's do it one step at a time by replacing the smp_foo with qdev_get_machine()
> as few calls as possible and delay other related refactoring efforts.
Thanks, and sorry for taking so long to review this. This
version looks good, I'm planning to queue it. I will just wait
for a few days to hear from the maintainers of the machines that
are touched by the series.
>
> ==changelog==
>
> v3:
>
> - rephrase commit messages
> - s/of/of present/ for CpuTopology comment
> - drop reduanct arguments such as cpu_type
> - use ms instead of macs in migration context
> - rebase to commit 1b46b4daa6
>
> v2: https://patchwork.ozlabs.org/cover/1095727/
>
> - pass MachineState via call chain with trivial fixups
> - replace smp_cpus directly at places if it's only used once
> - s/topo/smp/ and drop smp_ prefix inside CpuTopology structure
> - add more commit messages to explaining what patch does
> - fix Patchew build failure for xen usage
> - use macs rather than ms in migration context for MigrationState
> - cleanup unrelated and redundant changes
> - spilt OpenRISC and RISC-V related patches
>
> v1: https://patchwork.kernel.org/cover/10876667/
>
> Like Xu (10):
> hw/boards: Add struct CpuTopology to MachineState
> machine: Refactor smp-related call chains to pass MachineState
> general: Replace global smp variables with smp machine properties
> hw/ppc: Replace global smp variables with machine smp properties
> hw/riscv: Replace global smp variables with machine smp properties
> hw/s390x: Replace global smp variables with machine smp properties
> hw/i386: Replace global smp variables with machine smp properties
> hw/arm: Replace global smp variables with machine smp properties
> hw: Replace global smp variables with MachineState for all remaining archs
> vl.c: Replace smp global variables with smp machine properties
>
> accel/kvm/kvm-all.c | 4 +--
> backends/hostmem.c | 6 +++--
> cpus.c | 6 +++--
> exec.c | 3 ++-
> gdbstub.c | 4 +++
> hw/alpha/dp264.c | 1 +
> hw/arm/fsl-imx6.c | 6 ++++-
> hw/arm/fsl-imx6ul.c | 6 ++++-
> hw/arm/fsl-imx7.c | 7 +++--
> hw/arm/highbank.c | 1 +
> hw/arm/mcimx6ul-evk.c | 2 +-
> hw/arm/mcimx7d-sabre.c | 2 +-
> hw/arm/raspi.c | 4 +--
> hw/arm/realview.c | 1 +
> hw/arm/sabrelite.c | 2 +-
> hw/arm/vexpress.c | 16 +++++++-----
> hw/arm/virt.c | 10 ++++++--
> hw/arm/xlnx-zynqmp.c | 16 +++++++-----
> hw/cpu/core.c | 4 ++-
> hw/hppa/machine.c | 4 ++-
> hw/i386/acpi-build.c | 13 ++++++----
> hw/i386/kvmvapic.c | 7 +++--
> hw/i386/pc.c | 33 ++++++++++++++----------
> hw/i386/xen/xen-hvm.c | 4 +++
> hw/mips/boston.c | 2 +-
> hw/mips/mips_malta.c | 24 +++++++++--------
> hw/openrisc/openrisc_sim.c | 1 +
> hw/ppc/e500.c | 3 +++
> hw/ppc/mac_newworld.c | 3 ++-
> hw/ppc/mac_oldworld.c | 3 ++-
> hw/ppc/pnv.c | 9 ++++---
> hw/ppc/prep.c | 4 +--
> hw/ppc/spapr.c | 37 ++++++++++++++++++--------
> hw/ppc/spapr_rtas.c | 4 ++-
> hw/riscv/sifive_e.c | 6 +++--
> hw/riscv/sifive_plic.c | 3 +++
> hw/riscv/sifive_u.c | 6 +++--
> hw/riscv/spike.c | 2 ++
> hw/riscv/virt.c | 1 +
> hw/s390x/s390-virtio-ccw.c | 9 ++++---
> hw/s390x/sclp.c | 2 +-
> hw/smbios/smbios.c | 26 +++++++++++--------
> hw/sparc/sun4m.c | 2 ++
> hw/sparc64/sun4u.c | 4 +--
> hw/xtensa/sim.c | 2 +-
> hw/xtensa/xtfpga.c | 1 +
> include/hw/boards.h | 19 ++++++++++++--
> include/hw/firmware/smbios.h | 5 ++--
> include/hw/i386/pc.h | 2 +-
> migration/postcopy-ram.c | 8 +++++-
> numa.c | 1 +
> qmp.c | 2 +-
> target/arm/cpu.c | 8 +++++-
> target/i386/cpu.c | 4 ++-
> target/openrisc/sys_helper.c | 6 ++++-
> target/s390x/cpu.c | 3 +++
> target/s390x/excp_helper.c | 5 ++++
> tcg/tcg.c | 13 +++++++++-
> vl.c | 50 +++++++++++++++++++-----------------
> 59 files changed, 301 insertions(+), 141 deletions(-)
>
> --
> 2.21.0
>
>
--
Eduardo
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 04/10] hw/ppc: Replace global smp variables with machine smp properties
2019-06-06 2:54 ` Eduardo Habkost
@ 2019-06-06 3:07 ` David Gibson
2019-06-06 8:20 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
0 siblings, 1 reply; 32+ messages in thread
From: David Gibson @ 2019-06-06 3:07 UTC (permalink / raw)
To: Eduardo Habkost
Cc: Peter Maydell, Like Xu, qemu-trivial, Mark Cave-Ayland,
qemu-devel, Dr . David Alan Gilbert, Hervé Poussineau,
Cédric Le Goater, Igor Mammedov, Alistair Francis, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 16662 bytes --]
On Wed, Jun 05, 2019 at 11:54:56PM -0300, Eduardo Habkost wrote:
> On Wed, Jun 05, 2019 at 11:52:41PM -0300, Eduardo Habkost wrote:
> > On Sun, May 19, 2019 at 04:54:22AM +0800, Like Xu wrote:
> > > The global smp variables in ppc are replaced with smp machine properties.
> > >
> > > A local variable of the same name would be introduced in the declaration
> > > phase if it's used widely in the context OR replace it on the spot if it's
> > > only used once. No semantic changes.
> > >
> > > Signed-off-by: Like Xu <like.xu@linux.intel.com>
> >
> > Any objections from the ppc maintainers to queueing this through
> > the Machine Core tree?
>
> Oops, CCing the ppc maintainers.
No objection here.
Acked-by: David Gibson <david@gibson.dropbear.id.au>
>
> >
> > > ---
> > > hw/ppc/e500.c | 3 +++
> > > hw/ppc/mac_newworld.c | 3 ++-
> > > hw/ppc/mac_oldworld.c | 3 ++-
> > > hw/ppc/pnv.c | 6 ++++--
> > > hw/ppc/prep.c | 4 ++--
> > > hw/ppc/spapr.c | 34 ++++++++++++++++++++++++++--------
> > > hw/ppc/spapr_rtas.c | 4 +++-
> > > 7 files changed, 42 insertions(+), 15 deletions(-)
> > >
> > > diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> > > index beb2efd694..5e42e5a059 100644
> > > --- a/hw/ppc/e500.c
> > > +++ b/hw/ppc/e500.c
> > > @@ -307,6 +307,7 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
> > > bool dry_run)
> > > {
> > > MachineState *machine = MACHINE(pms);
> > > + unsigned int smp_cpus = machine->smp.cpus;
> > > const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms);
> > > CPUPPCState *env = first_cpu->env_ptr;
> > > int ret = -1;
> > > @@ -734,6 +735,7 @@ static DeviceState *ppce500_init_mpic_qemu(PPCE500MachineState *pms,
> > > SysBusDevice *s;
> > > int i, j, k;
> > > MachineState *machine = MACHINE(pms);
> > > + unsigned int smp_cpus = machine->smp.cpus;
> > > const PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(pms);
> > >
> > > dev = qdev_create(NULL, TYPE_OPENPIC);
> > > @@ -846,6 +848,7 @@ void ppce500_init(MachineState *machine)
> > > struct boot_info *boot_info;
> > > int dt_size;
> > > int i;
> > > + unsigned int smp_cpus = machine->smp.cpus;
> > > /* irq num for pin INTA, INTB, INTC and INTD is 1, 2, 3 and
> > > * 4 respectively */
> > > unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4};
> > > diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
> > > index 02d8559621..257b26ee24 100644
> > > --- a/hw/ppc/mac_newworld.c
> > > +++ b/hw/ppc/mac_newworld.c
> > > @@ -135,6 +135,7 @@ static void ppc_core99_init(MachineState *machine)
> > > DeviceState *dev, *pic_dev;
> > > hwaddr nvram_addr = 0xFFF04000;
> > > uint64_t tbfreq;
> > > + unsigned int smp_cpus = machine->smp.cpus;
> > >
> > > linux_boot = (kernel_filename != NULL);
> > >
> > > @@ -464,7 +465,7 @@ static void ppc_core99_init(MachineState *machine)
> > > sysbus_mmio_map(s, 1, CFG_ADDR + 2);
> > >
> > > fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
> > > - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
> > > + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
> > > fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
> > > fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
> > > fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
> > > diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
> > > index 460cbc7923..1968f05a6c 100644
> > > --- a/hw/ppc/mac_oldworld.c
> > > +++ b/hw/ppc/mac_oldworld.c
> > > @@ -99,6 +99,7 @@ static void ppc_heathrow_init(MachineState *machine)
> > > DeviceState *dev, *pic_dev;
> > > BusState *adb_bus;
> > > int bios_size;
> > > + unsigned int smp_cpus = machine->smp.cpus;
> > > uint16_t ppc_boot_device;
> > > DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
> > > void *fw_cfg;
> > > @@ -322,7 +323,7 @@ static void ppc_heathrow_init(MachineState *machine)
> > > sysbus_mmio_map(s, 1, CFG_ADDR + 2);
> > >
> > > fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
> > > - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
> > > + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
> > > fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
> > > fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
> > > fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
> > > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> > > index 1e8c505936..3bb15338de 100644
> > > --- a/hw/ppc/pnv.c
> > > +++ b/hw/ppc/pnv.c
> > > @@ -678,7 +678,8 @@ static void pnv_init(MachineState *machine)
> > > object_property_add_child(OBJECT(pnv), chip_name, chip, &error_fatal);
> > > object_property_set_int(chip, PNV_CHIP_HWID(i), "chip-id",
> > > &error_fatal);
> > > - object_property_set_int(chip, smp_cores, "nr-cores", &error_fatal);
> > > + object_property_set_int(chip, machine->smp.cores,
> > > + "nr-cores", &error_fatal);
> > > object_property_set_bool(chip, true, "realized", &error_fatal);
> > > }
> > > g_free(chip_typename);
> > > @@ -1134,6 +1135,7 @@ static void pnv_chip_instance_init(Object *obj)
> > >
> > > static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
> > > {
> > > + MachineState *ms = MACHINE(qdev_get_machine());
> > > Error *error = NULL;
> > > PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
> > > const char *typename = pnv_chip_core_typename(chip);
> > > @@ -1168,7 +1170,7 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
> > > snprintf(core_name, sizeof(core_name), "core[%d]", core_hwid);
> > > object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core),
> > > &error_fatal);
> > > - object_property_set_int(OBJECT(pnv_core), smp_threads, "nr-threads",
> > > + object_property_set_int(OBJECT(pnv_core), ms->smp.threads, "nr-threads",
> > > &error_fatal);
> > > object_property_set_int(OBJECT(pnv_core), core_hwid,
> > > CPU_CORE_PROP_CORE_ID, &error_fatal);
> > > diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
> > > index b7f459d475..968fd3ade2 100644
> > > --- a/hw/ppc/prep.c
> > > +++ b/hw/ppc/prep.c
> > > @@ -428,7 +428,7 @@ static void ppc_prep_init(MachineState *machine)
> > > linux_boot = (kernel_filename != NULL);
> > >
> > > /* init CPUs */
> > > - for (i = 0; i < smp_cpus; i++) {
> > > + for (i = 0; i < machine->smp.cpus; i++) {
> > > cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
> > > env = &cpu->env;
> > >
> > > @@ -765,7 +765,7 @@ static void ibm_40p_init(MachineState *machine)
> > > boot_device = machine->boot_order[0];
> > > }
> > >
> > > - fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
> > > + fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
> > > fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
> > > fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_PREP);
> > >
> > > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> > > index 7fb34decb9..25da337f84 100644
> > > --- a/hw/ppc/spapr.c
> > > +++ b/hw/ppc/spapr.c
> > > @@ -105,6 +105,9 @@
> > > */
> > > static int spapr_vcpu_id(SpaprMachineState *spapr, int cpu_index)
> > > {
> > > + MachineState *ms = MACHINE(spapr);
> > > + unsigned int smp_threads = ms->smp.threads;
> > > +
> > > assert(spapr->vsmt);
> > > return
> > > (cpu_index / smp_threads) * spapr->vsmt + cpu_index % smp_threads;
> > > @@ -152,8 +155,10 @@ static void pre_2_10_vmstate_unregister_dummy_icp(int i)
> > >
> > > int spapr_max_server_number(SpaprMachineState *spapr)
> > > {
> > > + MachineState *ms = MACHINE(spapr);
> > > +
> > > assert(spapr->vsmt);
> > > - return DIV_ROUND_UP(max_cpus * spapr->vsmt, smp_threads);
> > > + return DIV_ROUND_UP(ms->smp.max_cpus * spapr->vsmt, ms->smp.threads);
> > > }
> > >
> > > static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu,
> > > @@ -286,6 +291,7 @@ static void spapr_populate_pa_features(SpaprMachineState *spapr,
> > >
> > > static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState *spapr)
> > > {
> > > + MachineState *ms = MACHINE(spapr);
> > > int ret = 0, offset, cpus_offset;
> > > CPUState *cs;
> > > char cpu_model[32];
> > > @@ -295,7 +301,7 @@ static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState *spapr)
> > > PowerPCCPU *cpu = POWERPC_CPU(cs);
> > > DeviceClass *dc = DEVICE_GET_CLASS(cs);
> > > int index = spapr_get_vcpu_id(cpu);
> > > - int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
> > > + int compat_smt = MIN(ms->smp.threads, ppc_compat_max_vthreads(cpu));
> > >
> > > if (!spapr_is_thread0_in_vcore(spapr, cpu)) {
> > > continue;
> > > @@ -441,6 +447,7 @@ static int spapr_populate_memory(SpaprMachineState *spapr, void *fdt)
> > > static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
> > > SpaprMachineState *spapr)
> > > {
> > > + MachineState *ms = MACHINE(spapr);
> > > PowerPCCPU *cpu = POWERPC_CPU(cs);
> > > CPUPPCState *env = &cpu->env;
> > > PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cs);
> > > @@ -452,7 +459,8 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt, int offset,
> > > uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
> > > uint32_t page_sizes_prop[64];
> > > size_t page_sizes_prop_size;
> > > - uint32_t vcpus_per_socket = smp_threads * smp_cores;
> > > + unsigned int smp_threads = ms->smp.threads;
> > > + uint32_t vcpus_per_socket = smp_threads * ms->smp.cores;
> > > uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
> > > int compat_smt = MIN(smp_threads, ppc_compat_max_vthreads(cpu));
> > > SpaprDrc *drc;
> > > @@ -1022,6 +1030,7 @@ int spapr_h_cas_compose_response(SpaprMachineState *spapr,
> > >
> > > static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt)
> > > {
> > > + MachineState *ms = MACHINE(spapr);
> > > int rtas;
> > > GString *hypertas = g_string_sized_new(256);
> > > GString *qemu_hypertas = g_string_sized_new(256);
> > > @@ -1032,7 +1041,7 @@ static void spapr_dt_rtas(SpaprMachineState *spapr, void *fdt)
> > > cpu_to_be32(max_device_addr >> 32),
> > > cpu_to_be32(max_device_addr & 0xffffffff),
> > > 0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE),
> > > - cpu_to_be32(max_cpus / smp_threads),
> > > + cpu_to_be32(ms->smp.max_cpus / ms->smp.threads),
> > > };
> > > uint32_t maxdomain = cpu_to_be32(spapr->gpu_numa_id > 1 ? 1 : 0);
> > > uint32_t maxdomains[] = {
> > > @@ -2540,7 +2549,7 @@ static void spapr_validate_node_memory(MachineState *machine, Error **errp)
> > > /* find cpu slot in machine->possible_cpus by core_id */
> > > static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
> > > {
> > > - int index = id / smp_threads;
> > > + int index = id / ms->smp.threads;
> > >
> > > if (index >= ms->possible_cpus->len) {
> > > return NULL;
> > > @@ -2553,10 +2562,12 @@ static CPUArchId *spapr_find_cpu_slot(MachineState *ms, uint32_t id, int *idx)
> > >
> > > static void spapr_set_vsmt_mode(SpaprMachineState *spapr, Error **errp)
> > > {
> > > + MachineState *ms = MACHINE(spapr);
> > > Error *local_err = NULL;
> > > bool vsmt_user = !!spapr->vsmt;
> > > int kvm_smt = kvmppc_smt_threads();
> > > int ret;
> > > + unsigned int smp_threads = ms->smp.threads;
> > >
> > > if (!kvm_enabled() && (smp_threads > 1)) {
> > > error_setg(&local_err, "TCG cannot support more than 1 thread/core "
> > > @@ -2630,6 +2641,9 @@ static void spapr_init_cpus(SpaprMachineState *spapr)
> > > SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(machine);
> > > const char *type = spapr_get_cpu_core_type(machine->cpu_type);
> > > const CPUArchIdList *possible_cpus;
> > > + unsigned int smp_cpus = machine->smp.cpus;
> > > + unsigned int smp_threads = machine->smp.threads;
> > > + unsigned int max_cpus = machine->smp.max_cpus;
> > > int boot_cores_nr = smp_cpus / smp_threads;
> > > int i;
> > >
> > > @@ -3856,6 +3870,7 @@ static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
> > > const char *type = object_get_typename(OBJECT(dev));
> > > CPUArchId *core_slot;
> > > int index;
> > > + unsigned int smp_threads = machine->smp.threads;
> > >
> > > if (dev->hotplugged && !mc->has_hotpluggable_cpus) {
> > > error_setg(&local_err, "CPU hotplug not supported for this machine");
> > > @@ -4110,14 +4125,16 @@ spapr_cpu_index_to_props(MachineState *machine, unsigned cpu_index)
> > >
> > > static int64_t spapr_get_default_cpu_node_id(const MachineState *ms, int idx)
> > > {
> > > - return idx / smp_cores % nb_numa_nodes;
> > > + return idx / ms->smp.cores % nb_numa_nodes;
> > > }
> > >
> > > static const CPUArchIdList *spapr_possible_cpu_arch_ids(MachineState *machine)
> > > {
> > > int i;
> > > + unsigned int smp_threads = machine->smp.threads;
> > > + unsigned int smp_cpus = machine->smp.cpus;
> > > const char *core_type;
> > > - int spapr_max_cores = max_cpus / smp_threads;
> > > + int spapr_max_cores = machine->smp.max_cpus / smp_threads;
> > > MachineClass *mc = MACHINE_GET_CLASS(machine);
> > >
> > > if (!mc->has_hotpluggable_cpus) {
> > > @@ -4240,6 +4257,7 @@ int spapr_get_vcpu_id(PowerPCCPU *cpu)
> > > void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp)
> > > {
> > > SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
> > > + MachineState *ms = MACHINE(spapr);
> > > int vcpu_id;
> > >
> > > vcpu_id = spapr_vcpu_id(spapr, cpu_index);
> > > @@ -4248,7 +4266,7 @@ void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp)
> > > error_setg(errp, "Can't create CPU with id %d in KVM", vcpu_id);
> > > error_append_hint(errp, "Adjust the number of cpus to %d "
> > > "or try to raise the number of threads per core\n",
> > > - vcpu_id * smp_threads / spapr->vsmt);
> > > + vcpu_id * ms->smp.threads / spapr->vsmt);
> > > return;
> > > }
> > >
> > > diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
> > > index ee24212765..c9ffe9786c 100644
> > > --- a/hw/ppc/spapr_rtas.c
> > > +++ b/hw/ppc/spapr_rtas.c
> > > @@ -231,6 +231,8 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
> > > target_ulong args,
> > > uint32_t nret, target_ulong rets)
> > > {
> > > + MachineState *ms = MACHINE(qdev_get_machine());
> > > + unsigned int max_cpus = ms->smp.max_cpus;
> > > target_ulong parameter = rtas_ld(args, 0);
> > > target_ulong buffer = rtas_ld(args, 1);
> > > target_ulong length = rtas_ld(args, 2);
> > > @@ -244,7 +246,7 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
> > > "MaxPlatProcs=%d",
> > > max_cpus,
> > > current_machine->ram_size / MiB,
> > > - smp_cpus,
> > > + ms->smp.cpus,
> > > max_cpus);
> > > ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
> > > g_free(param_val);
> >
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [qemu-s390x] [PATCH v3 06/10] hw/s390x: Replace global smp variables with machine smp properties
2019-06-06 2:56 ` Eduardo Habkost
@ 2019-06-06 7:07 ` Christian Borntraeger
2019-06-06 7:56 ` [Qemu-devel] " Cornelia Huck
1 sibling, 0 replies; 32+ messages in thread
From: Christian Borntraeger @ 2019-06-06 7:07 UTC (permalink / raw)
To: Eduardo Habkost, Like Xu
Cc: Peter Maydell, David Hildenbrand, qemu-trivial, Cornelia Huck,
qemu-devel, Dr . David Alan Gilbert, Halil Pasic, qemu-s390x,
Igor Mammedov, Alistair Francis, Richard Henderson
On 06.06.19 04:56, Eduardo Habkost wrote:
> On Sun, May 19, 2019 at 04:54:24AM +0800, Like Xu wrote:
>> The global smp variables in s390x are replaced with smp machine properties.
>>
>> A local variable of the same name would be introduced in the declaration
>> phase if it's used widely in the context OR replace it on the spot if it's
>> only used once. No semantic changes.
>>
>> Signed-off-by: Like Xu <like.xu@linux.intel.com>
>
> CCing s390 maintainers.
>
> Any objections to merging this through the Machine Core tree?
Fine with me.
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
>
>> ---
>> hw/s390x/s390-virtio-ccw.c | 3 ++-
>> hw/s390x/sclp.c | 2 +-
>> target/s390x/cpu.c | 3 +++
>> target/s390x/excp_helper.c | 5 +++++
>> 4 files changed, 11 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
>> index ed1fe7a93e..692ad6e372 100644
>> --- a/hw/s390x/s390-virtio-ccw.c
>> +++ b/hw/s390x/s390-virtio-ccw.c
>> @@ -83,7 +83,7 @@ static void s390_init_cpus(MachineState *machine)
>> /* initialize possible_cpus */
>> mc->possible_cpu_arch_ids(machine);
>>
>> - for (i = 0; i < smp_cpus; i++) {
>> + for (i = 0; i < machine->smp.cpus; i++) {
>> s390x_new_cpu(machine->cpu_type, i, &error_fatal);
>> }
>> }
>> @@ -410,6 +410,7 @@ static CpuInstanceProperties s390_cpu_index_to_props(MachineState *ms,
>> static const CPUArchIdList *s390_possible_cpu_arch_ids(MachineState *ms)
>> {
>> int i;
>> + unsigned int max_cpus = ms->smp.max_cpus;
>>
>> if (ms->possible_cpus) {
>> g_assert(ms->possible_cpus && ms->possible_cpus->len == max_cpus);
>> diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c
>> index 4510a800cb..fac7c3bb6c 100644
>> --- a/hw/s390x/sclp.c
>> +++ b/hw/s390x/sclp.c
>> @@ -64,7 +64,7 @@ static void read_SCP_info(SCLPDevice *sclp, SCCB *sccb)
>> prepare_cpu_entries(sclp, read_info->entries, &cpu_count);
>> read_info->entries_cpu = cpu_to_be16(cpu_count);
>> read_info->offset_cpu = cpu_to_be16(offsetof(ReadInfo, entries));
>> - read_info->highest_cpu = cpu_to_be16(max_cpus - 1);
>> + read_info->highest_cpu = cpu_to_be16(machine->smp.max_cpus - 1);
>>
>> read_info->ibc_val = cpu_to_be32(s390_get_ibc_val());
>>
>> diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
>> index b1df63d82c..f1e5c0d9c3 100644
>> --- a/target/s390x/cpu.c
>> +++ b/target/s390x/cpu.c
>> @@ -37,6 +37,7 @@
>> #include "hw/qdev-properties.h"
>> #ifndef CONFIG_USER_ONLY
>> #include "hw/hw.h"
>> +#include "hw/boards.h"
>> #include "sysemu/arch_init.h"
>> #include "sysemu/sysemu.h"
>> #endif
>> @@ -193,6 +194,8 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
>> }
>>
>> #if !defined(CONFIG_USER_ONLY)
>> + MachineState *ms = MACHINE(qdev_get_machine());
>> + unsigned int max_cpus = ms->smp.max_cpus;
>> if (cpu->env.core_id >= max_cpus) {
>> error_setg(&err, "Unable to add CPU with core-id: %" PRIu32
>> ", maximum core-id: %d", cpu->env.core_id,
>> diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c
>> index 3a467b72c5..1c6938effc 100644
>> --- a/target/s390x/excp_helper.c
>> +++ b/target/s390x/excp_helper.c
>> @@ -31,6 +31,7 @@
>> #ifndef CONFIG_USER_ONLY
>> #include "sysemu/sysemu.h"
>> #include "hw/s390x/s390_flic.h"
>> +#include "hw/boards.h"
>> #endif
>>
>> void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t code,
>> @@ -300,6 +301,10 @@ static void do_ext_interrupt(CPUS390XState *env)
>> g_assert(cpu_addr < S390_MAX_CPUS);
>> lowcore->cpu_addr = cpu_to_be16(cpu_addr);
>> clear_bit(cpu_addr, env->emergency_signals);
>> +#ifndef CONFIG_USER_ONLY
>> + MachineState *ms = MACHINE(qdev_get_machine());
>> + unsigned int max_cpus = ms->smp.max_cpus;
>> +#endif
>> if (bitmap_empty(env->emergency_signals, max_cpus)) {
>> env->pending_int &= ~INTERRUPT_EMERGENCY_SIGNAL;
>> }
>> --
>> 2.21.0
>>
>>
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 06/10] hw/s390x: Replace global smp variables with machine smp properties
2019-06-06 2:56 ` Eduardo Habkost
2019-06-06 7:07 ` [Qemu-devel] [qemu-s390x] " Christian Borntraeger
@ 2019-06-06 7:56 ` Cornelia Huck
1 sibling, 0 replies; 32+ messages in thread
From: Cornelia Huck @ 2019-06-06 7:56 UTC (permalink / raw)
To: Eduardo Habkost
Cc: Peter Maydell, Like Xu, David Hildenbrand, qemu-trivial,
qemu-devel, Dr . David Alan Gilbert, Halil Pasic,
Christian Borntraeger, qemu-s390x, Igor Mammedov,
Alistair Francis, Richard Henderson
On Wed, 5 Jun 2019 23:56:35 -0300
Eduardo Habkost <ehabkost@redhat.com> wrote:
> On Sun, May 19, 2019 at 04:54:24AM +0800, Like Xu wrote:
> > The global smp variables in s390x are replaced with smp machine properties.
> >
> > A local variable of the same name would be introduced in the declaration
> > phase if it's used widely in the context OR replace it on the spot if it's
> > only used once. No semantic changes.
> >
> > Signed-off-by: Like Xu <like.xu@linux.intel.com>
>
> CCing s390 maintainers.
>
> Any objections to merging this through the Machine Core tree?
None at all.
>
> > ---
> > hw/s390x/s390-virtio-ccw.c | 3 ++-
> > hw/s390x/sclp.c | 2 +-
> > target/s390x/cpu.c | 3 +++
> > target/s390x/excp_helper.c | 5 +++++
> > 4 files changed, 11 insertions(+), 2 deletions(-)
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 04/10] hw/ppc: Replace global smp variables with machine smp properties
2019-06-06 3:07 ` David Gibson
@ 2019-06-06 8:20 ` Greg Kurz
2019-06-06 8:37 ` Like Xu
0 siblings, 1 reply; 32+ messages in thread
From: Greg Kurz @ 2019-06-06 8:20 UTC (permalink / raw)
To: David Gibson
Cc: Peter Maydell, Eduardo Habkost, Like Xu, qemu-trivial,
Dr . David Alan Gilbert, qemu-devel, Hervé Poussineau,
Cédric Le Goater, Alistair Francis, Igor Mammedov, qemu-ppc
[-- Attachment #1: Type: text/plain, Size: 2533 bytes --]
On Thu, 6 Jun 2019 13:07:32 +1000
David Gibson <david@gibson.dropbear.id.au> wrote:
> On Wed, Jun 05, 2019 at 11:54:56PM -0300, Eduardo Habkost wrote:
> > On Wed, Jun 05, 2019 at 11:52:41PM -0300, Eduardo Habkost wrote:
> > > On Sun, May 19, 2019 at 04:54:22AM +0800, Like Xu wrote:
> > > > The global smp variables in ppc are replaced with smp machine properties.
> > > >
> > > > A local variable of the same name would be introduced in the declaration
> > > > phase if it's used widely in the context OR replace it on the spot if it's
> > > > only used once. No semantic changes.
> > > >
> > > > Signed-off-by: Like Xu <like.xu@linux.intel.com>
> > >
> > > Any objections from the ppc maintainers to queueing this through
> > > the Machine Core tree?
> >
> > Oops, CCing the ppc maintainers.
>
> No objection here.
>
> Acked-by: David Gibson <david@gibson.dropbear.id.au>
>
Just one nit...
[...]
> > > > diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
> > > > index ee24212765..c9ffe9786c 100644
> > > > --- a/hw/ppc/spapr_rtas.c
> > > > +++ b/hw/ppc/spapr_rtas.c
> > > > @@ -231,6 +231,8 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
> > > > target_ulong args,
> > > > uint32_t nret, target_ulong rets)
> > > > {
> > > > + MachineState *ms = MACHINE(qdev_get_machine());
rtas_ibm_get_system_parameter() has a SpaprMachineState *spapr argument, no
need to rely on qdev_get_machine().
But this can be fixed in a followup patch I guess. Not worth holding the
patchset because of that.
> > > > + unsigned int max_cpus = ms->smp.max_cpus;
> > > > target_ulong parameter = rtas_ld(args, 0);
> > > > target_ulong buffer = rtas_ld(args, 1);
> > > > target_ulong length = rtas_ld(args, 2);
> > > > @@ -244,7 +246,7 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
> > > > "MaxPlatProcs=%d",
> > > > max_cpus,
> > > > current_machine->ram_size / MiB,
> > > > - smp_cpus,
> > > > + ms->smp.cpus,
> > > > max_cpus);
> > > > ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
> > > > g_free(param_val);
> > >
> >
>
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 04/10] hw/ppc: Replace global smp variables with machine smp properties
2019-06-06 8:20 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
@ 2019-06-06 8:37 ` Like Xu
0 siblings, 0 replies; 32+ messages in thread
From: Like Xu @ 2019-06-06 8:37 UTC (permalink / raw)
To: Greg Kurz, David Gibson
Cc: Peter Maydell, Eduardo Habkost, qemu-trivial, qemu-devel,
Dr . David Alan Gilbert, Hervé Poussineau,
Cédric Le Goater, Igor Mammedov, Alistair Francis, qemu-ppc
On 2019/6/6 16:20, Greg Kurz wrote:
> On Thu, 6 Jun 2019 13:07:32 +1000
> David Gibson <david@gibson.dropbear.id.au> wrote:
>
>> On Wed, Jun 05, 2019 at 11:54:56PM -0300, Eduardo Habkost wrote:
>>> On Wed, Jun 05, 2019 at 11:52:41PM -0300, Eduardo Habkost wrote:
>>>> On Sun, May 19, 2019 at 04:54:22AM +0800, Like Xu wrote:
>>>>> The global smp variables in ppc are replaced with smp machine properties.
>>>>>
>>>>> A local variable of the same name would be introduced in the declaration
>>>>> phase if it's used widely in the context OR replace it on the spot if it's
>>>>> only used once. No semantic changes.
>>>>>
>>>>> Signed-off-by: Like Xu <like.xu@linux.intel.com>
>>>>
>>>> Any objections from the ppc maintainers to queueing this through
>>>> the Machine Core tree?
>>>
>>> Oops, CCing the ppc maintainers.
>>
>> No objection here.
>>
>> Acked-by: David Gibson <david@gibson.dropbear.id.au>
>>
>
> Just one nit...
>
> [...]
>
>>>>> diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
>>>>> index ee24212765..c9ffe9786c 100644
>>>>> --- a/hw/ppc/spapr_rtas.c
>>>>> +++ b/hw/ppc/spapr_rtas.c
>>>>> @@ -231,6 +231,8 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
>>>>> target_ulong args,
>>>>> uint32_t nret, target_ulong rets)
>>>>> {
>>>>> + MachineState *ms = MACHINE(qdev_get_machine());
>
> rtas_ibm_get_system_parameter() has a SpaprMachineState *spapr argument, no
> need to rely on qdev_get_machine().
I will fix it in the next (rebased) version. Thank you, Greg.
>
> But this can be fixed in a followup patch I guess. Not worth holding the
> patchset because of that.
>
>>>>> + unsigned int max_cpus = ms->smp.max_cpus;
>>>>> target_ulong parameter = rtas_ld(args, 0);
>>>>> target_ulong buffer = rtas_ld(args, 1);
>>>>> target_ulong length = rtas_ld(args, 2);
>>>>> @@ -244,7 +246,7 @@ static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
>>>>> "MaxPlatProcs=%d",
>>>>> max_cpus,
>>>>> current_machine->ram_size / MiB,
>>>>> - smp_cpus,
>>>>> + ms->smp.cpus,
>>>>> max_cpus);
>>>>> ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
>>>>> g_free(param_val);
>>>>
>>>
>>
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
` (11 preceding siblings ...)
2019-06-06 3:02 ` Eduardo Habkost
@ 2019-06-07 21:25 ` Eduardo Habkost
12 siblings, 0 replies; 32+ messages in thread
From: Eduardo Habkost @ 2019-06-07 21:25 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, qemu-trivial, qemu-devel, Dr . David Alan Gilbert,
Alistair Francis, Igor Mammedov
On Sun, May 19, 2019 at 04:54:18AM +0800, Like Xu wrote:
> This patch series make existing cores/threads/sockets into machine
> properties and get rid of global smp_* variables they use currently.
>
> The purpose of getting rid of globals is disentangle layer violations and
> let's do it one step at a time by replacing the smp_foo with qdev_get_machine()
> as few calls as possible and delay other related refactoring efforts.
Queued on machine-next, thanks!
--
Eduardo
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 05/10] hw/riscv: Replace global smp variables with machine smp properties
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 05/10] hw/riscv: " Like Xu
2019-05-20 21:45 ` Alistair Francis
@ 2019-06-20 14:52 ` Eduardo Habkost
2019-06-21 0:53 ` Like Xu
1 sibling, 1 reply; 32+ messages in thread
From: Eduardo Habkost @ 2019-06-20 14:52 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, qemu-trivial, qemu-devel, Dr . David Alan Gilbert,
Alistair Francis, Igor Mammedov
On Sun, May 19, 2019 at 04:54:23AM +0800, Like Xu wrote:
> The global smp variables in riscv are replaced with smp machine properties.
>
> A local variable of the same name would be introduced in the declaration
> phase if it's used widely in the context OR replace it on the spot if it's
> only used once. No semantic changes.
>
> Signed-off-by: Like Xu <like.xu@linux.intel.com>
> ---
> hw/riscv/sifive_e.c | 6 ++++--
> hw/riscv/sifive_plic.c | 3 +++
> hw/riscv/sifive_u.c | 6 ++++--
> hw/riscv/spike.c | 2 ++
> hw/riscv/virt.c | 1 +
> 5 files changed, 14 insertions(+), 4 deletions(-)
This was incomplete, I had to apply the following fixup.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
hw/riscv/spike.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 9e95f2c13c..d91d49dcae 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -172,6 +172,7 @@ static void spike_board_init(MachineState *machine)
MemoryRegion *main_mem = g_new(MemoryRegion, 1);
MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
int i;
+ unsigned int smp_cpus = machine->smp.cpus;
/* Initialize SOC */
object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH v3 05/10] hw/riscv: Replace global smp variables with machine smp properties
2019-06-20 14:52 ` Eduardo Habkost
@ 2019-06-21 0:53 ` Like Xu
0 siblings, 0 replies; 32+ messages in thread
From: Like Xu @ 2019-06-21 0:53 UTC (permalink / raw)
To: Eduardo Habkost
Cc: Peter Maydell, qemu-trivial, qemu-devel, Dr . David Alan Gilbert,
Alistair Francis, Igor Mammedov
On 2019/6/20 22:52, Eduardo Habkost wrote:
> On Sun, May 19, 2019 at 04:54:23AM +0800, Like Xu wrote:
>> The global smp variables in riscv are replaced with smp machine properties.
>>
>> A local variable of the same name would be introduced in the declaration
>> phase if it's used widely in the context OR replace it on the spot if it's
>> only used once. No semantic changes.
>>
>> Signed-off-by: Like Xu <like.xu@linux.intel.com>
>> ---
>> hw/riscv/sifive_e.c | 6 ++++--
>> hw/riscv/sifive_plic.c | 3 +++
>> hw/riscv/sifive_u.c | 6 ++++--
>> hw/riscv/spike.c | 2 ++
>> hw/riscv/virt.c | 1 +
>> 5 files changed, 14 insertions(+), 4 deletions(-)
>
> This was incomplete, I had to apply the following fixup.
>
> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Like Xu <like.xu@linux.intel.com>
> ---
> hw/riscv/spike.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
> index 9e95f2c13c..d91d49dcae 100644
> --- a/hw/riscv/spike.c
> +++ b/hw/riscv/spike.c
> @@ -172,6 +172,7 @@ static void spike_board_init(MachineState *machine)
> MemoryRegion *main_mem = g_new(MemoryRegion, 1);
> MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
> int i;
> + unsigned int smp_cpus = machine->smp.cpus;
>
> /* Initialize SOC */
> object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
>
^ permalink raw reply [flat|nested] 32+ messages in thread
* [Qemu-devel] [PATCH] fixup! hw/s390x: Replace global smp variables with machine smp properties
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 06/10] hw/s390x: " Like Xu
2019-06-06 2:56 ` Eduardo Habkost
@ 2019-06-28 18:33 ` Eduardo Habkost
2019-06-28 23:04 ` no-reply
1 sibling, 1 reply; 32+ messages in thread
From: Eduardo Habkost @ 2019-06-28 18:33 UTC (permalink / raw)
To: Like Xu
Cc: Peter Maydell, David Hildenbrand, qemu-trivial, Cornelia Huck,
qemu-devel, Dr . David Alan Gilbert, Halil Pasic,
Christian Borntraeger, qemu-s390x, Alistair Francis,
Igor Mammedov, Richard Henderson
On Sun, May 19, 2019 at 04:54:24AM +0800, Like Xu wrote:
> The global smp variables in s390x are replaced with smp machine properties.
>
> A local variable of the same name would be introduced in the declaration
> phase if it's used widely in the context OR replace it on the spot if it's
> only used once. No semantic changes.
>
> Signed-off-by: Like Xu <like.xu@linux.intel.com>
I'm applying the following fixup to address s390x build failures
on machine-next.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
target/s390x/kvm.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c
index 0267c6c2f6..6e814c230b 100644
--- a/target/s390x/kvm.c
+++ b/target/s390x/kvm.c
@@ -119,8 +119,8 @@
* Needs to be big enough to contain max_cpus emergency signals
* and in addition NR_LOCAL_IRQS interrupts
*/
-#define VCPU_IRQ_BUF_SIZE (sizeof(struct kvm_s390_irq) * \
- (max_cpus + NR_LOCAL_IRQS))
+#define VCPU_IRQ_BUF_SIZE(max_cpus) (sizeof(struct kvm_s390_irq) * \
+ (max_cpus + NR_LOCAL_IRQS))
static CPUWatchpoint hw_watchpoint;
/*
@@ -362,9 +362,10 @@ unsigned long kvm_arch_vcpu_id(CPUState *cpu)
int kvm_arch_init_vcpu(CPUState *cs)
{
+ unsigned int max_cpus = MACHINE(qdev_get_machine())->smp.max_cpus;
S390CPU *cpu = S390_CPU(cs);
kvm_s390_set_cpu_state(cpu, cpu->env.cpu_state);
- cpu->irqstate = g_malloc0(VCPU_IRQ_BUF_SIZE);
+ cpu->irqstate = g_malloc0(VCPU_IRQ_BUF_SIZE(max_cpus));
return 0;
}
@@ -1950,9 +1951,10 @@ int kvm_s390_set_cpu_state(S390CPU *cpu, uint8_t cpu_state)
void kvm_s390_vcpu_interrupt_pre_save(S390CPU *cpu)
{
+ unsigned int max_cpus = MACHINE(qdev_get_machine())->smp.max_cpus;
struct kvm_s390_irq_state irq_state = {
.buf = (uint64_t) cpu->irqstate,
- .len = VCPU_IRQ_BUF_SIZE,
+ .len = VCPU_IRQ_BUF_SIZE(max_cpus),
};
CPUState *cs = CPU(cpu);
int32_t bytes;
--
2.18.0.rc1.1.g3f1ff2140
--
Eduardo
^ permalink raw reply related [flat|nested] 32+ messages in thread
* Re: [Qemu-devel] [PATCH] fixup! hw/s390x: Replace global smp variables with machine smp properties
2019-06-28 18:33 ` [Qemu-devel] [PATCH] fixup! " Eduardo Habkost
@ 2019-06-28 23:04 ` no-reply
0 siblings, 0 replies; 32+ messages in thread
From: no-reply @ 2019-06-28 23:04 UTC (permalink / raw)
To: ehabkost
Cc: peter.maydell, like.xu, david, qemu-trivial, cohuck, qemu-devel,
dgilbert, pasic, borntraeger, qemu-s390x, imammedo, alistair23,
rth
Patchew URL: https://patchew.org/QEMU/20190628183321.GE1862@habkost.net/
Hi,
This series failed build test on s390x host. Please find the details below.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD pointing to a commit that has the patches applied on top of "base"
# branch
set -e
echo
echo "=== ENV ==="
env
echo
echo "=== PACKAGES ==="
rpm -qa
echo
echo "=== UNAME ==="
uname -a
CC=$HOME/bin/cc
INSTALL=$PWD/install
BUILD=$PWD/build
mkdir -p $BUILD $INSTALL
SRC=$PWD
cd $BUILD
$SRC/configure --cc=$CC --prefix=$INSTALL
make -j4
# XXX: we need reliable clean up
# make check -j4 V=1
make install
=== TEST SCRIPT END ===
CC s390x-softmmu/target/s390x/sigp.o
CC s390x-softmmu/target/s390x/kvm.o
/var/tmp/patchew-tester-tmp-3de3bowb/src/target/s390x/kvm.c: In function ‘kvm_arch_init_vcpu’:
/var/tmp/patchew-tester-tmp-3de3bowb/src/target/s390x/kvm.c:365:56: error: ‘MachineState’ {aka ‘struct MachineState’} has no member named ‘smp’
365 | unsigned int max_cpus = MACHINE(qdev_get_machine())->smp.max_cpus;
| ^~
/var/tmp/patchew-tester-tmp-3de3bowb/src/target/s390x/kvm.c: In function ‘kvm_s390_vcpu_interrupt_pre_save’:
/var/tmp/patchew-tester-tmp-3de3bowb/src/target/s390x/kvm.c:1954:56: error: ‘MachineState’ {aka ‘struct MachineState’} has no member named ‘smp’
1954 | unsigned int max_cpus = MACHINE(qdev_get_machine())->smp.max_cpus;
| ^~
make[1]: *** [/var/tmp/patchew-tester-tmp-3de3bowb/src/rules.mak:69: target/s390x/kvm.o] Error 1
The full log is available at
http://patchew.org/logs/20190628183321.GE1862@habkost.net/testing.s390x/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
^ permalink raw reply [flat|nested] 32+ messages in thread
end of thread, other threads:[~2019-06-28 23:21 UTC | newest]
Thread overview: 32+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-18 20:54 [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into machine properties Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 01/10] hw/boards: Add struct CpuTopology to MachineState Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 02/10] machine: Refactor smp-related call chains to pass MachineState Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 03/10] general: Replace global smp variables with smp machine properties Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 04/10] hw/ppc: Replace global smp variables with machine smp properties Like Xu
2019-06-06 2:52 ` Eduardo Habkost
2019-06-06 2:54 ` Eduardo Habkost
2019-06-06 3:07 ` David Gibson
2019-06-06 8:20 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2019-06-06 8:37 ` Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 05/10] hw/riscv: " Like Xu
2019-05-20 21:45 ` Alistair Francis
2019-06-20 14:52 ` Eduardo Habkost
2019-06-21 0:53 ` Like Xu
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 06/10] hw/s390x: " Like Xu
2019-06-06 2:56 ` Eduardo Habkost
2019-06-06 7:07 ` [Qemu-devel] [qemu-s390x] " Christian Borntraeger
2019-06-06 7:56 ` [Qemu-devel] " Cornelia Huck
2019-06-28 18:33 ` [Qemu-devel] [PATCH] fixup! " Eduardo Habkost
2019-06-28 23:04 ` no-reply
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 07/10] hw/i386: " Like Xu
2019-06-06 2:57 ` Eduardo Habkost
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 08/10] hw/arm: " Like Xu
2019-06-06 2:58 ` Eduardo Habkost
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 09/10] hw: Replace global smp variables with MachineState for all remaining archs Like Xu
2019-06-06 3:00 ` Eduardo Habkost
2019-05-18 20:54 ` [Qemu-devel] [PATCH v3 10/10] vl.c: Replace smp global variables with smp machine properties Like Xu
2019-06-06 3:00 ` Eduardo Habkost
2019-05-26 13:51 ` [Qemu-devel] [PATCH v3 00/10] Refactor cpu topo into " Like Xu
2019-05-29 0:37 ` Like Xu
2019-06-06 3:02 ` Eduardo Habkost
2019-06-07 21:25 ` Eduardo Habkost
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