qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Cédric Le Goater" <clg@fr.ibm.com>
To: Nicholas Piggin <npiggin@gmail.com>, qemu-ppc@nongnu.org
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>,
	Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>,
	qemu-devel@nongnu.org, Greg Kurz <groug@kaod.org>,
	Ganesh Goudar <ganeshgr@linux.ibm.com>,
	David Gibson <david@gibson.dropbear.id.au>
Subject: Re:  [PATCH 4/5] ppc/spapr: Implement mce injection
Date: Wed, 25 Mar 2020 17:38:03 +0100	[thread overview]
Message-ID: <f05aebe9-4a80-1568-1687-e916bd462639@fr.ibm.com> (raw)
In-Reply-To: <20200325144147.221875-5-npiggin@gmail.com>

On 3/25/20 3:41 PM, Nicholas Piggin wrote:
> This implements mce injection for spapr.
> 
>   (qemu) mce 0 0x200000 0x80 0xdeadbeef 1
> 
>     Disabling lock debugging due to kernel taint
>     MCE: CPU0: machine check (Severe) Host SLB Multihit DAR: 00000000deadbeef [Recovered]
>     MCE: CPU0: machine check (Severe) Host SLB Multihit [Recovered]
>     MCE: CPU0: PID: 495 Comm: a NIP: [0000000130ee07c8]
>     MCE: CPU0: Initiator CPU
>     MCE: CPU0: Unknown
> [   71.567193] MCE: CPU0: NIP: [c0000000000d7f6c] plpar_hcall_norets+0x1c/0x28
> [   71.567249] MCE: CPU0: Initiator CPU
> [   71.567308] MCE: CPU0: Unknown
> 
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>

Reviewed-by: Cédric Le Goater <clg@kaod.org>

> ---
>  hw/ppc/spapr.c         | 54 ++++++++++++++++++++++++++++++++++++++++++
>  include/hw/ppc/spapr.h |  3 +++
>  2 files changed, 57 insertions(+)
> 
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 785c41d205..6dbd1858f4 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -83,6 +83,7 @@
>  #include "hw/ppc/spapr_nvdimm.h"
> 
>  #include "monitor/monitor.h"
> +#include "qapi/qmp/qdict.h"
> 
>  #include <libfdt.h>
> 
> @@ -3420,6 +3421,56 @@ static void spapr_nmi(NMIState *n, int cpu_index, Error **errp)
>      }
>  }
> 
> +typedef struct MCEInjectionParams {
> +    uint64_t srr1_mask;
> +    uint32_t dsisr;
> +    uint64_t dar;
> +    bool recovered;
> +} MCEInjectionParams;
> +
> +static void spapr_do_mce_on_cpu(CPUState *cs, run_on_cpu_data data)
> +{
> +    MCEInjectionParams *params = data.host_ptr;
> +    PowerPCCPU *cpu = POWERPC_CPU(cs);
> +    CPUPPCState *env = &cpu->env;
> +    uint64_t srr1_mce_bits = PPC_BITMASK(42, 45) | PPC_BIT(36);
> +
> +    cpu_synchronize_state(cs);
> +
> +    env->spr[SPR_SRR0] = env->nip;
> +    env->spr[SPR_SRR1] = (env->msr & ~srr1_mce_bits) |
> +                         (params->srr1_mask & srr1_mce_bits);
> +    if (params->dsisr) {
> +        env->spr[SPR_DSISR] = params->dsisr;
> +        env->spr[SPR_DAR] = params->dar;
> +    }
> +
> +    spapr_mce_req_event(cpu, params->recovered);
> +}
> +
> +static void spapr_mce(MCEState *m, const QDict *qdict, Error **errp)
> +{
> +    int cpu_index = qdict_get_int(qdict, "cpu_index");
> +    uint64_t srr1_mask = qdict_get_int(qdict, "srr1_mask");
> +    uint32_t dsisr = qdict_get_int(qdict, "dsisr");
> +    uint64_t dar = qdict_get_int(qdict, "dar");
> +    bool recovered = qdict_get_int(qdict, "recovered");
> +    CPUState *cs;
> +
> +    cs = qemu_get_cpu(cpu_index);
> +
> +    if (cs != NULL) {
> +        MCEInjectionParams params = {
> +            .srr1_mask = srr1_mask,
> +            .dsisr = dsisr,
> +            .dar = dar,
> +            .recovered = recovered,
> +        };
> +
> +        run_on_cpu(cs, spapr_do_mce_on_cpu, RUN_ON_CPU_HOST_PTR(&params));
> +    }
> +}
> +
>  int spapr_lmb_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr,
>                            void *fdt, int *fdt_start_offset, Error **errp)
>  {
> @@ -4467,6 +4518,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
>      SpaprMachineClass *smc = SPAPR_MACHINE_CLASS(oc);
>      FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
>      NMIClass *nc = NMI_CLASS(oc);
> +    MCEClass *mcec = MCE_CLASS(oc);
>      HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
>      PPCVirtualHypervisorClass *vhc = PPC_VIRTUAL_HYPERVISOR_CLASS(oc);
>      XICSFabricClass *xic = XICS_FABRIC_CLASS(oc);
> @@ -4511,6 +4563,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data)
>      smc->resize_hpt_default = SPAPR_RESIZE_HPT_ENABLED;
>      fwc->get_dev_path = spapr_get_fw_dev_path;
>      nc->nmi_monitor_handler = spapr_nmi;
> +    mcec->mce_monitor_handler = spapr_mce;
>      smc->phb_placement = spapr_phb_placement;
>      vhc->hypercall = emulate_spapr_hypercall;
>      vhc->hpt_mask = spapr_hpt_mask;
> @@ -4566,6 +4619,7 @@ static const TypeInfo spapr_machine_info = {
>      .interfaces = (InterfaceInfo[]) {
>          { TYPE_FW_PATH_PROVIDER },
>          { TYPE_NMI },
> +        { TYPE_MCE },
>          { TYPE_HOTPLUG_HANDLER },
>          { TYPE_PPC_VIRTUAL_HYPERVISOR },
>          { TYPE_XICS_FABRIC },
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index 42d64a0368..72f86a2ee8 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -929,4 +929,7 @@ void spapr_check_pagesize(SpaprMachineState *spapr, hwaddr pagesize,
> 
>  void spapr_set_all_lpcrs(target_ulong value, target_ulong mask);
>  hwaddr spapr_get_rtas_addr(void);
> +
> +void spapr_mce_inject(CPUState *cs, uint64_t srr1_mask, uint32_t dsisr,
> +                      uint64_t dar, bool recovered);
>  #endif /* HW_SPAPR_H */
> 



  reply	other threads:[~2020-03-25 16:38 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-25 14:41 [PATCH 0/5] ppc: sreset and machine check injection Nicholas Piggin
2020-03-25 14:41 ` [PATCH 1/5] ppc/spapr: tweak change system reset helper Nicholas Piggin
2020-03-25 16:14   ` [EXTERNAL] " Cédric Le Goater
2020-03-26  0:04   ` David Gibson
2020-03-25 14:41 ` [PATCH 2/5] ppc/pnv: Add support for NMI interface Nicholas Piggin
2020-03-25 16:38   ` Cédric Le Goater
2020-04-03  7:57     ` Nicholas Piggin
2020-04-03 13:12       ` Nicholas Piggin
2020-04-03 15:47         ` Cédric Le Goater
2020-04-04  1:58           ` Nicholas Piggin
2020-03-26  0:15   ` David Gibson
2020-03-31  3:07   ` Alexey Kardashevskiy
2020-03-31  3:14     ` David Gibson
2020-03-25 14:41 ` [PATCH 3/5] nmi: add MCE class for implementing machine check injection commands Nicholas Piggin
2020-03-25 16:46   ` Cédric Le Goater
2020-03-31  0:22   ` David Gibson
2020-04-03  8:04     ` Nicholas Piggin
2020-04-06  6:45       ` David Gibson
2020-03-25 14:41 ` [PATCH 4/5] ppc/spapr: Implement mce injection Nicholas Piggin
2020-03-25 16:38   ` Cédric Le Goater [this message]
2020-03-25 14:41 ` [PATCH 5/5] ppc/pnv: " Nicholas Piggin
2020-03-25 16:39   ` [EXTERNAL] " Cédric Le Goater
2020-04-03  8:07     ` Nicholas Piggin
2020-03-25 16:42 ` [PATCH 0/5] ppc: sreset and machine check injection Cédric Le Goater

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=f05aebe9-4a80-1568-1687-e916bd462639@fr.ibm.com \
    --to=clg@fr.ibm.com \
    --cc=aik@ozlabs.ru \
    --cc=david@gibson.dropbear.id.au \
    --cc=ganeshgr@linux.ibm.com \
    --cc=groug@kaod.org \
    --cc=mahesh@linux.vnet.ibm.com \
    --cc=npiggin@gmail.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).