* [PATCH v3 0/2] target/m68k: fix physical address translation in m68k_cpu_get_phys_page_debug()
@ 2020-06-30 11:27 Mark Cave-Ayland
2020-06-30 11:27 ` [PATCH v3 1/2] " Mark Cave-Ayland
2020-06-30 11:27 ` [PATCH v3 2/2] target/m68k: consolidate physical translation offset into get_physical_address() Mark Cave-Ayland
0 siblings, 2 replies; 5+ messages in thread
From: Mark Cave-Ayland @ 2020-06-30 11:27 UTC (permalink / raw)
To: qemu-devel, laurent
The first patch in the series fixes the original bug, whilst the second patch
implements the suggestion by Philippe to consolidate the translation offset
logic into get_physical_address() itself now that all callers are identical.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
v3:
- Fix Transparent Translation as indicated by Laurent
- Always apply TARGET_PAGE_MASK to tlb_set_page() parameters
v2:
- Add R-B tags from Philippe and Laurent
- Add patch 2 to consolidate the translation offset logic into get_physical_address()
Mark Cave-Ayland (2):
target/m68k: fix physical address translation in
m68k_cpu_get_phys_page_debug()
target/m68k: consolidate physical translation offset into
get_physical_address()
target/m68k/helper.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
--
2.20.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3 1/2] target/m68k: fix physical address translation in m68k_cpu_get_phys_page_debug()
2020-06-30 11:27 [PATCH v3 0/2] target/m68k: fix physical address translation in m68k_cpu_get_phys_page_debug() Mark Cave-Ayland
@ 2020-06-30 11:27 ` Mark Cave-Ayland
2020-06-30 11:27 ` [PATCH v3 2/2] target/m68k: consolidate physical translation offset into get_physical_address() Mark Cave-Ayland
1 sibling, 0 replies; 5+ messages in thread
From: Mark Cave-Ayland @ 2020-06-30 11:27 UTC (permalink / raw)
To: qemu-devel, laurent
The result of the get_physical_address() function should be combined with the
offset of the original page access before being returned. Otherwise the
m68k_cpu_get_phys_page_debug() function can round to the wrong page causing
incorrect lookups in gdbstub and various "Disassembler disagrees with
translator over instruction decoding" warnings to appear at translation time.
Fixes: 88b2fef6c3 ("target/m68k: add MC68040 MMU")
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/helper.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 79b0b10ea9..631eab7774 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -820,10 +820,14 @@ hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
if (env->sr & SR_S) {
access_type |= ACCESS_SUPER;
}
+
if (get_physical_address(env, &phys_addr, &prot,
addr, access_type, &page_size) != 0) {
return -1;
}
+
+ addr &= TARGET_PAGE_MASK;
+ phys_addr += addr & (page_size - 1);
return phys_addr;
}
--
2.20.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v3 2/2] target/m68k: consolidate physical translation offset into get_physical_address()
2020-06-30 11:27 [PATCH v3 0/2] target/m68k: fix physical address translation in m68k_cpu_get_phys_page_debug() Mark Cave-Ayland
2020-06-30 11:27 ` [PATCH v3 1/2] " Mark Cave-Ayland
@ 2020-06-30 11:27 ` Mark Cave-Ayland
2020-06-30 21:20 ` Laurent Vivier
1 sibling, 1 reply; 5+ messages in thread
From: Mark Cave-Ayland @ 2020-06-30 11:27 UTC (permalink / raw)
To: qemu-devel, laurent
Since all callers to get_physical_address() now apply the same page offset to
the translation result, move the logic into get_physical_address() itself to
avoid duplication.
Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
---
target/m68k/helper.c | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 631eab7774..71c2376910 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -643,7 +643,7 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
/* Transparent Translation Register bit */
env->mmu.mmusr = M68K_MMU_T_040 | M68K_MMU_R_040;
}
- *physical = address & TARGET_PAGE_MASK;
+ *physical = address;
*page_size = TARGET_PAGE_SIZE;
return 0;
}
@@ -771,7 +771,8 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
}
*page_size = 1 << page_bits;
page_mask = ~(*page_size - 1);
- *physical = next & page_mask;
+ address &= TARGET_PAGE_MASK;
+ *physical = (next & page_mask) + (address & (*page_size - 1));
if (access_type & ACCESS_PTEST) {
env->mmu.mmusr |= next & M68K_MMU_SR_MASK_040;
@@ -826,8 +827,6 @@ hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
return -1;
}
- addr &= TARGET_PAGE_MASK;
- phys_addr += addr & (page_size - 1);
return phys_addr;
}
@@ -891,10 +890,8 @@ bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
ret = get_physical_address(&cpu->env, &physical, &prot,
address, access_type, &page_size);
if (likely(ret == 0)) {
- address &= TARGET_PAGE_MASK;
- physical += address & (page_size - 1);
- tlb_set_page(cs, address, physical,
- prot, mmu_idx, TARGET_PAGE_SIZE);
+ tlb_set_page(cs, address & TARGET_PAGE_MASK,
+ physical & TARGET_PAGE_MASK, prot, mmu_idx, page_size);
return true;
}
@@ -1383,9 +1380,8 @@ void HELPER(ptest)(CPUM68KState *env, uint32_t addr, uint32_t is_read)
ret = get_physical_address(env, &physical, &prot, addr,
access_type, &page_size);
if (ret == 0) {
- addr &= TARGET_PAGE_MASK;
- physical += addr & (page_size - 1);
- tlb_set_page(env_cpu(env), addr, physical,
+ tlb_set_page(env_cpu(env), addr & TARGET_PAGE_MASK,
+ physical & TARGET_PAGE_MASK,
prot, access_type & ACCESS_SUPER ?
MMU_KERNEL_IDX : MMU_USER_IDX, page_size);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v3 2/2] target/m68k: consolidate physical translation offset into get_physical_address()
2020-06-30 11:27 ` [PATCH v3 2/2] target/m68k: consolidate physical translation offset into get_physical_address() Mark Cave-Ayland
@ 2020-06-30 21:20 ` Laurent Vivier
2020-07-01 19:52 ` Mark Cave-Ayland
0 siblings, 1 reply; 5+ messages in thread
From: Laurent Vivier @ 2020-06-30 21:20 UTC (permalink / raw)
To: Mark Cave-Ayland, qemu-devel
Le 30/06/2020 à 13:27, Mark Cave-Ayland a écrit :
> Since all callers to get_physical_address() now apply the same page offset to
> the translation result, move the logic into get_physical_address() itself to
> avoid duplication.
>
> Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> ---
> target/m68k/helper.c | 18 +++++++-----------
> 1 file changed, 7 insertions(+), 11 deletions(-)
>
> diff --git a/target/m68k/helper.c b/target/m68k/helper.c
> index 631eab7774..71c2376910 100644
> --- a/target/m68k/helper.c
> +++ b/target/m68k/helper.c
> @@ -643,7 +643,7 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
> /* Transparent Translation Register bit */
> env->mmu.mmusr = M68K_MMU_T_040 | M68K_MMU_R_040;
> }
> - *physical = address & TARGET_PAGE_MASK;
> + *physical = address;
> *page_size = TARGET_PAGE_SIZE;
> return 0;
> }
> @@ -771,7 +771,8 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
> }
> *page_size = 1 << page_bits;
> page_mask = ~(*page_size - 1);
> - *physical = next & page_mask;
> + address &= TARGET_PAGE_MASK;
I don't think you need TARGET_PAGE_MASK here:
- TARGET_PAGE_MASK is 4096
- page_mask is either 4096 or 8192
> + *physical = (next & page_mask) + (address & (*page_size - 1));
>
> if (access_type & ACCESS_PTEST) {
> env->mmu.mmusr |= next & M68K_MMU_SR_MASK_040;
> @@ -826,8 +827,6 @@ hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
> return -1;
> }
>
> - addr &= TARGET_PAGE_MASK;
> - phys_addr += addr & (page_size - 1);
> return phys_addr;
> }
>
> @@ -891,10 +890,8 @@ bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> ret = get_physical_address(&cpu->env, &physical, &prot,
> address, access_type, &page_size);
> if (likely(ret == 0)) {
> - address &= TARGET_PAGE_MASK;
> - physical += address & (page_size - 1);
> - tlb_set_page(cs, address, physical,
> - prot, mmu_idx, TARGET_PAGE_SIZE);
> + tlb_set_page(cs, address & TARGET_PAGE_MASK,
> + physical & TARGET_PAGE_MASK, prot, mmu_idx, page_size);
I had a look to tl_set_page() to see how it manages the entry when the
addresses are not aligned to page_size, and it calls
tlb_set_page_with_attrs() where we have a comment:
/* Add a new TLB entry. At most one entry for a given virtual address
* is permitted. Only a single TARGET_PAGE_SIZE region is mapped, the
* supplied size is only used by tlb_flush_page.
...
So I think it's correct to use TARGET_PAGE_MASK and page_size.
Thanks,
Laurent
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3 2/2] target/m68k: consolidate physical translation offset into get_physical_address()
2020-06-30 21:20 ` Laurent Vivier
@ 2020-07-01 19:52 ` Mark Cave-Ayland
0 siblings, 0 replies; 5+ messages in thread
From: Mark Cave-Ayland @ 2020-07-01 19:52 UTC (permalink / raw)
To: Laurent Vivier, qemu-devel
On 30/06/2020 22:20, Laurent Vivier wrote:
> Le 30/06/2020 à 13:27, Mark Cave-Ayland a écrit :
>> Since all callers to get_physical_address() now apply the same page offset to
>> the translation result, move the logic into get_physical_address() itself to
>> avoid duplication.
>>
>> Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
>> ---
>> target/m68k/helper.c | 18 +++++++-----------
>> 1 file changed, 7 insertions(+), 11 deletions(-)
>>
>> diff --git a/target/m68k/helper.c b/target/m68k/helper.c
>> index 631eab7774..71c2376910 100644
>> --- a/target/m68k/helper.c
>> +++ b/target/m68k/helper.c
>> @@ -643,7 +643,7 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
>> /* Transparent Translation Register bit */
>> env->mmu.mmusr = M68K_MMU_T_040 | M68K_MMU_R_040;
>> }
>> - *physical = address & TARGET_PAGE_MASK;
>> + *physical = address;
>> *page_size = TARGET_PAGE_SIZE;
>> return 0;
>> }
>> @@ -771,7 +771,8 @@ static int get_physical_address(CPUM68KState *env, hwaddr *physical,
>> }
>> *page_size = 1 << page_bits;
>> page_mask = ~(*page_size - 1);
>> - *physical = next & page_mask;
>> + address &= TARGET_PAGE_MASK;
>
> I don't think you need TARGET_PAGE_MASK here:
> - TARGET_PAGE_MASK is 4096
> - page_mask is either 4096 or 8192
Ah yes, of course - that will get handled fine by the statement below.
>> + *physical = (next & page_mask) + (address & (*page_size - 1));
>>
>> if (access_type & ACCESS_PTEST) {
>> env->mmu.mmusr |= next & M68K_MMU_SR_MASK_040;
>> @@ -826,8 +827,6 @@ hwaddr m68k_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
>> return -1;
>> }
>>
>> - addr &= TARGET_PAGE_MASK;
>> - phys_addr += addr & (page_size - 1);
>> return phys_addr;
>> }
>>
>> @@ -891,10 +890,8 @@ bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>> ret = get_physical_address(&cpu->env, &physical, &prot,
>> address, access_type, &page_size);
>> if (likely(ret == 0)) {
>> - address &= TARGET_PAGE_MASK;
>> - physical += address & (page_size - 1);
>> - tlb_set_page(cs, address, physical,
>> - prot, mmu_idx, TARGET_PAGE_SIZE);
>> + tlb_set_page(cs, address & TARGET_PAGE_MASK,
>> + physical & TARGET_PAGE_MASK, prot, mmu_idx, page_size);
>
> I had a look to tl_set_page() to see how it manages the entry when the
> addresses are not aligned to page_size, and it calls
> tlb_set_page_with_attrs() where we have a comment:
>
> /* Add a new TLB entry. At most one entry for a given virtual address
> * is permitted. Only a single TARGET_PAGE_SIZE region is mapped, the
> * supplied size is only used by tlb_flush_page.
> ...
>
> So I think it's correct to use TARGET_PAGE_MASK and page_size.
Indeed, it certainly agrees with the documentation and what the majority of the
callers are doing - I'm just surprised that tlb_set_page_with_attrs() doesn't
assert() if any bits below TARGET_PAGE_MASK are set, rather than masking both vaddr
and paddr itself. But I'm happy with this part anyhow.
ATB,
Mark.
^ permalink raw reply [flat|nested] 5+ messages in thread
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2020-06-30 11:27 [PATCH v3 0/2] target/m68k: fix physical address translation in m68k_cpu_get_phys_page_debug() Mark Cave-Ayland
2020-06-30 11:27 ` [PATCH v3 1/2] " Mark Cave-Ayland
2020-06-30 11:27 ` [PATCH v3 2/2] target/m68k: consolidate physical translation offset into get_physical_address() Mark Cave-Ayland
2020-06-30 21:20 ` Laurent Vivier
2020-07-01 19:52 ` Mark Cave-Ayland
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