Re: [Qemu-devel] [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1

From: Palmer Dabbelt <palmer@sifive.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1
Date: Fri, 13 Sep 2019 07:17:33 -0700 (PDT)	[thread overview]
Message-ID: <mhng-89941bf7-1034-44fe-956f-a949910f2b52@palmer-si-x1e> (raw)
In-Reply-To: <CAFEAcA94wuW4koj9+v4bbNH+omZQfqkw=JMUjvyDwbu_Eevgag@mail.gmail.com>

On Fri, 13 Sep 2019 02:17:32 PDT (-0700), Peter Maydell wrote:
> On Wed, 11 Sep 2019 at 09:24, Palmer Dabbelt <palmer@sifive.com> wrote:
>>
>> The following changes since commit 89ea03a7dc83ca36b670ba7f787802791fcb04b1:
>>
>>   Merge remote-tracking branch 'remotes/huth-gitlab/tags/m68k-pull-2019-09-07' into staging (2019-09-09 09:48:34 +0100)
>>
>> are available in the Git repository at:
>>
>>   git://github.com/palmer-dabbelt/qemu.git tags/riscv-for-master-4.2-sf1
>>
>> for you to fetch changes up to 1b2d0961bfaaa2db3a237f53273527b6c5e3498a:
>>
>>   target/riscv: Use TB_FLAGS_MSTATUS_FS for floating point (2019-09-10 06:08:42 -0700)
>>
>> ----------------------------------------------------------------
>> RISC-V Patches for the 4.2 Soft Freeze, Part 1
>>
>> This contains quite a few patches that I'd like to target for 4.2.
>> They're mostly emulation fixes for the sifive_u board, which now much
>> more closely matches the hardware and can therefor run the same fireware
>> as what gets loaded onto the board.  Additional user-visible
>> improvements include:
>>
>> * support for loading initrd files from the command line into Linux, via
>>   /chosen/linux,initrd-{start,end} device tree nodes.
>> * The conversion of LOG_TRACE to trace events.
>> * The addition of clock DT nodes for our uart and ethernet.
>>
>> This also includes some preliminary work for the H extension patches,
>> but does not include the H extension patches as I haven't had time to
>> review them yet.
>>
>> This passes my OE boot test on 32-bit and 64-bit virt machines, as well
>> as a 64-bit upstream Linux boot on the sifive_u machine.
>>
>
> Hi; this fails 'make check' on all platforms:
>
> MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}
> QTEST_QEMU_BINARY=riscv32-softmmu/qemu-system-riscv32
> QTEST_QEMU_IMG=qemu-img t
> ests/qom-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl
> --test-name="qom-test"
> PASS 1 qom-test /riscv32/qom/spike
> PASS 2 qom-test /riscv32/qom/virt
> PASS 3 qom-test /riscv32/qom/none
> PASS 4 qom-test /riscv32/qom/spike_v1.10
> qemu-system-riscv32: Invalid SMP CPUs 1. The min CPUs supported by
> machine 'sifive_u' is 2
> socket_accept failed: Resource temporarily unavailable
> **
> ERROR:/home/petmay01/linaro/qemu-for-merges/tests/libqtest.c:266:qtest_init_without_qmp_handshake:
> assertion failed: (s->fd >= 0 && s->qmp_fd >= 0)
> /home/petmay01/linaro/qemu-for-merges/tests/libqtest.c:135:
> kill_qemu() tried to terminate QEMU process but encountered exit
> status 1
> ERROR - Bail out!
> ERROR:/home/petmay01/linaro/qemu-for-merges/tests/libqtest.c:266:qtest_init_without_qmp_handshake:
> assertion failed: (s->fd >= 0 && s->qmp_fd >= 0)
> Aborted (core dumped)
> /home/petmay01/linaro/qemu-for-merges/tests/Makefile.include:900:
> recipe for target 'check-qtest-riscv32' failed

Sorry about that, I ran the tests on the wrong branch.  I'll submit another PR 
with the issue fixed.