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From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 32/36] drm/i915: move fdi lane configuration checks ahead
Date: Thu, 21 Feb 2013 01:50:24 +0100	[thread overview]
Message-ID: <1361407828-2419-33-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <1361407828-2419-1-git-send-email-daniel.vetter@ffwll.ch>

This nicely allows us to drop some hacks which have only been used
to work around modeset failures due to lack of fdi lanes.

v2: Implement proper checking for Haswell platforms - the fdi link to
the LPT PCH has only 2 lanes.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_display.c | 132 +++++++++++++++++------------------
 1 file changed, 65 insertions(+), 67 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index acd6d5a..729c62a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3752,9 +3752,68 @@ bool intel_connector_get_hw_state(struct intel_connector *connector)
 	return encoder->get_hw_state(encoder, &pipe);
 }
 
-static void ironlake_fdi_compute_config(struct drm_device *dev,
+static bool ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe,
+				     struct intel_crtc_config *pipe_config)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *pipe_B_crtc =
+		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_B]);
+
+	DRM_DEBUG_KMS("checking fdi config on pipe %i, lanes %i\n",
+		      pipe, pipe_config->fdi_lanes);
+	if (pipe_config->fdi_lanes > 4) {
+		DRM_DEBUG_KMS("invalid fdi lane config on pipe %i: %i lanes\n",
+			      pipe, pipe_config->fdi_lanes);
+		return false;
+	}
+
+	if (IS_HASWELL(dev)) {
+		if (pipe_config->fdi_lanes > 2) {
+			DRM_DEBUG_KMS("only 2 lanes on haswell, required: %i lanes\n",
+				      pipe_config->fdi_lanes);
+			return false;
+		} else {
+			return true;
+		}
+	}
+
+	if (dev_priv->num_pipe == 2)
+		return true;
+
+	/* Ivybridge 3 pipe is really complicated */
+	switch (pipe) {
+	case PIPE_A:
+		return true;
+	case PIPE_B:
+		if (dev_priv->pipe_to_crtc_mapping[PIPE_C]->enabled &&
+		    pipe_config->fdi_lanes > 2) {
+			DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %i: %i lanes\n",
+				      pipe, pipe_config->fdi_lanes);
+			return false;
+		}
+		return true;
+	case PIPE_C:
+		if (!pipe_B_crtc->base.enabled ||
+		    pipe_B_crtc->config.fdi_lanes <= 2) {
+			if (pipe_config->fdi_lanes > 2) {
+				DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %i: %i lanes\n",
+					      pipe, pipe_config->fdi_lanes);
+				return false;
+			}
+		} else {
+			DRM_DEBUG_KMS("fdi link B uses too many lanes to enable link C\n");
+			return false;
+		}
+		return true;
+	default:
+		BUG();
+	}
+}
+
+static bool ironlake_fdi_compute_config(struct intel_crtc *intel_crtc,
 					struct intel_crtc_config *pipe_config)
 {
+	struct drm_device *dev = intel_crtc->base.dev;
 	struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
 	int target_clock, lane, link_bw;
 
@@ -3781,6 +3840,9 @@ static void ironlake_fdi_compute_config(struct drm_device *dev,
 		link_bw *= pipe_config->pixel_multiplier;
 	intel_link_compute_m_n(pipe_config->pipe_bpp, lane, target_clock,
 			       link_bw, &pipe_config->fdi_m_n);
+
+	return ironlake_check_fdi_lanes(intel_crtc->base.dev,
+					intel_crtc->pipe, pipe_config);
 }
 
 static bool intel_crtc_compute_config(struct drm_crtc *crtc,
@@ -3817,7 +3879,7 @@ static bool intel_crtc_compute_config(struct drm_crtc *crtc,
 	}
 
 	if (pipe_config->has_pch_encoder)
-		ironlake_fdi_compute_config(dev, pipe_config);
+		return ironlake_fdi_compute_config(to_intel_crtc(crtc), pipe_config);
 
 	return true;
 }
@@ -5040,66 +5102,6 @@ static void cpt_enable_fdi_bc_bifurcation(struct drm_device *dev)
 	POSTING_READ(SOUTH_CHICKEN1);
 }
 
-static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc)
-{
-	struct drm_device *dev = intel_crtc->base.dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
-	struct intel_crtc *pipe_B_crtc =
-		to_intel_crtc(dev_priv->pipe_to_crtc_mapping[PIPE_B]);
-
-	DRM_DEBUG_KMS("checking fdi config on pipe %i, lanes %i\n",
-		      intel_crtc->pipe, intel_crtc->config.fdi_lanes);
-	if (intel_crtc->config.fdi_lanes > 4) {
-		DRM_DEBUG_KMS("invalid fdi lane config on pipe %i: %i lanes\n",
-			      intel_crtc->pipe, intel_crtc->config.fdi_lanes);
-		/* Clamp lanes to avoid programming the hw with bogus values. */
-		intel_crtc->config.fdi_lanes = 4;
-
-		return false;
-	}
-
-	if (dev_priv->num_pipe == 2)
-		return true;
-
-	switch (intel_crtc->pipe) {
-	case PIPE_A:
-		return true;
-	case PIPE_B:
-		if (dev_priv->pipe_to_crtc_mapping[PIPE_C]->enabled &&
-		    intel_crtc->config.fdi_lanes > 2) {
-			DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %i: %i lanes\n",
-				      intel_crtc->pipe,
-				      intel_crtc->config.fdi_lanes);
-			/* Clamp lanes to avoid programming the hw with bogus values. */
-			intel_crtc->config.fdi_lanes = 2;
-
-			return false;
-		}
-
-		return true;
-	case PIPE_C:
-		if (!pipe_B_crtc->base.enabled ||
-		    pipe_B_crtc->config.fdi_lanes <= 2) {
-			if (intel_crtc->config.fdi_lanes > 2) {
-				DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %i: %i lanes\n",
-					      intel_crtc->pipe,
-					      intel_crtc->config.fdi_lanes);
-				/* Clamp lanes to avoid programming the hw with bogus values. */
-				intel_crtc->config.fdi_lanes = 2;
-
-				return false;
-			}
-		} else {
-			DRM_DEBUG_KMS("fdi link B uses too many lanes to enable link C\n");
-			return false;
-		}
-
-		return true;
-	default:
-		BUG();
-	}
-}
-
 static void ivybridge_update_fdi_bc_bifurcation(struct intel_crtc *intel_crtc)
 {
 	struct drm_device *dev = intel_crtc->base.dev;
@@ -5282,7 +5284,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
 	bool is_lvds = false;
 	struct intel_encoder *encoder;
 	int ret;
-	bool fdi_config_ok;
 
 	for_each_encoder_on_crtc(dev, crtc, encoder) {
 		switch (encoder->type) {
@@ -5374,14 +5375,11 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
 
 	intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
 
-	/* Note, this also computes intel_crtc->fdi_lanes which is used below in
-	 * ironlake_check_fdi_lanes. */
 	if (intel_crtc->config.has_pch_encoder) {
 		intel_cpu_transcoder_set_m_n(intel_crtc,
 					     &intel_crtc->config.fdi_m_n);
 	}
 
-	fdi_config_ok = ironlake_check_fdi_lanes(intel_crtc);
 	if (IS_IVYBRIDGE(dev))
 		ivybridge_update_fdi_bc_bifurcation(intel_crtc);
 
@@ -5399,7 +5397,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
 
 	intel_update_linetime_watermarks(dev, pipe, adjusted_mode);
 
-	return fdi_config_ok ? ret : -EINVAL;
+	return ret;
 }
 
 static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
-- 
1.7.11.4

  parent reply	other threads:[~2013-02-21  0:51 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-02-21  0:49 [PATCH 00/36] introduce pipe_config with fdi auto-dithering Daniel Vetter
2013-02-21  0:49 ` [PATCH 01/36] drm/i915: introduce struct intel_crtc_config Daniel Vetter
2013-02-21 14:38   ` Ville Syrjälä
2013-02-21  0:49 ` [PATCH 02/36] drm/i915: compute pipe_config earlier Daniel Vetter
2013-02-21  0:49 ` [PATCH 03/36] drm/i915: add pipe_config->timings_set Daniel Vetter
2013-02-21  0:49 ` [PATCH 04/36] drm/i915: add pipe_config->pixel_multiplier Daniel Vetter
2013-02-21  0:49 ` [PATCH 05/36] drm/i915: add pipe_config->has_pch_encoder Daniel Vetter
2013-02-21  0:49 ` [PATCH 06/36] drm/i915: clear up the fdi/dp set_m_n confusion Daniel Vetter
2013-02-21  0:49 ` [PATCH 07/36] drm/i915: move pipe bpp computation to pipe_config Daniel Vetter
2013-02-21 14:49   ` Ville Syrjälä
2013-02-21 14:54     ` Daniel Vetter
2013-02-21  0:50 ` [PATCH 08/36] drm/i915: clean up plane bpp confusion Daniel Vetter
2013-02-21  0:50 ` [PATCH 09/36] drm/i915: clean up pipe " Daniel Vetter
2013-02-21  0:50 ` [PATCH 10/36] drm/i915: move dp_m_n computation to dp_encoder->compute_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 11/36] drm/i915: track dp target_clock in pipe_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 12/36] drm/i915: rip out superflous is_dp&is_cpu_edp tracking Daniel Vetter
2013-02-21  0:50 ` [PATCH 13/36] drm/i915: add hw state readout/checking for pipe_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 14/36] drm/i915: hw readout support for ->has_pch_encoders Daniel Vetter
2013-02-21  0:50 ` [PATCH 15/36] drm/i915: gen2 has no tv out support Daniel Vetter
2013-02-21  0:50 ` [PATCH 16/36] drm/i915: create pipe_config->dpll for clock state Daniel Vetter
2013-02-21  0:50 ` [PATCH 17/36] drm/i915: move dp clock computations to encoder->compute_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 18/36] drm/i915: add pipe_config->limited_color_range Daniel Vetter
2013-02-21  0:50 ` [PATCH 19/36] drm/i915: use pipe_config for lvds dithering Daniel Vetter
2013-02-21  0:50 ` [PATCH 20/36] drm/i915: move intel_crtc->fdi_lanes to pipe_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 21/36] drm/i915: fixup 12bpc hdmi dotclock handling Daniel Vetter
2013-02-21  0:50 ` [PATCH 22/36] drm/i915: hw state readout support for pipe_config->fdi_lanes Daniel Vetter
2013-02-21  0:50 ` [PATCH 23/36] drm/i915: split up fdi_set_m_n into computation and hw setup Daniel Vetter
2013-02-21  0:50 ` [PATCH 24/36] drm/i915: Disable high-bpc on pre-1.4 EDID screens Daniel Vetter
2013-02-21  0:50 ` [PATCH 25/36] drm/i915: force bpp for eDP panels Daniel Vetter
2013-02-21  0:50 ` [PATCH 26/36] drm/i915: allow high-bpc modes on DP Daniel Vetter
2013-02-21  0:50 ` [PATCH 27/36] drm/i915: extract i9xx_set_pipeconf Daniel Vetter
2013-02-21  0:50 ` [PATCH 28/36] drm/i915: drop adjusted_mode from *_set_pipeconf functions Daniel Vetter
2013-02-21  0:50 ` [PATCH 29/36] drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv Daniel Vetter
2013-02-21  0:50 ` [PATCH 30/36] drm/i915: compute fdi lane config earlier Daniel Vetter
2013-02-21  0:50 ` [PATCH 31/36] drm/i915: Split up ironlake_check_fdi_lanes Daniel Vetter
2013-02-21  0:50 ` Daniel Vetter [this message]
2013-02-21  0:50 ` [PATCH 33/36] drm/i915: don't count cpu ports for fdi B/C lane sharing Daniel Vetter
2013-02-21 10:28   ` Chris Wilson
2013-02-21 13:43     ` [PATCH] " Daniel Vetter
2013-02-21  0:50 ` [PATCH 34/36] drm/i915: consolidate pch pll computations a bit Daniel Vetter
2013-02-21  0:50 ` [PATCH 35/36] drm/i915: drop haswell fdi lane check from intel_crt_mode_valid Daniel Vetter
2013-02-21  0:50 ` [PATCH 36/36] drm/i915: implement fdi auto-dithering Daniel Vetter

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