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From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 34/36] drm/i915: consolidate pch pll computations a bit
Date: Thu, 21 Feb 2013 01:50:26 +0100	[thread overview]
Message-ID: <1361407828-2419-35-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <1361407828-2419-1-git-send-email-daniel.vetter@ffwll.ch>

We need the dpll/fp/fp2 values only when we need a pch pll. So move
them together with the code to acquire such a pll.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_display.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 58f1e35..a4e9bde 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5285,7 +5285,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
 	int plane = intel_crtc->plane;
 	int num_connectors = 0;
 	intel_clock_t clock, reduced_clock;
-	u32 dpll, fp = 0, fp2 = 0;
+	u32 dpll = 0, fp = 0, fp2 = 0;
 	bool ok, has_reduced_clock = false;
 	bool is_lvds = false;
 	struct intel_encoder *encoder;
@@ -5324,13 +5324,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
 	/* Ensure that the cursor is valid for the new mode before changing... */
 	intel_crtc_update_cursor(crtc, true);
 
-	fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
-	if (has_reduced_clock)
-		fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
-			reduced_clock.m2;
-
-	dpll = ironlake_compute_dpll(intel_crtc, &clock, fp);
-
 	DRM_DEBUG_KMS("Mode for pipe %d:\n", pipe);
 	drm_mode_debug_printmodeline(mode);
 
@@ -5338,6 +5331,13 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
 	if (intel_crtc->config.has_pch_encoder) {
 		struct intel_pch_pll *pll;
 
+		fp = clock.n << 16 | clock.m1 << 8 | clock.m2;
+		if (has_reduced_clock)
+			fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
+				reduced_clock.m2;
+
+		dpll = ironlake_compute_dpll(intel_crtc, &clock, fp);
+
 		pll = intel_get_pch_pll(intel_crtc, dpll, fp);
 		if (pll == NULL) {
 			DRM_DEBUG_DRIVER("failed to find PLL for pipe %d\n",
-- 
1.7.11.4

  parent reply	other threads:[~2013-02-21  0:51 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-02-21  0:49 [PATCH 00/36] introduce pipe_config with fdi auto-dithering Daniel Vetter
2013-02-21  0:49 ` [PATCH 01/36] drm/i915: introduce struct intel_crtc_config Daniel Vetter
2013-02-21 14:38   ` Ville Syrjälä
2013-02-21  0:49 ` [PATCH 02/36] drm/i915: compute pipe_config earlier Daniel Vetter
2013-02-21  0:49 ` [PATCH 03/36] drm/i915: add pipe_config->timings_set Daniel Vetter
2013-02-21  0:49 ` [PATCH 04/36] drm/i915: add pipe_config->pixel_multiplier Daniel Vetter
2013-02-21  0:49 ` [PATCH 05/36] drm/i915: add pipe_config->has_pch_encoder Daniel Vetter
2013-02-21  0:49 ` [PATCH 06/36] drm/i915: clear up the fdi/dp set_m_n confusion Daniel Vetter
2013-02-21  0:49 ` [PATCH 07/36] drm/i915: move pipe bpp computation to pipe_config Daniel Vetter
2013-02-21 14:49   ` Ville Syrjälä
2013-02-21 14:54     ` Daniel Vetter
2013-02-21  0:50 ` [PATCH 08/36] drm/i915: clean up plane bpp confusion Daniel Vetter
2013-02-21  0:50 ` [PATCH 09/36] drm/i915: clean up pipe " Daniel Vetter
2013-02-21  0:50 ` [PATCH 10/36] drm/i915: move dp_m_n computation to dp_encoder->compute_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 11/36] drm/i915: track dp target_clock in pipe_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 12/36] drm/i915: rip out superflous is_dp&is_cpu_edp tracking Daniel Vetter
2013-02-21  0:50 ` [PATCH 13/36] drm/i915: add hw state readout/checking for pipe_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 14/36] drm/i915: hw readout support for ->has_pch_encoders Daniel Vetter
2013-02-21  0:50 ` [PATCH 15/36] drm/i915: gen2 has no tv out support Daniel Vetter
2013-02-21  0:50 ` [PATCH 16/36] drm/i915: create pipe_config->dpll for clock state Daniel Vetter
2013-02-21  0:50 ` [PATCH 17/36] drm/i915: move dp clock computations to encoder->compute_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 18/36] drm/i915: add pipe_config->limited_color_range Daniel Vetter
2013-02-21  0:50 ` [PATCH 19/36] drm/i915: use pipe_config for lvds dithering Daniel Vetter
2013-02-21  0:50 ` [PATCH 20/36] drm/i915: move intel_crtc->fdi_lanes to pipe_config Daniel Vetter
2013-02-21  0:50 ` [PATCH 21/36] drm/i915: fixup 12bpc hdmi dotclock handling Daniel Vetter
2013-02-21  0:50 ` [PATCH 22/36] drm/i915: hw state readout support for pipe_config->fdi_lanes Daniel Vetter
2013-02-21  0:50 ` [PATCH 23/36] drm/i915: split up fdi_set_m_n into computation and hw setup Daniel Vetter
2013-02-21  0:50 ` [PATCH 24/36] drm/i915: Disable high-bpc on pre-1.4 EDID screens Daniel Vetter
2013-02-21  0:50 ` [PATCH 25/36] drm/i915: force bpp for eDP panels Daniel Vetter
2013-02-21  0:50 ` [PATCH 26/36] drm/i915: allow high-bpc modes on DP Daniel Vetter
2013-02-21  0:50 ` [PATCH 27/36] drm/i915: extract i9xx_set_pipeconf Daniel Vetter
2013-02-21  0:50 ` [PATCH 28/36] drm/i915: drop adjusted_mode from *_set_pipeconf functions Daniel Vetter
2013-02-21  0:50 ` [PATCH 29/36] drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv Daniel Vetter
2013-02-21  0:50 ` [PATCH 30/36] drm/i915: compute fdi lane config earlier Daniel Vetter
2013-02-21  0:50 ` [PATCH 31/36] drm/i915: Split up ironlake_check_fdi_lanes Daniel Vetter
2013-02-21  0:50 ` [PATCH 32/36] drm/i915: move fdi lane configuration checks ahead Daniel Vetter
2013-02-21  0:50 ` [PATCH 33/36] drm/i915: don't count cpu ports for fdi B/C lane sharing Daniel Vetter
2013-02-21 10:28   ` Chris Wilson
2013-02-21 13:43     ` [PATCH] " Daniel Vetter
2013-02-21  0:50 ` Daniel Vetter [this message]
2013-02-21  0:50 ` [PATCH 35/36] drm/i915: drop haswell fdi lane check from intel_crt_mode_valid Daniel Vetter
2013-02-21  0:50 ` [PATCH 36/36] drm/i915: implement fdi auto-dithering Daniel Vetter

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