From: Tomasz Figa <t.figa@samsung.com> To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, kyungmin.park@samsung.com, kgene.kim@samsung.com, m.szyprowski@samsung.com, t.figa@samsung.com, s.nawrocki@samsung.com, mturquette@linaro.org, thomas.abraham@linaro.org, a.hajda@samsung.com, l.majewski@samsung.com Subject: [PATCH 16/21] clk: samsung: exynos4: Remove SoC-specific registers from save list Date: Wed, 27 Mar 2013 12:02:53 +0100 [thread overview] Message-ID: <1364382178-25248-17-git-send-email-t.figa@samsung.com> (raw) In-Reply-To: <1364382178-25248-1-git-send-email-t.figa@samsung.com> Current clock save list is shared for all Exynos4 SoCs, so it must contain only registers present in all supported SoCs, because accessing unavailable registers might have undefined effect. This patch removes registers specific for particular SoCs from shared save list, as they should be supported by separate SoC-specific lists. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> --- drivers/clk/samsung/clk-exynos4.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index e7c6acd..aa8e907 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -172,27 +172,21 @@ enum exynos4_clks { */ static __initdata unsigned long exynos4_clk_regs[] = { SRC_LEFTBUS, - E4X12_GATE_IP_IMAGE, GATE_IP_RIGHTBUS, - E4X12_GATE_IP_PERIR, SRC_TOP0, SRC_TOP1, SRC_CAM, SRC_TV, SRC_MFC, SRC_G3D, - E4210_SRC_IMAGE, SRC_LCD0, - SRC_LCD1, SRC_MAUDIO, SRC_FSYS, SRC_PERIL0, SRC_PERIL1, - E4X12_SRC_CAM1, SRC_MASK_CAM, SRC_MASK_TV, SRC_MASK_LCD0, - SRC_MASK_LCD1, SRC_MASK_MAUDIO, SRC_MASK_FSYS, SRC_MASK_PERIL0, @@ -204,8 +198,6 @@ static __initdata unsigned long exynos4_clk_regs[] = { DIV_G3D, DIV_IMAGE, DIV_LCD0, - E4210_DIV_LCD1, - E4X12_DIV_ISP, DIV_MAUDIO, DIV_FSYS0, DIV_FSYS1, @@ -217,24 +209,16 @@ static __initdata unsigned long exynos4_clk_regs[] = { DIV_PERIL3, DIV_PERIL4, DIV_PERIL5, - E4X12_DIV_CAM1, GATE_SCLK_CAM, GATE_IP_CAM, GATE_IP_TV, GATE_IP_MFC, GATE_IP_G3D, - E4210_GATE_IP_IMAGE, GATE_IP_LCD0, - GATE_IP_LCD1, - E4X12_GATE_IP_MAUDIO, GATE_IP_FSYS, GATE_IP_GPS, GATE_IP_PERIL, - GATE_IP_PERIR, - E4X12_MPLL_CON0, - E4X12_SRC_DMC, APLL_CON0, - E4210_MPLL_CON0, SRC_CPU, DIV_CPU0, }; -- 1.8.1.5
WARNING: multiple messages have this Message-ID (diff)
From: t.figa@samsung.com (Tomasz Figa) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 16/21] clk: samsung: exynos4: Remove SoC-specific registers from save list Date: Wed, 27 Mar 2013 12:02:53 +0100 [thread overview] Message-ID: <1364382178-25248-17-git-send-email-t.figa@samsung.com> (raw) In-Reply-To: <1364382178-25248-1-git-send-email-t.figa@samsung.com> Current clock save list is shared for all Exynos4 SoCs, so it must contain only registers present in all supported SoCs, because accessing unavailable registers might have undefined effect. This patch removes registers specific for particular SoCs from shared save list, as they should be supported by separate SoC-specific lists. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> --- drivers/clk/samsung/clk-exynos4.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index e7c6acd..aa8e907 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -172,27 +172,21 @@ enum exynos4_clks { */ static __initdata unsigned long exynos4_clk_regs[] = { SRC_LEFTBUS, - E4X12_GATE_IP_IMAGE, GATE_IP_RIGHTBUS, - E4X12_GATE_IP_PERIR, SRC_TOP0, SRC_TOP1, SRC_CAM, SRC_TV, SRC_MFC, SRC_G3D, - E4210_SRC_IMAGE, SRC_LCD0, - SRC_LCD1, SRC_MAUDIO, SRC_FSYS, SRC_PERIL0, SRC_PERIL1, - E4X12_SRC_CAM1, SRC_MASK_CAM, SRC_MASK_TV, SRC_MASK_LCD0, - SRC_MASK_LCD1, SRC_MASK_MAUDIO, SRC_MASK_FSYS, SRC_MASK_PERIL0, @@ -204,8 +198,6 @@ static __initdata unsigned long exynos4_clk_regs[] = { DIV_G3D, DIV_IMAGE, DIV_LCD0, - E4210_DIV_LCD1, - E4X12_DIV_ISP, DIV_MAUDIO, DIV_FSYS0, DIV_FSYS1, @@ -217,24 +209,16 @@ static __initdata unsigned long exynos4_clk_regs[] = { DIV_PERIL3, DIV_PERIL4, DIV_PERIL5, - E4X12_DIV_CAM1, GATE_SCLK_CAM, GATE_IP_CAM, GATE_IP_TV, GATE_IP_MFC, GATE_IP_G3D, - E4210_GATE_IP_IMAGE, GATE_IP_LCD0, - GATE_IP_LCD1, - E4X12_GATE_IP_MAUDIO, GATE_IP_FSYS, GATE_IP_GPS, GATE_IP_PERIL, - GATE_IP_PERIR, - E4X12_MPLL_CON0, - E4X12_SRC_DMC, APLL_CON0, - E4210_MPLL_CON0, SRC_CPU, DIV_CPU0, }; -- 1.8.1.5
next prev parent reply other threads:[~2013-03-27 11:07 UTC|newest] Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top 2013-03-27 11:02 [PATCH 00/21] Various fixes and extensions to Exynos4 clock driver Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 01/21] clk: samsung: exynos4: Correct sclk_mfc clock definition Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 02/21] clk: samsung: exynos4: Use mout_mpll_user_* on Exynos4x12 Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 03/21] clk: samsung: exynos4: Add missing mout_mipihsi clock Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 04/21] clk: samsung: exynos4: Add missing sclk_audio0 clock Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 05/21] clk: samsung: exynos4: Export sclk_pcm0 Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 06/21] clk: samsung: exynos4: Move dac and mixer to Exynos4210-specific clocks Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 07/21] clk: samsung: exynos4: Export clocks used by exynos cpufreq drivers Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 08/21] clk: samsung: pll: Remove unimplemented ops Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 09/21] clk: samsung: exynos4: Export mout_core clock of Exynos4210 Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 10/21] clk: samsung: exynos4: Add camera related clock definitions Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 11/21] clk: samsung: exynos4: Add G3D clocks Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 12/21] clk: samsung: exynos4: Add missing CMU_TOP and ISP clocks Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 13/21] clk: samsung: exynos4: Add missing mout_sata on Exynos4210 Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 14/21] clk: samsung: exynos4: Define {E,V}PLL registers Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 15/21] clk: samsung: exynos4: Use SRC_MASK_PERIL{0,1} definitions Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa [this message] 2013-03-27 11:02 ` [PATCH 16/21] clk: samsung: exynos4: Remove SoC-specific registers from save list Tomasz Figa 2013-03-27 11:02 ` [PATCH 17/21] clk: samsung: exynos4: Add E4210 prefix to LCD1 clock registers Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 18/21] clk: samsung: exynos4: Add E4210 prefix to GATE_IP_PERIR register Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 19/21] clk: samsung: exynos4: Remove E4X12 prefix from SRC_DMC register Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 20/21] clk: samsung: exynos4: Add missing registers to suspend save list Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-27 11:02 ` [PATCH 21/21] clk: samsung: exynos4: Add support for SoC-specific register " Tomasz Figa 2013-03-27 11:02 ` Tomasz Figa 2013-03-30 10:03 ` [PATCH 00/21] Various fixes and extensions to Exynos4 clock driver Thomas Abraham 2013-03-30 10:03 ` Thomas Abraham 2013-03-30 11:30 ` Tomasz Figa 2013-03-30 11:30 ` Tomasz Figa 2013-04-02 8:30 ` Kukjin Kim 2013-04-02 8:30 ` Kukjin Kim 2013-04-03 22:01 ` Mike Turquette 2013-04-03 22:01 ` Mike Turquette 2013-04-04 0:36 ` Kukjin Kim 2013-04-04 0:36 ` Kukjin Kim
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