[PATCH 5/5] drm/i915: Fix error capture on BYT/BDW

[Ben Widawsky <benjamin.widawsky@intel.com>]

The previous check during error capture of whether or not the current VM
should be scanned used, gen < 7. That was more or less trying to
determine if there was a full PPGTT. At the time, this was sort of what
I meant to do because I was more interested in working backwards from
hardware state. However, this is incorrect because it will not include
platforms that are greater than gen7, and not having PPGTT.  Example
would be BYT which is gen7 but doesn't have PPGTT, BDW, or any platform
greater than gen7 with the PPGTT module parameter invoked.

I am /assuming/ BYT was broken, I have not actually checked.

While here, clean up the file a bit to avoid duplicate reads (now that
the PPGTT info is in the error state).

I think Mika/Chris may have been looking at this too.

Broken by:
commit 685987c6915222730f45141a89f1cd87fb092e9a
Author: Ben Widawsky <benjamin.widawsky@intel.com>
Date:   Fri Dec 6 14:10:54 2013 -0800

    drm/i915: Identify active VM for batchbuffer capture

Reported-by: Kenneth Graunke <kenneth.w.graunke@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_gpu_error.c | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 76bb010..6a859f1 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -684,32 +684,32 @@ static void i915_gem_record_fences(struct drm_device *dev,
 
 /* This assumes all batchbuffers are executed from the PPGTT. It might have to
  * change in the future. */
-static bool is_active_vm(struct i915_address_space *vm,
+static bool is_active_vm(struct drm_i915_error_state *error,
+			 struct i915_address_space *vm,
 			 struct intel_ring_buffer *ring)
 {
 	struct drm_device *dev = vm->dev;
-	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct i915_hw_ppgtt *ppgtt;
 
-	if (INTEL_INFO(dev)->gen < 7)
+	if (!HAS_PPGTT(dev))
 		return i915_is_ggtt(vm);
 
-	/* FIXME: This ignores that the global gtt vm is also on this list. */
+	if (i915_is_ggtt(vm) || !USES_PPGTT(dev))
+		return error->head[ring->id] &&
+			(error->acthd[ring->id] ==
+			(error->head[ring->id] & HEAD_ADDR));
+
 	ppgtt = container_of(vm, struct i915_hw_ppgtt, base);
 
-	if (INTEL_INFO(dev)->gen >= 8) {
-		u64 pdp0 = (u64)I915_READ(GEN8_RING_PDP_UDW(ring, 0)) << 32;
-		pdp0 |=  I915_READ(GEN8_RING_PDP_LDW(ring, 0));
-		return pdp0 == ppgtt->pd_dma_addr[0];
-	} else {
-		u32 pp_db;
-		pp_db = I915_READ(RING_PP_DIR_BASE(ring));
-		return (pp_db >> 10) == ppgtt->pd_offset;
-	}
+	if (INTEL_INFO(dev)->gen >= 8)
+		return error->vm_info[ring->id].pdp[0] == ppgtt->pd_dma_addr[0];
+	else
+		return error->vm_info[ring->id].pp_dir_base == ppgtt->pd_offset;
 }
 
 static struct drm_i915_error_object *
 i915_error_first_batchbuffer(struct drm_i915_private *dev_priv,
+			     struct drm_i915_error_state *error,
 			     struct intel_ring_buffer *ring)
 {
 	struct i915_address_space *vm;
@@ -735,7 +735,7 @@ i915_error_first_batchbuffer(struct drm_i915_private *dev_priv,
 
 	seqno = ring->get_seqno(ring, false);
 	list_for_each_entry(vm, &dev_priv->vm_list, global_link) {
-		if (!is_active_vm(vm, ring))
+		if (!is_active_vm(error, vm, ring))
 			continue;
 
 		found_active = true;
@@ -877,7 +877,7 @@ static void i915_gem_record_rings(struct drm_device *dev,
 		i915_record_ring_state(dev, error, ring);
 
 		error->ring[i].batchbuffer =
-			i915_error_first_batchbuffer(dev_priv, ring);
+			i915_error_first_batchbuffer(dev_priv, error, ring);
 
 		error->ring[i].ringbuffer =
 			i915_error_ggtt_object_create(dev_priv, ring->obj);
-- 
1.8.5.3