From: Chanwoo Choi <cw00.choi@samsung.com> To: linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: kgene.kim@samsung.com, mark.rutland@arm.com, arnd@arndb.de, olof@lixom.net, catalin.marinas@arm.com, will.deacon@arm.com, s.nawrocki@samsung.com, tomasz.figa@gmail.com, thomas.abraham@linaro.org, linus.walleij@linaro.org, kyungmin.park@samsung.com, inki.dae@samsung.com, chanho61.park@samsung.com, geunsik.lim@samsung.com, sw0312.kim@samsung.com, jh80.chung@samsung.com, cw00.choi@samsung.com, a.kesavan@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Jiri Slaby <jslaby@suse.cz>, linux-serial@vger.kernel.org Subject: [PATCH 19/19] serial: samsung: Add the support for Exynos5433 SoC Date: Thu, 27 Nov 2014 16:35:16 +0900 [thread overview] Message-ID: <1417073716-22997-20-git-send-email-cw00.choi@samsung.com> (raw) In-Reply-To: <1417073716-22997-1-git-send-email-cw00.choi@samsung.com> This patch adds new s3c24xx_serial_drv_data structure for Exynos5433 SoC because Exynos5433 has different fifo size from existing Exynos4 SoC. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: linux-serial@vger.kernel.org Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Acked-by: Geunsik Lim <geunsik.lim@samsung.com> --- drivers/tty/serial/samsung.c | 56 ++++++++++++++++++++++++++++---------------- 1 file changed, 36 insertions(+), 20 deletions(-) diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c index 2338ad8..6f1fb9a 100644 --- a/drivers/tty/serial/samsung.c +++ b/drivers/tty/serial/samsung.c @@ -1766,32 +1766,43 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { #endif #if defined(CONFIG_ARCH_EXYNOS) +#define EXYNOS_COMMON_SERIAL_DRV_DATA \ + .info = &(struct s3c24xx_uart_info) { \ + .name = "Samsung Exynos UART", \ + .type = PORT_S3C6400, \ + .has_divslot = 1, \ + .rx_fifomask = S5PV210_UFSTAT_RXMASK, \ + .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \ + .rx_fifofull = S5PV210_UFSTAT_RXFULL, \ + .tx_fifofull = S5PV210_UFSTAT_TXFULL, \ + .tx_fifomask = S5PV210_UFSTAT_TXMASK, \ + .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \ + .def_clk_sel = S3C2410_UCON_CLKSEL0, \ + .num_clks = 1, \ + .clksel_mask = 0, \ + .clksel_shift = 0, \ + }, \ + .def_cfg = &(struct s3c2410_uartcfg) { \ + .ucon = S5PV210_UCON_DEFAULT, \ + .ufcon = S5PV210_UFCON_DEFAULT, \ + .has_fracval = 1, \ + } \ + static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = { - .info = &(struct s3c24xx_uart_info) { - .name = "Samsung Exynos4 UART", - .type = PORT_S3C6400, - .has_divslot = 1, - .rx_fifomask = S5PV210_UFSTAT_RXMASK, - .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, - .rx_fifofull = S5PV210_UFSTAT_RXFULL, - .tx_fifofull = S5PV210_UFSTAT_TXFULL, - .tx_fifomask = S5PV210_UFSTAT_TXMASK, - .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, - .def_clk_sel = S3C2410_UCON_CLKSEL0, - .num_clks = 1, - .clksel_mask = 0, - .clksel_shift = 0, - }, - .def_cfg = &(struct s3c2410_uartcfg) { - .ucon = S5PV210_UCON_DEFAULT, - .ufcon = S5PV210_UFCON_DEFAULT, - .has_fracval = 1, - }, + EXYNOS_COMMON_SERIAL_DRV_DATA, .fifosize = { 256, 64, 16, 16 }, }; + +static struct s3c24xx_serial_drv_data exynos5433_serial_drv_data = { + EXYNOS_COMMON_SERIAL_DRV_DATA, + .fifosize = { 64, 256, 16, 256 }, +}; + #define EXYNOS4210_SERIAL_DRV_DATA ((kernel_ulong_t)&exynos4210_serial_drv_data) +#define EXYNOS5433_SERIAL_DRV_DATA ((kernel_ulong_t)&exynos5433_serial_drv_data) #else #define EXYNOS4210_SERIAL_DRV_DATA (kernel_ulong_t)NULL +#define EXYNOS5433_SERIAL_DRV_DATA (kernel_ulong_t)NULL #endif static struct platform_device_id s3c24xx_serial_driver_ids[] = { @@ -1813,6 +1824,9 @@ static struct platform_device_id s3c24xx_serial_driver_ids[] = { }, { .name = "exynos4210-uart", .driver_data = EXYNOS4210_SERIAL_DRV_DATA, + }, { + .name = "exynos5433-uart", + .driver_data = EXYNOS5433_SERIAL_DRV_DATA, }, { }, }; @@ -1832,6 +1846,8 @@ static const struct of_device_id s3c24xx_uart_dt_match[] = { .data = (void *)S5PV210_SERIAL_DRV_DATA }, { .compatible = "samsung,exynos4210-uart", .data = (void *)EXYNOS4210_SERIAL_DRV_DATA }, + { .compatible = "samsung,exynos5433-uart", + .data = (void *)EXYNOS5433_SERIAL_DRV_DATA }, {}, }; MODULE_DEVICE_TABLE(of, s3c24xx_uart_dt_match); -- 1.8.5.5
WARNING: multiple messages have this Message-ID (diff)
From: cw00.choi@samsung.com (Chanwoo Choi) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 19/19] serial: samsung: Add the support for Exynos5433 SoC Date: Thu, 27 Nov 2014 16:35:16 +0900 [thread overview] Message-ID: <1417073716-22997-20-git-send-email-cw00.choi@samsung.com> (raw) In-Reply-To: <1417073716-22997-1-git-send-email-cw00.choi@samsung.com> This patch adds new s3c24xx_serial_drv_data structure for Exynos5433 SoC because Exynos5433 has different fifo size from existing Exynos4 SoC. Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: linux-serial at vger.kernel.org Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Acked-by: Geunsik Lim <geunsik.lim@samsung.com> --- drivers/tty/serial/samsung.c | 56 ++++++++++++++++++++++++++++---------------- 1 file changed, 36 insertions(+), 20 deletions(-) diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c index 2338ad8..6f1fb9a 100644 --- a/drivers/tty/serial/samsung.c +++ b/drivers/tty/serial/samsung.c @@ -1766,32 +1766,43 @@ static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = { #endif #if defined(CONFIG_ARCH_EXYNOS) +#define EXYNOS_COMMON_SERIAL_DRV_DATA \ + .info = &(struct s3c24xx_uart_info) { \ + .name = "Samsung Exynos UART", \ + .type = PORT_S3C6400, \ + .has_divslot = 1, \ + .rx_fifomask = S5PV210_UFSTAT_RXMASK, \ + .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \ + .rx_fifofull = S5PV210_UFSTAT_RXFULL, \ + .tx_fifofull = S5PV210_UFSTAT_TXFULL, \ + .tx_fifomask = S5PV210_UFSTAT_TXMASK, \ + .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \ + .def_clk_sel = S3C2410_UCON_CLKSEL0, \ + .num_clks = 1, \ + .clksel_mask = 0, \ + .clksel_shift = 0, \ + }, \ + .def_cfg = &(struct s3c2410_uartcfg) { \ + .ucon = S5PV210_UCON_DEFAULT, \ + .ufcon = S5PV210_UFCON_DEFAULT, \ + .has_fracval = 1, \ + } \ + static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = { - .info = &(struct s3c24xx_uart_info) { - .name = "Samsung Exynos4 UART", - .type = PORT_S3C6400, - .has_divslot = 1, - .rx_fifomask = S5PV210_UFSTAT_RXMASK, - .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, - .rx_fifofull = S5PV210_UFSTAT_RXFULL, - .tx_fifofull = S5PV210_UFSTAT_TXFULL, - .tx_fifomask = S5PV210_UFSTAT_TXMASK, - .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, - .def_clk_sel = S3C2410_UCON_CLKSEL0, - .num_clks = 1, - .clksel_mask = 0, - .clksel_shift = 0, - }, - .def_cfg = &(struct s3c2410_uartcfg) { - .ucon = S5PV210_UCON_DEFAULT, - .ufcon = S5PV210_UFCON_DEFAULT, - .has_fracval = 1, - }, + EXYNOS_COMMON_SERIAL_DRV_DATA, .fifosize = { 256, 64, 16, 16 }, }; + +static struct s3c24xx_serial_drv_data exynos5433_serial_drv_data = { + EXYNOS_COMMON_SERIAL_DRV_DATA, + .fifosize = { 64, 256, 16, 256 }, +}; + #define EXYNOS4210_SERIAL_DRV_DATA ((kernel_ulong_t)&exynos4210_serial_drv_data) +#define EXYNOS5433_SERIAL_DRV_DATA ((kernel_ulong_t)&exynos5433_serial_drv_data) #else #define EXYNOS4210_SERIAL_DRV_DATA (kernel_ulong_t)NULL +#define EXYNOS5433_SERIAL_DRV_DATA (kernel_ulong_t)NULL #endif static struct platform_device_id s3c24xx_serial_driver_ids[] = { @@ -1813,6 +1824,9 @@ static struct platform_device_id s3c24xx_serial_driver_ids[] = { }, { .name = "exynos4210-uart", .driver_data = EXYNOS4210_SERIAL_DRV_DATA, + }, { + .name = "exynos5433-uart", + .driver_data = EXYNOS5433_SERIAL_DRV_DATA, }, { }, }; @@ -1832,6 +1846,8 @@ static const struct of_device_id s3c24xx_uart_dt_match[] = { .data = (void *)S5PV210_SERIAL_DRV_DATA }, { .compatible = "samsung,exynos4210-uart", .data = (void *)EXYNOS4210_SERIAL_DRV_DATA }, + { .compatible = "samsung,exynos5433-uart", + .data = (void *)EXYNOS5433_SERIAL_DRV_DATA }, {}, }; MODULE_DEVICE_TABLE(of, s3c24xx_uart_dt_match); -- 1.8.5.5
next prev parent reply other threads:[~2014-11-27 7:36 UTC|newest] Thread overview: 133+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-11-27 7:34 [PATCH 00/19] arm64: Add the support for new 64-bit Exynos5433 SoC Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 7:34 ` [PATCH 01/19] pinctrl: exynos: Add support for Exynos5433 Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 10:26 ` [01/19] " Pankaj Dubey 2014-11-27 10:26 ` Pankaj Dubey 2014-11-27 10:49 ` Chanwoo Choi 2014-11-27 10:49 ` Chanwoo Choi 2014-11-27 11:45 ` [PATCH 01/19] " Arnd Bergmann 2014-11-27 11:45 ` Arnd Bergmann 2014-11-27 12:14 ` Tomasz Figa 2014-11-27 12:14 ` Tomasz Figa 2014-11-27 12:14 ` Tomasz Figa 2014-11-27 12:36 ` Arnd Bergmann 2014-11-27 12:36 ` Arnd Bergmann 2014-11-27 12:36 ` Arnd Bergmann 2014-12-28 11:21 ` Tomasz Figa 2014-12-28 11:21 ` Tomasz Figa 2014-12-28 23:33 ` Chanwoo Choi 2014-12-28 23:33 ` Chanwoo Choi 2014-11-27 7:34 ` [PATCH 02/19] clk: samsung: Add binding documentation for Exynos5433 clock controller Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 11:21 ` Mark Rutland 2014-11-27 11:21 ` Mark Rutland 2014-11-27 11:21 ` Mark Rutland 2014-11-27 11:29 ` Chanwoo Choi 2014-11-27 11:29 ` Chanwoo Choi 2014-11-27 11:29 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 03/19] clk: samsung: exynos5433: Add clocks using common clock framework Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 11:48 ` [03/19] " Pankaj Dubey 2014-11-27 11:48 ` Pankaj Dubey 2014-11-27 12:53 ` Chanwoo Choi 2014-11-27 12:53 ` Chanwoo Choi 2014-11-28 1:57 ` Chanwoo Choi 2014-11-28 1:57 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 04/19] clk: samsung: exynos5433: Add MUX clocks of CMU_TOP domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 05/19] clk: samsung: exynos5433: Add clocks for CMU_PERIC domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 06/19] clk: samsung: exynos5433: Add clocks for CMU_PERIS domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 07/19] clk: samsung: exynos5433: Add clocks for CMU_G2D domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 08/19] clk: samsung: exynos5433: Add clocks for CMU_MIF domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 09/19] clk: samsung: exynos5433: Add clocks for CMU_DISP domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 10/19] clk: samsung: exynos5433: Add clocks for CMU_AUD domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 11/19] clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 11:41 ` Arnd Bergmann 2014-11-27 11:41 ` Arnd Bergmann 2014-11-27 11:56 ` Chanwoo Choi 2014-11-27 11:56 ` Chanwoo Choi 2014-11-27 12:12 ` Sylwester Nawrocki 2014-11-27 12:12 ` Sylwester Nawrocki 2014-11-27 12:12 ` Sylwester Nawrocki 2014-11-27 12:14 ` Chanwoo Choi 2014-11-27 12:14 ` Chanwoo Choi 2014-11-27 12:35 ` Arnd Bergmann 2014-11-27 12:35 ` Arnd Bergmann 2014-11-27 12:58 ` Chanwoo Choi 2014-11-27 12:58 ` Chanwoo Choi 2014-11-27 13:15 ` Arnd Bergmann 2014-11-27 13:15 ` Arnd Bergmann [not found] ` <CAGTfZH3KmwhJNFdmeWnujbbUbtLf5vSi6i2dbV62DeCtV7n4TQ@mail.gmail.com> 2014-11-27 14:02 ` Arnd Bergmann 2014-11-27 14:02 ` Arnd Bergmann 2014-11-27 14:02 ` Arnd Bergmann 2014-11-27 15:17 ` Chanwoo Choi 2014-11-27 15:17 ` Chanwoo Choi 2014-11-27 15:17 ` Chanwoo Choi 2014-11-27 15:33 ` Arnd Bergmann 2014-11-27 15:33 ` Arnd Bergmann 2014-11-27 15:33 ` Arnd Bergmann 2014-11-27 15:44 ` Chanwoo Choi 2014-11-27 15:44 ` Chanwoo Choi 2014-11-27 15:44 ` Chanwoo Choi 2014-11-27 15:51 ` Arnd Bergmann 2014-11-27 15:51 ` Arnd Bergmann 2014-11-27 15:51 ` Arnd Bergmann 2014-11-27 15:58 ` Chanwoo Choi 2014-11-27 15:58 ` Chanwoo Choi 2014-11-27 15:58 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 12/19] clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 13/19] clk: samsung: exynos5433: Add clocks for CMU_G3D domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 14/19] clk: samsung: exynos5433: Add clocks for CMU_GSCL domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 15/19] arm64: exynos5433: Enable ARMv8-based Exynos5433 SoC support Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 11:18 ` Catalin Marinas 2014-11-27 11:18 ` Catalin Marinas 2014-11-27 11:18 ` Catalin Marinas 2014-11-27 11:22 ` Chanwoo Choi 2014-11-27 11:22 ` Chanwoo Choi 2014-11-27 11:22 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 16/19] arm64: dts: exynos: Add dts files for 64-bit Exynos5433 SoC Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 10:26 ` Marc Zyngier 2014-11-27 10:26 ` Marc Zyngier 2014-11-27 10:26 ` Marc Zyngier 2014-11-28 13:51 ` Chanwoo Choi 2014-11-28 13:51 ` Chanwoo Choi 2014-11-28 13:51 ` Chanwoo Choi 2014-11-27 11:18 ` Mark Rutland 2014-11-27 11:18 ` Mark Rutland 2014-11-27 11:18 ` Mark Rutland 2014-11-28 13:18 ` Chanwoo Choi 2014-11-28 13:18 ` Chanwoo Choi 2014-11-28 13:18 ` Chanwoo Choi 2014-11-28 14:00 ` Mark Rutland 2014-11-28 14:00 ` Mark Rutland 2014-11-28 14:00 ` Mark Rutland 2014-12-01 2:21 ` Chanwoo Choi 2014-12-01 2:21 ` Chanwoo Choi 2014-12-01 2:21 ` Chanwoo Choi 2014-12-02 10:42 ` Mark Rutland 2014-12-02 10:42 ` Mark Rutland 2014-12-02 10:42 ` Mark Rutland 2014-11-27 7:35 ` [PATCH 17/19] arm64: dts: exynos: Add MSHC dt node for Exynos5433 Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 18/19] arm64: dts: exynos: Add SPI/PDMA " Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi [this message] 2014-11-27 7:35 ` [PATCH 19/19] serial: samsung: Add the support for Exynos5433 SoC Chanwoo Choi
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