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From: ville.syrjala@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 1/9] drm/i915: Implement WaEnableHDMI8bpcBefore12bpc:snb, ivb
Date: Tue,  5 May 2015 17:06:19 +0300	[thread overview]
Message-ID: <1430834787-10255-2-git-send-email-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <1430834787-10255-1-git-send-email-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

CPT/PPT require a specific procedure for enabling 12bpc HDMI. Implement
it, and to keep things neat pull the code into a function.

v2: Rebased due to crtc->config changes
    s/HDMI_GC/HDMIUNIT_GC/ to match spec better
    Factor out intel_enable_hdmi_audio()

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h   |  1 +
 drivers/gpu/drm/i915/intel_hdmi.c | 74 +++++++++++++++++++++++++++++++++++----
 2 files changed, 69 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2339ffa..e619e41 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6149,6 +6149,7 @@ enum skl_disp_power_wells {
 #define _TRANSA_CHICKEN1	 0xf0060
 #define _TRANSB_CHICKEN1	 0xf1060
 #define TRANS_CHICKEN1(pipe) _PIPE(pipe, _TRANSA_CHICKEN1, _TRANSB_CHICKEN1)
+#define  TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE	(1<<10)
 #define  TRANS_CHICKEN1_DP0UNIT_GC_DISABLE	(1<<4)
 #define _TRANSA_CHICKEN2	 0xf0064
 #define _TRANSB_CHICKEN2	 0xf1064
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index a84c040..79cf445 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -814,6 +814,16 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder,
 	pipe_config->base.adjusted_mode.crtc_clock = dotclock;
 }
 
+static void intel_enable_hdmi_audio(struct intel_encoder *encoder)
+{
+	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
+
+	WARN_ON(!crtc->config->has_hdmi_sink);
+	DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n",
+			 pipe_name(crtc->pipe));
+	intel_audio_codec_enable(encoder);
+}
+
 static void intel_enable_hdmi(struct intel_encoder *encoder)
 {
 	struct drm_device *dev = encoder->base.dev;
@@ -854,12 +864,61 @@ static void intel_enable_hdmi(struct intel_encoder *encoder)
 		POSTING_READ(intel_hdmi->hdmi_reg);
 	}
 
-	if (intel_crtc->config->has_audio) {
-		WARN_ON(!intel_crtc->config->has_hdmi_sink);
-		DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n",
-				 pipe_name(intel_crtc->pipe));
-		intel_audio_codec_enable(encoder);
+	if (intel_crtc->config->has_audio)
+		intel_enable_hdmi_audio(encoder);
+}
+
+static void cpt_enable_hdmi(struct intel_encoder *encoder)
+{
+	struct drm_device *dev = encoder->base.dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
+	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
+	enum pipe pipe = crtc->pipe;
+	u32 temp;
+
+	temp = I915_READ(intel_hdmi->hdmi_reg);
+
+	temp |= SDVO_ENABLE;
+	if (crtc->config->has_audio)
+		temp |= SDVO_AUDIO_ENABLE;
+
+	/*
+	 * WaEnableHDMI8bpcBefore12bpc:snb,ivb
+	 *
+	 * The procedure for 12bpc is as follows:
+	 * 1. disable HDMI clock gating
+	 * 2. enable HDMI with 8bpc
+	 * 3. enable HDMI with 12bpc
+	 * 4. enable HDMI clock gating
+	 */
+
+	if (crtc->config->pipe_bpp > 24) {
+		I915_WRITE(TRANS_CHICKEN1(pipe),
+			   I915_READ(TRANS_CHICKEN1(pipe)) |
+			   TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE);
+
+		temp &= ~SDVO_COLOR_FORMAT_MASK;
+		temp |= SDVO_COLOR_FORMAT_8bpc;
 	}
+
+	I915_WRITE(intel_hdmi->hdmi_reg, temp);
+	POSTING_READ(intel_hdmi->hdmi_reg);
+
+	if (crtc->config->pipe_bpp > 24) {
+		temp &= ~SDVO_COLOR_FORMAT_MASK;
+		temp |= HDMI_COLOR_FORMAT_12bpc;
+
+		I915_WRITE(intel_hdmi->hdmi_reg, temp);
+		POSTING_READ(intel_hdmi->hdmi_reg);
+
+		I915_WRITE(TRANS_CHICKEN1(pipe),
+			   I915_READ(TRANS_CHICKEN1(pipe)) &
+			   ~TRANS_CHICKEN1_HDMIUNIT_GC_DISABLE);
+	}
+
+	if (crtc->config->has_audio)
+		intel_enable_hdmi_audio(encoder);
 }
 
 static void vlv_enable_hdmi(struct intel_encoder *encoder)
@@ -1829,7 +1888,10 @@ void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port)
 		intel_encoder->post_disable = vlv_hdmi_post_disable;
 	} else {
 		intel_encoder->pre_enable = intel_hdmi_pre_enable;
-		intel_encoder->enable = intel_enable_hdmi;
+		if (HAS_PCH_CPT(dev))
+			intel_encoder->enable = cpt_enable_hdmi;
+		else
+			intel_encoder->enable = intel_enable_hdmi;
 	}
 
 	intel_encoder->type = INTEL_OUTPUT_HDMI;
-- 
2.0.5

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  reply	other threads:[~2015-05-05 14:06 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-05 14:06 [PATCH 0/9] drm/i915: HDMI 12bpc fixes ville.syrjala
2015-05-05 14:06 ` ville.syrjala [this message]
2015-05-05 14:24   ` [PATCH v2 1/9] drm/i915: Implement WaEnableHDMI8bpcBefore12bpc:snb, ivb Jani Nikula
2015-05-25 11:39   ` Ander Conselvan De Oliveira
2015-06-01 21:49   ` Konduru, Chandra
2015-05-05 14:06 ` [PATCH v2 2/9] drm/i915: Send GCP infoframes for deep color HDMI sinks ville.syrjala
2015-05-25 12:32   ` Ander Conselvan De Oliveira
2015-05-25 12:44     ` Ville Syrjälä
2015-05-25 13:09       ` Ander Conselvan De Oliveira
2015-05-25 13:14         ` Ville Syrjälä
2015-06-01 21:49   ` Konduru, Chandra
2015-06-02 12:58     ` Ville Syrjälä
2015-06-02 19:07       ` Konduru, Chandra
2015-05-05 14:06 ` [PATCH v2 3/9] drm/i915: Enable default_phase in GCP when possible ville.syrjala
2015-06-01 21:49   ` Konduru, Chandra
2015-06-02 11:46     ` Ville Syrjälä
2015-06-02 18:21       ` Konduru, Chandra
2015-06-03  9:34         ` Ville Syrjälä
2015-06-03 20:38           ` Konduru, Chandra
2015-05-05 14:06 ` [PATCH v2 4/9] drm/i915: Fix HDMI 12bpc TRANSCONF bpc value ville.syrjala
2015-06-01 21:48   ` Konduru, Chandra
2015-05-05 14:06 ` [PATCH v2 5/9] drm/i915: Fix 12bpc HDMI enable for IBX ville.syrjala
2015-06-03 20:52   ` Konduru, Chandra
2015-05-05 14:06 ` [PATCH v2 6/9] drm/i915: Disable all infoframes when turning off the HDMI port ville.syrjala
2015-06-01 22:48   ` Konduru, Chandra
2015-06-02 11:11     ` Ville Syrjälä
2015-06-02 18:18       ` Konduru, Chandra
2015-06-03  9:21         ` Ville Syrjälä
2015-06-03 23:24           ` Konduru, Chandra
2015-05-05 14:06 ` [PATCH 7/9] drm/i915: Check infoframe state more diligently ville.syrjala
2015-06-01 22:57   ` Konduru, Chandra
2015-05-05 14:06 ` [PATCH 8/9] drm/i915: Fix hdmi clock readout with pixel repeat ville.syrjala
2015-06-01 22:59   ` Konduru, Chandra
2015-05-05 14:06 ` [PATCH 9/9] drm/i915: Double the port clock when using double clocked modes with 12bpc ville.syrjala
2015-05-21 11:20   ` Ville Syrjälä
2015-06-01 23:23   ` Konduru, Chandra
2015-06-01 19:04 ` [PATCH 0/9] drm/i915: HDMI 12bpc fixes Konduru, Chandra
2015-06-15  9:37   ` Daniel Vetter

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