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From: Damien Lespiau <damien.lespiau@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 13/13 v2] drm/i915/skl: Prefer even dividers for SKL DPLLs
Date: Thu, 25 Jun 2015 16:19:24 +0100	[thread overview]
Message-ID: <1435245564-30754-1-git-send-email-damien.lespiau@intel.com> (raw)
In-Reply-To: <CA+gsUGTOtfq1rZ9VMcv7P7+N2n46J9z5TOPcFQKo2ekVqGMPBA@mail.gmail.com>

Currently, if an odd divider improves the deviation (minimizes it), we
take that divider. The recommendation is to prefer even dividers.

v2: Move the check at the right place after having inverted the two for
    loops in the previous patch.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 6e964ef..f6b3ccc 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1317,6 +1317,13 @@ skl_ddi_calculate_wrpll(int clock /* in Hz */,
 						      p);
 			}
 		}
+
+		/*
+		 * If a solution is found with an even divider, prefer
+		 * this one.
+		 */
+		if (d == 0 && ctx.p)
+			break;
 	}
 
 	if (!ctx.p) {
-- 
2.1.0

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  parent reply	other threads:[~2015-06-25 15:19 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-07 17:38 [PATCH 00/13] Update of the HDMI DPLL dividers computation Damien Lespiau
2015-05-07 17:38 ` [PATCH 01/13] drm/i915/skl: Re-indent part of skl_ddi_calculate_wrpll() Damien Lespiau
2015-05-08  7:19   ` Daniel Vetter
2015-05-07 17:38 ` [PATCH 02/13] drm/i915/skl: Make sure to break when not finding suitable PLL dividers Damien Lespiau
2015-05-27 17:58   ` Paulo Zanoni
2015-05-28  6:31     ` Jani Nikula
2015-05-28  7:45   ` Daniel Vetter
2015-05-28 13:59     ` Paulo Zanoni
2015-05-07 17:38 ` [PATCH 03/13] drm/i915/skl: Display the WRPLL frequency we couldn't accomodate when failing Damien Lespiau
2015-05-28  7:48   ` Daniel Vetter
2015-05-07 17:38 ` [PATCH 04/13] drm/i915/skl: Propagate the error if we fail to find a suitable DPLL divider Damien Lespiau
2015-05-07 17:38 ` [PATCH 05/13] drm/i915/skl: Use a more idomatic early return Damien Lespiau
2015-05-07 17:38 ` [PATCH 06/13] drm/i915/skl: Factor out computing the DPLL paramaters from the dividers Damien Lespiau
2015-05-07 17:38 ` [PATCH 07/13] drm/i915/skl: Remove unnecessary () used with div_u64() Damien Lespiau
2015-05-07 17:38 ` [PATCH 08/13] drm/i915/skl: Remove unnecessary () used with abs_diff() Damien Lespiau
2015-05-27 18:42   ` Paulo Zanoni
2015-05-07 17:38 ` [PATCH 09/13] drm/i915/skl: Use MISSING_CASE() in skl_wrpll_params_populate() Damien Lespiau
2015-05-27 18:40   ` Paulo Zanoni
2015-05-28  7:51     ` Daniel Vetter
2015-05-28 14:06       ` Paulo Zanoni
2015-06-03 12:42         ` Damien Lespiau
2015-05-07 17:38 ` [PATCH 10/13] drm/i915: Correctly prefix HSW/BDW HDMI clock functions Damien Lespiau
2015-05-27 19:54   ` Paulo Zanoni
2015-05-07 17:38 ` [PATCH 11/13] drm/i915/skl: Don't try to store the wrong central frequency Damien Lespiau
2015-05-27 19:58   ` Paulo Zanoni
2015-05-28  7:53     ` Daniel Vetter
2015-05-07 17:38 ` [PATCH 12/13] drm/i915/skl: Replace the HDMI DPLL divider computation algorithm Damien Lespiau
2015-05-27 21:28   ` Paulo Zanoni
2015-05-27 21:51     ` Paulo Zanoni
2015-06-25 15:00       ` Damien Lespiau
2015-06-25 15:15       ` [PATCH 12/13 v2] " Damien Lespiau
2015-06-26 17:09         ` Paulo Zanoni
2015-06-25 10:21     ` [PATCH 12/13] " Damien Lespiau
2015-05-07 17:38 ` [PATCH 13/13] drm/i915/skl: Prefer even dividers for SKL DPLLs Damien Lespiau
2015-05-08 12:22   ` shuang.he
2015-05-27 21:39   ` Paulo Zanoni
2015-05-27 22:08     ` Paulo Zanoni
2015-06-25 15:18       ` Damien Lespiau
2015-06-25 15:19       ` Damien Lespiau [this message]
2015-06-26 17:08         ` [PATCH 13/13 v2] " Paulo Zanoni
2015-06-26 17:39           ` Daniel Vetter

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