From: Rajendra Nayak <rnayak@codeaurora.org> To: sboyd@codeaurora.org, mturquette@baylibre.com Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, georgi.djakov@linaro.org, svarbanov@mm-sol.com, srinivas.kandagatla@linaro.org, sviau@codeaurora.org, Rajendra Nayak <rnayak@codeaurora.org> Subject: [PATCH v8 05/13] clk: qcom: gdsc: Add GDSCs in msm8916 GCC Date: Thu, 6 Aug 2015 16:07:46 +0530 [thread overview] Message-ID: <1438857474-20262-6-git-send-email-rnayak@codeaurora.org> (raw) In-Reply-To: <1438857474-20262-1-git-send-email-rnayak@codeaurora.org> Add all data for the GDSCs which are part of msm8916 GCC block. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- drivers/clk/qcom/Kconfig | 1 + drivers/clk/qcom/gcc-msm8916.c | 51 ++++++++++++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-msm8916.h | 8 +++++ 3 files changed, 60 insertions(+) diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index d3a695b..abec45a 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -53,6 +53,7 @@ config MSM_GCC_8660 config MSM_GCC_8916 tristate "MSM8916 Global Clock Controller" + select QCOM_GDSC depends on COMMON_CLK_QCOM help Support for the global clock controller on msm8916 devices. diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c index c66f7bc..10ba745 100644 --- a/drivers/clk/qcom/gcc-msm8916.c +++ b/drivers/clk/qcom/gcc-msm8916.c @@ -31,6 +31,7 @@ #include "clk-rcg.h" #include "clk-branch.h" #include "reset.h" +#include "gdsc.h" enum { P_XO, @@ -2562,6 +2563,46 @@ static struct clk_branch gcc_venus0_vcodec0_clk = { }, }; +static struct gdsc venus_gdsc = { + .gdscr = 0x4c018, + .pd = { + .name = "venus", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc mdss_gdsc = { + .gdscr = 0x4d078, + .pd = { + .name = "mdss", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc jpeg_gdsc = { + .gdscr = 0x5701c, + .pd = { + .name = "jpeg", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc vfe_gdsc = { + .gdscr = 0x58034, + .pd = { + .name = "vfe", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc oxili_gdsc = { + .gdscr = 0x5901c, + .pd = { + .name = "oxili", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + static struct clk_regmap *gcc_msm8916_clocks[] = { [GPLL0] = &gpll0.clkr, [GPLL0_VOTE] = &gpll0_vote, @@ -2703,6 +2744,14 @@ static struct clk_regmap *gcc_msm8916_clocks[] = { [GCC_VENUS0_VCODEC0_CLK] = &gcc_venus0_vcodec0_clk.clkr, }; +static struct gdsc *gcc_msm8916_gdscs[] = { + [VENUS_GDSC] = &venus_gdsc, + [MDSS_GDSC] = &mdss_gdsc, + [JPEG_GDSC] = &jpeg_gdsc, + [VFE_GDSC] = &vfe_gdsc, + [OXILI_GDSC] = &oxili_gdsc, +}; + static const struct qcom_reset_map gcc_msm8916_resets[] = { [GCC_BLSP1_BCR] = { 0x01000 }, [GCC_BLSP1_QUP1_BCR] = { 0x02000 }, @@ -2810,6 +2859,8 @@ static const struct qcom_cc_desc gcc_msm8916_desc = { .num_clks = ARRAY_SIZE(gcc_msm8916_clocks), .resets = gcc_msm8916_resets, .num_resets = ARRAY_SIZE(gcc_msm8916_resets), + .gdscs = gcc_msm8916_gdscs, + .num_gdscs = ARRAY_SIZE(gcc_msm8916_gdscs), }; static const struct of_device_id gcc_msm8916_match_table[] = { diff --git a/include/dt-bindings/clock/qcom,gcc-msm8916.h b/include/dt-bindings/clock/qcom,gcc-msm8916.h index e430f64..11566c5 100644 --- a/include/dt-bindings/clock/qcom,gcc-msm8916.h +++ b/include/dt-bindings/clock/qcom,gcc-msm8916.h @@ -153,4 +153,12 @@ #define GCC_VENUS0_AXI_CLK 136 #define GCC_VENUS0_VCODEC0_CLK 137 +/* Indexes for GDSCs */ +#define BIMC_GDSC 0 +#define VENUS_GDSC 1 +#define MDSS_GDSC 2 +#define JPEG_GDSC 3 +#define VFE_GDSC 4 +#define OXILI_GDSC 5 + #endif -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: rnayak@codeaurora.org (Rajendra Nayak) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v8 05/13] clk: qcom: gdsc: Add GDSCs in msm8916 GCC Date: Thu, 6 Aug 2015 16:07:46 +0530 [thread overview] Message-ID: <1438857474-20262-6-git-send-email-rnayak@codeaurora.org> (raw) In-Reply-To: <1438857474-20262-1-git-send-email-rnayak@codeaurora.org> Add all data for the GDSCs which are part of msm8916 GCC block. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- drivers/clk/qcom/Kconfig | 1 + drivers/clk/qcom/gcc-msm8916.c | 51 ++++++++++++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-msm8916.h | 8 +++++ 3 files changed, 60 insertions(+) diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig index d3a695b..abec45a 100644 --- a/drivers/clk/qcom/Kconfig +++ b/drivers/clk/qcom/Kconfig @@ -53,6 +53,7 @@ config MSM_GCC_8660 config MSM_GCC_8916 tristate "MSM8916 Global Clock Controller" + select QCOM_GDSC depends on COMMON_CLK_QCOM help Support for the global clock controller on msm8916 devices. diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c index c66f7bc..10ba745 100644 --- a/drivers/clk/qcom/gcc-msm8916.c +++ b/drivers/clk/qcom/gcc-msm8916.c @@ -31,6 +31,7 @@ #include "clk-rcg.h" #include "clk-branch.h" #include "reset.h" +#include "gdsc.h" enum { P_XO, @@ -2562,6 +2563,46 @@ static struct clk_branch gcc_venus0_vcodec0_clk = { }, }; +static struct gdsc venus_gdsc = { + .gdscr = 0x4c018, + .pd = { + .name = "venus", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc mdss_gdsc = { + .gdscr = 0x4d078, + .pd = { + .name = "mdss", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc jpeg_gdsc = { + .gdscr = 0x5701c, + .pd = { + .name = "jpeg", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc vfe_gdsc = { + .gdscr = 0x58034, + .pd = { + .name = "vfe", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + +static struct gdsc oxili_gdsc = { + .gdscr = 0x5901c, + .pd = { + .name = "oxili", + }, + .pwrsts = PWRSTS_OFF_ON, +}; + static struct clk_regmap *gcc_msm8916_clocks[] = { [GPLL0] = &gpll0.clkr, [GPLL0_VOTE] = &gpll0_vote, @@ -2703,6 +2744,14 @@ static struct clk_regmap *gcc_msm8916_clocks[] = { [GCC_VENUS0_VCODEC0_CLK] = &gcc_venus0_vcodec0_clk.clkr, }; +static struct gdsc *gcc_msm8916_gdscs[] = { + [VENUS_GDSC] = &venus_gdsc, + [MDSS_GDSC] = &mdss_gdsc, + [JPEG_GDSC] = &jpeg_gdsc, + [VFE_GDSC] = &vfe_gdsc, + [OXILI_GDSC] = &oxili_gdsc, +}; + static const struct qcom_reset_map gcc_msm8916_resets[] = { [GCC_BLSP1_BCR] = { 0x01000 }, [GCC_BLSP1_QUP1_BCR] = { 0x02000 }, @@ -2810,6 +2859,8 @@ static const struct qcom_cc_desc gcc_msm8916_desc = { .num_clks = ARRAY_SIZE(gcc_msm8916_clocks), .resets = gcc_msm8916_resets, .num_resets = ARRAY_SIZE(gcc_msm8916_resets), + .gdscs = gcc_msm8916_gdscs, + .num_gdscs = ARRAY_SIZE(gcc_msm8916_gdscs), }; static const struct of_device_id gcc_msm8916_match_table[] = { diff --git a/include/dt-bindings/clock/qcom,gcc-msm8916.h b/include/dt-bindings/clock/qcom,gcc-msm8916.h index e430f64..11566c5 100644 --- a/include/dt-bindings/clock/qcom,gcc-msm8916.h +++ b/include/dt-bindings/clock/qcom,gcc-msm8916.h @@ -153,4 +153,12 @@ #define GCC_VENUS0_AXI_CLK 136 #define GCC_VENUS0_VCODEC0_CLK 137 +/* Indexes for GDSCs */ +#define BIMC_GDSC 0 +#define VENUS_GDSC 1 +#define MDSS_GDSC 2 +#define JPEG_GDSC 3 +#define VFE_GDSC 4 +#define OXILI_GDSC 5 + #endif -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2015-08-06 10:39 UTC|newest] Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-08-06 10:37 [PATCH v8 00/13] qcom: Add support for GDSCs Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-06 10:37 ` [PATCH v8 01/13] clk: " Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-11 6:59 ` Stephen Boyd 2015-08-11 6:59 ` Stephen Boyd 2015-08-06 10:37 ` [PATCH v8 02/13] clk: qcom: gdsc: Prepare common clk probe to register gdscs Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-11 6:59 ` Stephen Boyd 2015-08-11 6:59 ` Stephen Boyd 2015-08-06 10:37 ` [PATCH v8 03/13] clk: qcom: gdsc: Add support for Memory RET/OFF Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-11 6:59 ` Stephen Boyd 2015-08-11 6:59 ` Stephen Boyd 2015-08-06 10:37 ` [PATCH v8 04/13] clk: qcom: gdsc: Add support for ON only state Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-11 6:59 ` Stephen Boyd 2015-08-11 6:59 ` Stephen Boyd 2015-08-06 10:37 ` Rajendra Nayak [this message] 2015-08-06 10:37 ` [PATCH v8 05/13] clk: qcom: gdsc: Add GDSCs in msm8916 GCC Rajendra Nayak 2015-08-11 6:59 ` Stephen Boyd 2015-08-11 6:59 ` Stephen Boyd 2015-08-06 10:37 ` [PATCH v8 06/13] clk: qcom: gdsc: Add GDSCs in msm8974 GCC Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-11 6:59 ` Stephen Boyd 2015-08-11 6:59 ` Stephen Boyd 2015-08-06 10:37 ` [PATCH v8 07/13] clk: qcom: gdsc: Add GDSCs in msm8974 MMCC Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-11 6:59 ` Stephen Boyd 2015-08-11 6:59 ` Stephen Boyd 2015-08-06 10:37 ` [PATCH v8 08/13] clk: qcom: gdsc: Add GDSCs in apq8084 GCC Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-11 7:01 ` Stephen Boyd 2015-08-11 7:01 ` Stephen Boyd 2015-08-06 10:37 ` [PATCH v8 09/13] clk: qcom: gdsc: Add GDSCs in apq8084 MMCC Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-11 7:02 ` Stephen Boyd 2015-08-11 7:02 ` Stephen Boyd 2015-08-06 10:37 ` [PATCH v8 10/13] arm: dts: qcom: Add #power-domain-cells property Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-11 6:53 ` Stephen Boyd 2015-08-11 6:53 ` Stephen Boyd 2015-08-13 4:24 ` Rajendra Nayak 2015-08-13 4:24 ` Rajendra Nayak 2015-08-14 1:44 ` Stephen Boyd 2015-08-14 1:44 ` Stephen Boyd 2015-08-06 10:37 ` [PATCH v8 11/13] clk: qcom: gdsc: Use PM clocks to control gdsc clocks Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-11 6:52 ` Stephen Boyd 2015-08-11 6:52 ` Stephen Boyd 2015-08-13 4:23 ` Rajendra Nayak 2015-08-13 4:23 ` Rajendra Nayak 2015-11-27 8:29 ` Rajendra Nayak 2015-11-27 8:29 ` Rajendra Nayak 2015-12-01 8:59 ` Stephen Boyd 2015-12-01 8:59 ` Stephen Boyd 2015-08-06 10:37 ` [PATCH v8 12/13] clk: qcom: gdsc: Enable an RCG before turing on the gdsc Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak 2015-08-06 10:37 ` [PATCH v8 13/13] clk: qcom: gdsc: Manage clocks with !CONFIG_PM Rajendra Nayak 2015-08-06 10:37 ` Rajendra Nayak
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