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From: ville.syrjala@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 33/43] drm/i915: Remove dev_priv argument from NEEDS_FORCE_WAKE
Date: Fri, 18 Sep 2015 20:03:46 +0300	[thread overview]
Message-ID: <1442595836-23981-34-git-send-email-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <1442595836-23981-1-git-send-email-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_uncore.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 3294f63..197ca397 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -525,7 +525,7 @@ void assert_forcewakes_inactive(struct drm_i915_private *dev_priv)
 }
 
 /* We give fast paths for the really cool registers */
-#define NEEDS_FORCE_WAKE(dev_priv, reg) \
+#define NEEDS_FORCE_WAKE(reg) \
 	 ((reg) < 0x40000 && (reg) != FORCEWAKE)
 
 #define REG_RANGE(reg, start, end) ((reg) >= (start) && (reg) < (end))
@@ -727,7 +727,7 @@ static u##x \
 gen6_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
 	GEN6_READ_HEADER(x); \
 	hsw_unclaimed_reg_debug(dev_priv, reg, true, true); \
-	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) \
+	if (NEEDS_FORCE_WAKE(reg)) \
 		__force_wake_get(dev_priv, FORCEWAKE_RENDER); \
 	val = __raw_i915_read##x(dev_priv, reg); \
 	hsw_unclaimed_reg_debug(dev_priv, reg, true, false); \
@@ -761,7 +761,7 @@ chv_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
 	GEN6_READ_FOOTER; \
 }
 
-#define SKL_NEEDS_FORCE_WAKE(dev_priv, reg)	\
+#define SKL_NEEDS_FORCE_WAKE(reg) \
 	 ((reg) < 0x40000 && !FORCEWAKE_GEN9_UNCORE_RANGE_OFFSET(reg))
 
 #define __gen9_read(x) \
@@ -770,9 +770,9 @@ gen9_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
 	enum forcewake_domains fw_engine; \
 	GEN6_READ_HEADER(x); \
 	hsw_unclaimed_reg_debug(dev_priv, reg, true, true); \
-	if (!SKL_NEEDS_FORCE_WAKE((dev_priv), (reg)))	\
+	if (!SKL_NEEDS_FORCE_WAKE(reg)) \
 		fw_engine = 0; \
-	else if (FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(reg))	\
+	else if (FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(reg)) \
 		fw_engine = FORCEWAKE_RENDER; \
 	else if (FORCEWAKE_GEN9_MEDIA_RANGE_OFFSET(reg)) \
 		fw_engine = FORCEWAKE_MEDIA; \
@@ -868,7 +868,7 @@ static void \
 gen6_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
 	u32 __fifo_ret = 0; \
 	GEN6_WRITE_HEADER; \
-	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
+	if (NEEDS_FORCE_WAKE(reg)) { \
 		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
 	} \
 	__raw_i915_write##x(dev_priv, reg, val); \
@@ -883,7 +883,7 @@ static void \
 hsw_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace) { \
 	u32 __fifo_ret = 0; \
 	GEN6_WRITE_HEADER; \
-	if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
+	if (NEEDS_FORCE_WAKE(reg)) { \
 		__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
 	} \
 	hsw_unclaimed_reg_debug(dev_priv, reg, false, true); \
@@ -985,7 +985,7 @@ gen9_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, \
 	enum forcewake_domains fw_engine; \
 	GEN6_WRITE_HEADER; \
 	hsw_unclaimed_reg_debug(dev_priv, reg, false, true); \
-	if (!SKL_NEEDS_FORCE_WAKE((dev_priv), (reg)) ||	\
+	if (!SKL_NEEDS_FORCE_WAKE(reg) || \
 	    is_gen9_shadowed(dev_priv, reg)) \
 		fw_engine = 0; \
 	else if (FORCEWAKE_GEN9_RENDER_RANGE_OFFSET(reg)) \
-- 
2.4.6

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  parent reply	other threads:[~2015-09-18 17:05 UTC|newest]

Thread overview: 136+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-18 17:03 [PATCH 00/43] drm/i915: Type safe register read/write and a ton of prep work ville.syrjala
2015-09-18 17:03 ` [PATCH 01/43] drm/i915: Don't pass sdvo_reg to intel_sdvo_select_{ddc, i2c}_bus() ville.syrjala
2015-09-21  7:34   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 02/43] drm/i915: Parametrize LRC registers ville.syrjala
2015-09-21  7:36   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 03/43] drm/i915: Parametrize GEN7_GT_SCRATCH and GEN7_LRA_LIMITS ville.syrjala
2015-09-21  7:37   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 04/43] drm/i915: Parametrize fence registers ville.syrjala
2015-09-21  7:45   ` Jani Nikula
2015-09-21 12:33     ` Ville Syrjälä
2015-09-21 13:07       ` Ville Syrjälä
2015-09-21 15:05   ` [PATCH v2 " ville.syrjala
2015-09-25 12:02     ` Jani Nikula
2015-09-28  8:31       ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 05/43] drm/i915: Parametrize FBC_TAG registers ville.syrjala
2015-09-21  7:46   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 06/43] drm/i915: Parametrize ILK turbo registers ville.syrjala
2015-09-21  7:47   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 07/43] drm/i915: Replace raw numbers with the approproate register name in ILK turbo code ville.syrjala
2015-09-21  7:48   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 08/43] drm/i915: Parametrize TV luma/chroma filter registers ville.syrjala
2015-09-21  7:50   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 09/43] drm/i915: Parametrize DDI_BUF_TRANS registers ville.syrjala
2015-09-21  7:59   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 10/43] drm/i915: Parametrize CSR_PROGRAM registers ville.syrjala
2015-09-23 14:15   ` Mika Kuoppala
2015-09-23 15:17     ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 11/43] drm/i915: Parametrize UOS_RSA_SCRATCH ville.syrjala
2015-09-28 11:39   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 12/43] drm/i915: Add LO/HI PRIVATE_PAT registers ville.syrjala
2015-09-28 11:40   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 13/43] drm/i915: Always use GEN8_RING_PDP_{LDW, UDW} instead of hand rolling the register offsets ville.syrjala
2015-09-28 11:42   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 14/43] drm/i915: Include MCHBAR_MIRROR_BASE in ILK_GDSR ville.syrjala
2015-09-28 11:44   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 15/43] drm/i915: Parametrize PALETTE and LGC_PALETTE ville.syrjala
2015-09-28 11:45   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 16/43] drm/i915: s/_CURACNTR/CURCNTR(PIPE_A)/ ville.syrjala
2015-09-22 16:47   ` [PATCH v2 " ville.syrjala
2015-09-28 11:50     ` Jani Nikula
2015-09-28 13:35       ` Daniel Vetter
2015-09-28 11:49   ` [PATCH " Jani Nikula
2015-09-18 17:03 ` [PATCH 17/43] drm/i915: s/_FDI_RXA_.../FDI_RX_...(PIPE_A)/ ville.syrjala
2015-09-29 14:14   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 18/43] drm/i915: s/_TRANSA_CHICKEN/TRANS_CHICKEN(PIPE_A)/ ville.syrjala
2015-09-29 14:16   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 19/43] drm/i915: s/GET_CFG_CR1_REG/DPLL_CFGCR1/ etc ville.syrjala
2015-09-30 13:44   ` Jani Nikula
2015-09-30 13:53     ` Ville Syrjälä
2015-09-30 14:06   ` [PATCH v2 " ville.syrjala
2015-09-18 17:03 ` [PATCH 20/43] drm/i915: Use paramtrized WRPLL_CTL() ville.syrjala
2015-09-30 13:58   ` Jani Nikula
2015-09-30 14:00     ` Ville Syrjälä
2015-10-26 14:49     ` Ville Syrjälä
2015-09-18 17:03 ` [PATCH 21/43] drm/i915: Add VLV_HDMIB etc. which already include VLV_DISPLAY_BASE ville.syrjala
2015-09-28 11:53   ` Jani Nikula
2015-09-18 17:03 ` [PATCH 22/43] drm/i915: s/DDI_BUF_CTL_A/DDI_BUF_CTL(PORT_A)/ ville.syrjala
2015-09-28 11:53   ` Jani Nikula
2015-09-28 13:38     ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 23/43] drm/i915: Eliminate weird parameter inversion from BXT PPS registers ville.syrjala
2015-10-12 16:41   ` [PATCH v2 " ville.syrjala
2015-09-18 17:03 ` [PATCH 24/43] drm/i915: Parametrize HSW video DIP data registers ville.syrjala
2015-10-12 15:54   ` Jesse Barnes
2015-10-12 16:15     ` Ville Syrjälä
2015-09-18 17:03 ` [PATCH 25/43] drm/i915: Include gpio_mmio_base in GMBUS reg defines ville.syrjala
2015-10-12 15:56   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 26/43] drm/i915: Protect register macro arguments ville.syrjala
2015-10-12 16:03   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 27/43] drm/i915: Fix a few bad hex numbers in register defines ville.syrjala
2015-10-12 16:04   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 28/43] drm/i915: Turn GEN5_ASSERT_IIR_IS_ZERO() into a function ville.syrjala
2015-10-12 16:05   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 29/43] drm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc ville.syrjala
2015-10-12 16:06   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 30/43] drm/i915: Parametrize and fix SWF registers ville.syrjala
2015-10-12 16:07   ` Jesse Barnes
2015-10-12 16:17     ` Ville Syrjälä
2015-09-18 17:03 ` [PATCH 31/43] drm/i915: Throw out some useless variables ville.syrjala
2015-09-22 16:50   ` [PATCH v2 " ville.syrjala
2015-10-12 16:09     ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 32/43] drm/i915: Clean up LVDS register handling ville.syrjala
2015-10-12 16:09   ` Jesse Barnes
2015-11-01 15:33   ` Lukas Wunner
2015-11-04 16:59     ` Ville Syrjälä
2015-09-18 17:03 ` ville.syrjala [this message]
2015-10-12 16:12   ` [PATCH 33/43] drm/i915: Remove dev_priv argument from NEEDS_FORCE_WAKE Jesse Barnes
2015-10-13 11:21     ` Daniel Vetter
2015-09-18 17:03 ` [PATCH 34/43] drm/i915: Turn __raw_i915_read8() & co. in to inline functions ville.syrjala
2015-09-18 17:03 ` [PATCH 35/43] drm/i915: Move __raw_i915_read8() & co. into i915_drv.h ville.syrjala
2015-09-18 17:42   ` Chris Wilson
2015-09-18 18:23     ` Ville Syrjälä
2015-09-18 18:33       ` Chris Wilson
2015-09-18 18:37         ` Ville Syrjälä
2015-09-18 18:44           ` Chris Wilson
2015-09-18 19:26             ` Ville Syrjälä
2015-09-21 16:26               ` Jesse Barnes
2015-09-21 16:53                 ` Ville Syrjälä
2015-09-21 16:57                   ` Jesse Barnes
2015-09-18 17:03 ` [PATCH 36/43] drm/i915: Remove the magic AUX_CTL is at DP + foo tricks ville.syrjala
2015-09-18 17:03 ` [PATCH 37/43] drm/i915: Replace the aux ddc name switch statement with a table ville.syrjala
2015-09-18 17:03 ` [PATCH 38/43] drm/i915: Parametrize AUX registes ville.syrjala
2015-09-28 12:15   ` Jani Nikula
2015-09-28 13:28     ` Daniel Vetter
2015-09-28 13:34       ` Ville Syrjälä
2015-09-28 13:52         ` Daniel Vetter
2015-09-28 13:57           ` Jani Nikula
2015-09-28 15:09   ` [PATCH v2 38/43] drm/i915: Parametrize AUX registers ville.syrjala
2015-10-20 13:05     ` Jani Nikula
2015-10-20 13:37       ` Ville Syrjälä
2015-10-20 14:00     ` [PATCH v3 " ville.syrjala
2015-10-21  7:08       ` Jani Nikula
2015-09-18 17:03 ` [PATCH 39/43] drm/i915: Add dev_priv->psr_mmio_base ville.syrjala
2015-10-20 13:08   ` Jani Nikula
2015-10-20 14:01   ` [PATCH v2 " ville.syrjala
2015-10-21  7:09     ` Jani Nikula
2015-09-18 17:03 ` [PATCH 40/43] drm/i915: Store aux data reg offsets in intel_dp->aux_ch_data_reg[] ville.syrjala
2015-09-28 12:28   ` Jani Nikula
2015-09-28 14:36     ` Ville Syrjälä
2015-09-28 15:10   ` [PATCH v2 " ville.syrjala
2015-10-20 14:02     ` [PATCH v3 " ville.syrjala
2015-09-18 17:03 ` [PATCH 41/43] drm/i915: Model PSR AUX register selection more like the normal AUX code ville.syrjala
2015-09-28 15:11   ` [PATCH v2 " ville.syrjala
2015-09-18 17:03 ` [PATCH 42/43] drm/i915: Prefix raw register defines with underscore ville.syrjala
2015-09-18 17:03 ` [RFC][PATCH 43/43] WIP: drm/i915: Type safe register read/write ville.syrjala
2015-09-18 17:33   ` Chris Wilson
2015-09-18 17:43     ` Ville Syrjälä
2015-09-18 18:12       ` Chris Wilson
2015-09-18 18:34         ` Ville Syrjälä
2015-09-23 15:23   ` Daniel Vetter
2015-09-24 15:38     ` Ville Syrjälä
2015-09-28 12:56       ` Jani Nikula
2015-09-28 13:03         ` Ville Syrjälä
2015-09-28 13:52           ` Daniel Vetter
2015-09-18 18:17 ` [PATCH 00/43] drm/i915: Type safe register read/write and a ton of prep work Chris Wilson
2015-09-22 17:41 ` Ville Syrjälä
2015-10-28 12:55 ` Jani Nikula

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