From: Rajendra Nayak <rnayak@codeaurora.org> To: edubezval@gmail.com, agross@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rui.zhang@intel.com, sboyd@codeaurora.org, srinivas.kandagatla@linaro.org, nrajan@codeaurora.org, lina.iyer@linaro.org, punit.agrawal@arm.com, Rajendra Nayak <rnayak@codeaurora.org> Subject: [PATCH v4 6/8] arm: dts: apq8064: Add thermal zones, tsens and qfprom nodes Date: Fri, 9 Oct 2015 15:11:08 +0530 [thread overview] Message-ID: <1444383670-32693-7-git-send-email-rnayak@codeaurora.org> (raw) In-Reply-To: <1444383670-32693-1-git-send-email-rnayak@codeaurora.org> TSENS is part of GCC, hence add TSENS properties as part of GCC node. Also add thermal zones and qfprom nodes. Update GCC bindings doc to mention the possibility of optional TSENS properties that can be part of GCC node. Cc: Andy Gross <agross@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- .../devicetree/bindings/clock/qcom,gcc.txt | 20 ++++ arch/arm/boot/dts/qcom-apq8064.dtsi | 101 +++++++++++++++++++++ 2 files changed, 121 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt b/Documentation/devicetree/bindings/clock/qcom,gcc.txt index 54c23f3..f1cf499 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt @@ -18,6 +18,13 @@ Required properties : - #clock-cells : shall contain 1 - #reset-cells : shall contain 1 +Optional properties: +- Qualcomm TSENS (thermal sensor device) on some devices can +be part of GCC and hence the TSENS properties can also be +part of the GCC/clock-controller node. +For more details on the TSENS properties please refer +Documentation/devicetree/bindings/thermal/qcom-tsens.txt + Example: clock-controller@900000 { compatible = "qcom,gcc-msm8960"; @@ -25,3 +32,16 @@ Example: #clock-cells = <1>; #reset-cells = <1>; }; + +Example of GCC with TSENS properties: + clock-controller@900000 { + compatible = "qcom,gcc-apq8064"; + reg = <0x00900000 0x4000>; + nvmem-cells = <&tsens_calib>, <&tsens_backup>; + nvmem-cell-names = "calib", "calib_backup"; + qcom,tsens-slopes = <1176 1176 1154 1176 1111 + 1132 1132 1199 1132 1199 1132>; + #clock-cells = <1>; + #reset-cells = <1>; + #thermal-sensor-cells = <1>; + }; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index d2e94d6..6a0866b 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -75,6 +75,88 @@ }; }; + thermal-zones { + cpu-thermal0 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 7>; + + trips { + cpu_alert0: trip@0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit0: trip@1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal1 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 8>; + + trips { + cpu_alert1: trip@0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit1: trip@1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal2 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 9>; + + trips { + cpu_alert2: trip@0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit2: trip@1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal3 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 10>; + + trips { + cpu_alert3: trip@0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit3: trip@1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + cpu-pmu { compatible = "qcom,krait-pmu"; interrupts = <1 10 0x304>; @@ -364,11 +446,30 @@ }; }; + qfprom: qfprom@00700000 { + compatible = "qcom,qfprom"; + reg = <0x00700000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + tsens_calib: calib { + reg = <0x404 0x10>; + }; + tsens_backup: backup_calib { + reg = <0x414 0x10>; + }; + }; + gcc: clock-controller@900000 { compatible = "qcom,gcc-apq8064"; reg = <0x00900000 0x4000>; + nvmem-cells = <&tsens_calib>, <&tsens_backup>; + nvmem-cell-names = "calib", "calib_backup"; + qcom,tsens-slopes = <1176 1176 1154 1176 1111 + 1132 1132 1199 1132 1199 1132>; #clock-cells = <1>; #reset-cells = <1>; + #thermal-sensor-cells = <1>; }; lcc: clock-controller@28000000 { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: rnayak@codeaurora.org (Rajendra Nayak) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 6/8] arm: dts: apq8064: Add thermal zones, tsens and qfprom nodes Date: Fri, 9 Oct 2015 15:11:08 +0530 [thread overview] Message-ID: <1444383670-32693-7-git-send-email-rnayak@codeaurora.org> (raw) In-Reply-To: <1444383670-32693-1-git-send-email-rnayak@codeaurora.org> TSENS is part of GCC, hence add TSENS properties as part of GCC node. Also add thermal zones and qfprom nodes. Update GCC bindings doc to mention the possibility of optional TSENS properties that can be part of GCC node. Cc: Andy Gross <agross@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> --- .../devicetree/bindings/clock/qcom,gcc.txt | 20 ++++ arch/arm/boot/dts/qcom-apq8064.dtsi | 101 +++++++++++++++++++++ 2 files changed, 121 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt b/Documentation/devicetree/bindings/clock/qcom,gcc.txt index 54c23f3..f1cf499 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc.txt +++ b/Documentation/devicetree/bindings/clock/qcom,gcc.txt @@ -18,6 +18,13 @@ Required properties : - #clock-cells : shall contain 1 - #reset-cells : shall contain 1 +Optional properties: +- Qualcomm TSENS (thermal sensor device) on some devices can +be part of GCC and hence the TSENS properties can also be +part of the GCC/clock-controller node. +For more details on the TSENS properties please refer +Documentation/devicetree/bindings/thermal/qcom-tsens.txt + Example: clock-controller at 900000 { compatible = "qcom,gcc-msm8960"; @@ -25,3 +32,16 @@ Example: #clock-cells = <1>; #reset-cells = <1>; }; + +Example of GCC with TSENS properties: + clock-controller at 900000 { + compatible = "qcom,gcc-apq8064"; + reg = <0x00900000 0x4000>; + nvmem-cells = <&tsens_calib>, <&tsens_backup>; + nvmem-cell-names = "calib", "calib_backup"; + qcom,tsens-slopes = <1176 1176 1154 1176 1111 + 1132 1132 1199 1132 1199 1132>; + #clock-cells = <1>; + #reset-cells = <1>; + #thermal-sensor-cells = <1>; + }; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index d2e94d6..6a0866b 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -75,6 +75,88 @@ }; }; + thermal-zones { + cpu-thermal0 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 7>; + + trips { + cpu_alert0: trip at 0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit0: trip at 1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal1 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 8>; + + trips { + cpu_alert1: trip at 0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit1: trip at 1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal2 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 9>; + + trips { + cpu_alert2: trip at 0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit2: trip at 1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cpu-thermal3 { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&gcc 10>; + + trips { + cpu_alert3: trip at 0 { + temperature = <75000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit3: trip at 1 { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + cpu-pmu { compatible = "qcom,krait-pmu"; interrupts = <1 10 0x304>; @@ -364,11 +446,30 @@ }; }; + qfprom: qfprom at 00700000 { + compatible = "qcom,qfprom"; + reg = <0x00700000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + tsens_calib: calib { + reg = <0x404 0x10>; + }; + tsens_backup: backup_calib { + reg = <0x414 0x10>; + }; + }; + gcc: clock-controller at 900000 { compatible = "qcom,gcc-apq8064"; reg = <0x00900000 0x4000>; + nvmem-cells = <&tsens_calib>, <&tsens_backup>; + nvmem-cell-names = "calib", "calib_backup"; + qcom,tsens-slopes = <1176 1176 1154 1176 1111 + 1132 1132 1199 1132 1199 1132>; #clock-cells = <1>; #reset-cells = <1>; + #thermal-sensor-cells = <1>; }; lcc: clock-controller at 28000000 { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2015-10-09 9:41 UTC|newest] Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-10-09 9:41 [PATCH v4 0/8] qcom: Add support for TSENS driver Rajendra Nayak 2015-10-09 9:41 ` Rajendra Nayak 2015-10-09 9:41 ` [PATCH v4 1/8] thermal: qcom: tsens: Add a skeletal TSENS drivers Rajendra Nayak 2015-10-09 9:41 ` Rajendra Nayak 2015-11-02 20:30 ` Eduardo Valentin 2015-11-02 20:30 ` Eduardo Valentin 2015-11-05 6:53 ` Rajendra Nayak 2015-11-05 6:53 ` Rajendra Nayak 2015-11-30 7:09 ` Rajendra Nayak 2015-11-30 7:09 ` Rajendra Nayak 2015-12-10 14:58 ` Rajendra Nayak 2015-12-10 14:58 ` Rajendra Nayak 2015-11-02 21:09 ` Eduardo Valentin 2015-11-02 21:09 ` Eduardo Valentin 2015-10-09 9:41 ` [PATCH v4 2/8] thermal: qcom: tsens-8916: Add support for 8916 family of SoCs Rajendra Nayak 2015-10-09 9:41 ` Rajendra Nayak 2015-11-02 20:42 ` Eduardo Valentin 2015-11-02 20:42 ` Eduardo Valentin 2015-11-05 7:10 ` Rajendra Nayak 2015-11-05 7:10 ` Rajendra Nayak 2015-10-09 9:41 ` [PATCH v4 3/8] thermal: qcom: tsens-8974: Add support for 8974 " Rajendra Nayak 2015-10-09 9:41 ` Rajendra Nayak 2015-10-09 9:41 ` [PATCH v4 4/8] thermal: qcom: tsens-8960: Add support for 8960 " Rajendra Nayak 2015-10-09 9:41 ` Rajendra Nayak 2015-11-02 20:51 ` Eduardo Valentin 2015-11-02 20:51 ` Eduardo Valentin 2015-11-05 8:05 ` Rajendra Nayak 2015-11-05 8:05 ` Rajendra Nayak 2015-10-09 9:41 ` [PATCH v4 5/8] arm: dts: msm8974: Add thermal zones, tsens and qfprom nodes Rajendra Nayak 2015-10-09 9:41 ` Rajendra Nayak 2015-10-09 9:41 ` Rajendra Nayak [this message] 2015-10-09 9:41 ` [PATCH v4 6/8] arm: dts: apq8064: " Rajendra Nayak 2015-10-09 9:41 ` [PATCH v4 7/8] arm: dts: apq8084: " Rajendra Nayak 2015-10-09 9:41 ` Rajendra Nayak 2015-10-09 9:41 ` [PATCH v4 8/8] arm64: dts: msm8916: " Rajendra Nayak 2015-10-09 9:41 ` Rajendra Nayak 2015-11-02 20:13 ` [PATCH v4 0/8] qcom: Add support for TSENS driver Eduardo Valentin 2015-11-02 20:13 ` Eduardo Valentin 2015-11-02 20:14 ` Eduardo Valentin 2015-11-02 20:14 ` Eduardo Valentin 2015-11-05 6:51 ` Rajendra Nayak 2015-11-05 6:51 ` Rajendra Nayak 2015-11-02 20:54 ` Eduardo Valentin 2015-11-02 20:54 ` Eduardo Valentin 2015-11-05 8:09 ` Rajendra Nayak 2015-11-05 8:09 ` Rajendra Nayak
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