All of lore.kernel.org
 help / color / mirror / Atom feed
From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl,
	alexander.shishkin@linux.intel.com, acme@kernel.org,
	mingo@redhat.com, corbet@lwn.net, nicolas.pitre@linaro.org
Cc: adrian.hunter@intel.com, zhang.chunyan@linaro.org,
	mike.leach@arm.com, tor@ti.com, al.grant@arm.com,
	pawel.moll@arm.com, linux-arm-kernel@lists.infradead.org,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	mathieu.poirier@linaro.org
Subject: [PATCH V2 28/30] perf tools: making coresight PMU listable
Date: Sun, 18 Oct 2015 12:24:45 -0600	[thread overview]
Message-ID: <1445192687-24112-29-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1445192687-24112-1-git-send-email-mathieu.poirier@linaro.org>

Adding the required mechanic allowing 'perf list pmu' to
discover coresight ETM/PTM tracers.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 tools/perf/arch/arm/util/Build |  2 ++
 tools/perf/arch/arm/util/pmu.c | 18 ++++++++++++++++++
 tools/perf/builtin-inject.c    |  2 +-
 tools/perf/builtin-record.c    |  2 +-
 tools/perf/config/Makefile     | 20 ++++++++++++++------
 tools/perf/util/auxtrace.h     |  2 +-
 6 files changed, 37 insertions(+), 9 deletions(-)
 create mode 100644 tools/perf/arch/arm/util/pmu.c

diff --git a/tools/perf/arch/arm/util/Build b/tools/perf/arch/arm/util/Build
index d22e3d07de3d..371a3bf12297 100644
--- a/tools/perf/arch/arm/util/Build
+++ b/tools/perf/arch/arm/util/Build
@@ -2,3 +2,5 @@ libperf-$(CONFIG_DWARF) += dwarf-regs.o
 
 libperf-$(CONFIG_LIBUNWIND)          += unwind-libunwind.o
 libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
+
+libperf-$(CONFIG_AUXTRACE_ARM) += pmu.o
diff --git a/tools/perf/arch/arm/util/pmu.c b/tools/perf/arch/arm/util/pmu.c
new file mode 100644
index 000000000000..2870a4e04e48
--- /dev/null
+++ b/tools/perf/arch/arm/util/pmu.c
@@ -0,0 +1,18 @@
+#include <string.h>
+
+#include <linux/coresight-pmu.h>
+#include <linux/perf_event.h>
+
+#include "../../util/pmu.h"
+
+struct perf_event_attr
+*perf_pmu__get_default_config(struct perf_pmu *pmu __maybe_unused)
+{
+#ifdef HAVE_AUXTRACE_SUPPORT_ARM
+	if (!strcmp(pmu->name, CORESIGHT_ETM_PMU_NAME)) {
+		/* add ETM default config here */
+		pmu->selectable = true;
+	}
+#endif
+	return NULL;
+}
diff --git a/tools/perf/builtin-inject.c b/tools/perf/builtin-inject.c
index c19e034b4023..a567cd628156 100644
--- a/tools/perf/builtin-inject.c
+++ b/tools/perf/builtin-inject.c
@@ -95,7 +95,7 @@ static int perf_event__repipe_attr(struct perf_tool *tool,
 	return perf_event__repipe_synth(tool, event);
 }
 
-#ifdef HAVE_AUXTRACE_SUPPORT_X86
+#if defined(HAVE_AUXTRACE_SUPPORT_X86) || defined(HAVE_AUXTRACE_SUPPORT_ARM)
 
 static int copy_bytes(struct perf_inject *inject, int fd, off_t size)
 {
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
index 39cbbdb07891..f37f890f676e 100644
--- a/tools/perf/builtin-record.c
+++ b/tools/perf/builtin-record.c
@@ -141,7 +141,7 @@ static void record__sig_exit(void)
 	raise(signr);
 }
 
-#ifdef HAVE_AUXTRACE_SUPPORT_X86
+#if defined(HAVE_AUXTRACE_SUPPORT_X86) || defined(HAVE_AUXTRACE_SUPPORT_ARM)
 
 static int record__process_auxtrace(struct perf_tool *tool,
 				    union perf_event *event, void *data1,
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
index 5fd4843c691d..62fa7596b507 100644
--- a/tools/perf/config/Makefile
+++ b/tools/perf/config/Makefile
@@ -626,13 +626,21 @@ ifdef LIBBABELTRACE
 endif
 
 ifndef NO_AUXTRACE
-  ifeq ($(feature-get_cpuid), 0)
-    msg := $(warning Your gcc lacks the __get_cpuid() builtin, disables support for auxtrace/Intel PT, please install a newer gcc);
-    NO_AUXTRACE := 1
+  ifeq ($(ARCH),x86)
+    ifeq ($(feature-get_cpuid), 0)
+      msg := $(warning Your gcc lacks the __get_cpuid() builtin, disables support for auxtrace/Intel PT, please install a newer gcc);
+      NO_AUXTRACE := 1
+    else
+      $(call detected,CONFIG_AUXTRACE)
+      $(call detected,CONFIG_AUXTRACE_X86)
+      CFLAGS += -DHAVE_AUXTRACE_SUPPORT_X86
+    endif
   else
-    $(call detected,CONFIG_AUXTRACE)
-    $(call detected,CONFIG_AUXTRACE_X86)
-    CFLAGS += -DHAVE_AUXTRACE_SUPPORT_X86
+    ifeq ($(ARCH),$(filter $(ARCH), arm arm64))
+      $(call detected,CONFIG_AUXTRACE)
+      $(call detected,CONFIG_AUXTRACE_ARM)
+      CFLAGS += -DHAVE_AUXTRACE_SUPPORT_ARM
+    endif
   endif
 endif
 
diff --git a/tools/perf/util/auxtrace.h b/tools/perf/util/auxtrace.h
index b9ac99fb5a17..ed1c940be883 100644
--- a/tools/perf/util/auxtrace.h
+++ b/tools/perf/util/auxtrace.h
@@ -309,7 +309,7 @@ struct auxtrace_record {
 	unsigned int alignment;
 };
 
-#ifdef HAVE_AUXTRACE_SUPPORT_X86
+#if defined(HAVE_AUXTRACE_SUPPORT_X86) || defined(HAVE_AUXTRACE_SUPPORT_ARM)
 
 /*
  * In snapshot mode the mmapped page is read-only which makes using
-- 
1.9.1


WARNING: multiple messages have this Message-ID (diff)
From: mathieu.poirier@linaro.org (Mathieu Poirier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 28/30] perf tools: making coresight PMU listable
Date: Sun, 18 Oct 2015 12:24:45 -0600	[thread overview]
Message-ID: <1445192687-24112-29-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1445192687-24112-1-git-send-email-mathieu.poirier@linaro.org>

Adding the required mechanic allowing 'perf list pmu' to
discover coresight ETM/PTM tracers.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 tools/perf/arch/arm/util/Build |  2 ++
 tools/perf/arch/arm/util/pmu.c | 18 ++++++++++++++++++
 tools/perf/builtin-inject.c    |  2 +-
 tools/perf/builtin-record.c    |  2 +-
 tools/perf/config/Makefile     | 20 ++++++++++++++------
 tools/perf/util/auxtrace.h     |  2 +-
 6 files changed, 37 insertions(+), 9 deletions(-)
 create mode 100644 tools/perf/arch/arm/util/pmu.c

diff --git a/tools/perf/arch/arm/util/Build b/tools/perf/arch/arm/util/Build
index d22e3d07de3d..371a3bf12297 100644
--- a/tools/perf/arch/arm/util/Build
+++ b/tools/perf/arch/arm/util/Build
@@ -2,3 +2,5 @@ libperf-$(CONFIG_DWARF) += dwarf-regs.o
 
 libperf-$(CONFIG_LIBUNWIND)          += unwind-libunwind.o
 libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
+
+libperf-$(CONFIG_AUXTRACE_ARM) += pmu.o
diff --git a/tools/perf/arch/arm/util/pmu.c b/tools/perf/arch/arm/util/pmu.c
new file mode 100644
index 000000000000..2870a4e04e48
--- /dev/null
+++ b/tools/perf/arch/arm/util/pmu.c
@@ -0,0 +1,18 @@
+#include <string.h>
+
+#include <linux/coresight-pmu.h>
+#include <linux/perf_event.h>
+
+#include "../../util/pmu.h"
+
+struct perf_event_attr
+*perf_pmu__get_default_config(struct perf_pmu *pmu __maybe_unused)
+{
+#ifdef HAVE_AUXTRACE_SUPPORT_ARM
+	if (!strcmp(pmu->name, CORESIGHT_ETM_PMU_NAME)) {
+		/* add ETM default config here */
+		pmu->selectable = true;
+	}
+#endif
+	return NULL;
+}
diff --git a/tools/perf/builtin-inject.c b/tools/perf/builtin-inject.c
index c19e034b4023..a567cd628156 100644
--- a/tools/perf/builtin-inject.c
+++ b/tools/perf/builtin-inject.c
@@ -95,7 +95,7 @@ static int perf_event__repipe_attr(struct perf_tool *tool,
 	return perf_event__repipe_synth(tool, event);
 }
 
-#ifdef HAVE_AUXTRACE_SUPPORT_X86
+#if defined(HAVE_AUXTRACE_SUPPORT_X86) || defined(HAVE_AUXTRACE_SUPPORT_ARM)
 
 static int copy_bytes(struct perf_inject *inject, int fd, off_t size)
 {
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
index 39cbbdb07891..f37f890f676e 100644
--- a/tools/perf/builtin-record.c
+++ b/tools/perf/builtin-record.c
@@ -141,7 +141,7 @@ static void record__sig_exit(void)
 	raise(signr);
 }
 
-#ifdef HAVE_AUXTRACE_SUPPORT_X86
+#if defined(HAVE_AUXTRACE_SUPPORT_X86) || defined(HAVE_AUXTRACE_SUPPORT_ARM)
 
 static int record__process_auxtrace(struct perf_tool *tool,
 				    union perf_event *event, void *data1,
diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile
index 5fd4843c691d..62fa7596b507 100644
--- a/tools/perf/config/Makefile
+++ b/tools/perf/config/Makefile
@@ -626,13 +626,21 @@ ifdef LIBBABELTRACE
 endif
 
 ifndef NO_AUXTRACE
-  ifeq ($(feature-get_cpuid), 0)
-    msg := $(warning Your gcc lacks the __get_cpuid() builtin, disables support for auxtrace/Intel PT, please install a newer gcc);
-    NO_AUXTRACE := 1
+  ifeq ($(ARCH),x86)
+    ifeq ($(feature-get_cpuid), 0)
+      msg := $(warning Your gcc lacks the __get_cpuid() builtin, disables support for auxtrace/Intel PT, please install a newer gcc);
+      NO_AUXTRACE := 1
+    else
+      $(call detected,CONFIG_AUXTRACE)
+      $(call detected,CONFIG_AUXTRACE_X86)
+      CFLAGS += -DHAVE_AUXTRACE_SUPPORT_X86
+    endif
   else
-    $(call detected,CONFIG_AUXTRACE)
-    $(call detected,CONFIG_AUXTRACE_X86)
-    CFLAGS += -DHAVE_AUXTRACE_SUPPORT_X86
+    ifeq ($(ARCH),$(filter $(ARCH), arm arm64))
+      $(call detected,CONFIG_AUXTRACE)
+      $(call detected,CONFIG_AUXTRACE_ARM)
+      CFLAGS += -DHAVE_AUXTRACE_SUPPORT_ARM
+    endif
   endif
 endif
 
diff --git a/tools/perf/util/auxtrace.h b/tools/perf/util/auxtrace.h
index b9ac99fb5a17..ed1c940be883 100644
--- a/tools/perf/util/auxtrace.h
+++ b/tools/perf/util/auxtrace.h
@@ -309,7 +309,7 @@ struct auxtrace_record {
 	unsigned int alignment;
 };
 
-#ifdef HAVE_AUXTRACE_SUPPORT_X86
+#if defined(HAVE_AUXTRACE_SUPPORT_X86) || defined(HAVE_AUXTRACE_SUPPORT_ARM)
 
 /*
  * In snapshot mode the mmapped page is read-only which makes using
-- 
1.9.1

  parent reply	other threads:[~2015-10-18 18:26 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-18 18:24 [PATCH V2 00/30] Coresight integration with perf Mathieu Poirier
2015-10-18 18:24 ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 01/30] coresight: etm3x: moving etm_readl/writel to header file Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-19 18:37   ` Greg KH
2015-10-19 18:37     ` Greg KH
2015-10-18 18:24 ` [PATCH V2 02/30] coresight: etm3x: moving sysFS entries to dedicated file Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 03/30] coresight: etm3x: unlocking tracers in default arch init Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 04/30] coresight: etm3x: splitting struct etm_drvdata Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 05/30] coresight: etm3x: set progbit to stop trace collection Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 06/30] coresight: clearly labeling source operarions Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 07/30] coresight: etm3x: moving etm_drvdata::enable to atomic field Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 08/30] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 09/30] coresight: etm3x: changing default trace configuration Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 10/30] coresight: etm3x: consolidating initial config Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 11/30] coresight: etm3x: implementing user/kernel mode tracing Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 12/30] coresight: etm3x: adding perf_get/set_config() API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 13/30] coresight: etm3x: implementing perf_enable/disable() API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 14/30] coresight: etm3x: implementing perf_start/stop() API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 15/30] coresight: making coresight_build_paths() public Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 16/30] coresight: keeping track of enabled sink buffers Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 17/30] perf: changing pmu::setup_aux() parameter to include event Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-19 13:34   ` Alexander Shishkin
2015-10-19 13:34     ` Alexander Shishkin
2015-10-18 18:24 ` [PATCH V2 18/30] coresight: etb10: moving to local atomic operations Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 19/30] coresight: etb10: implementing the setup_aux() API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-19 13:44   ` Alexander Shishkin
2015-10-19 13:44     ` Alexander Shishkin
2015-10-20 16:40     ` Mathieu Poirier
2015-10-20 16:40       ` Mathieu Poirier
2015-10-20 11:37   ` Alexander Shishkin
2015-10-20 11:37     ` Alexander Shishkin
2015-10-18 18:24 ` [PATCH V2 20/30] coresight: etb10: implementing buffer set/reset() API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-20  9:56   ` Alexander Shishkin
2015-10-20  9:56     ` Alexander Shishkin
2015-10-20 17:30     ` Mathieu Poirier
2015-10-20 17:30       ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 21/30] coresight: etb10: implementing buffer update API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-19 15:37   ` Alexander Shishkin
2015-10-19 15:37     ` Alexander Shishkin
2015-10-20 16:43     ` Mathieu Poirier
2015-10-20 16:43       ` Mathieu Poirier
2015-10-20  9:34   ` Alexander Shishkin
2015-10-20  9:34     ` Alexander Shishkin
2015-10-20 19:15     ` Mathieu Poirier
2015-10-20 19:15       ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 23/30] coresight: updating documentation to reflect integration with perf Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 24/30] perf tools: making function set_max_cpu_num() non static Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 25/30] perf tools: adding perf_session to *info_prive_size() Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 26/30] perf tools: making source devices path broadly accessible Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 27/30] perf build: adding X86 auxiliary specific flags Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-19 10:40   ` Adrian Hunter
2015-10-19 10:40     ` Adrian Hunter
2015-10-18 18:24 ` Mathieu Poirier [this message]
2015-10-18 18:24   ` [PATCH V2 28/30] perf tools: making coresight PMU listable Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 29/30] perf tools: adding coresight define for auxtrace Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 30/30] perf tools: adding coresight etm PMU record capabilities Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1445192687-24112-29-git-send-email-mathieu.poirier@linaro.org \
    --to=mathieu.poirier@linaro.org \
    --cc=a.p.zijlstra@chello.nl \
    --cc=acme@kernel.org \
    --cc=adrian.hunter@intel.com \
    --cc=al.grant@arm.com \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=corbet@lwn.net \
    --cc=gregkh@linuxfoundation.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mike.leach@arm.com \
    --cc=mingo@redhat.com \
    --cc=nicolas.pitre@linaro.org \
    --cc=pawel.moll@arm.com \
    --cc=tor@ti.com \
    --cc=zhang.chunyan@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.