From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>
Cc: LABBE Corentin <clabbe.montjoie@gmail.com>,
netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Chen-Yu Tsai <wens@csie.org>
Subject: [PATCH RFC 4/5] ARM: dts: sun8i-h3: Add Ethernet controller device node to sun8i-h3.dtsi
Date: Tue, 5 Apr 2016 00:22:33 +0800 [thread overview]
Message-ID: <1459786954-12649-5-git-send-email-wens@csie.org> (raw)
In-Reply-To: <1459786954-12649-1-git-send-email-wens@csie.org>
From: LABBE Corentin <clabbe.montjoie@gmail.com>
The Allwinner H3 SoC has a gigabit Ethernet controller.
Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
[wens@csie.org: drop pinmux; update clocks/resets]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
This is not a stable binding. Do not merge.
---
arch/arm/boot/dts/sun8i-h3.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 9a28aeba9bc6..7749af6354bb 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -635,6 +635,18 @@
status = "disabled";
};
+ emac: ethernet@1c30000 {
+ compatible = "allwinner,sun8i-h3-emac";
+ reg = <0x01c30000 0x1000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&ahb_rst 17>;
+ reset-names = "ahb";
+ clocks = <&bus_gates 17>, <&ephy>;
+ clock-names = "ahb", "tx";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
--
2.7.0
WARNING: multiple messages have this Message-ID (diff)
From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
LABBE Corentin <clabbe.montjoie@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH RFC 4/5] ARM: dts: sun8i-h3: Add Ethernet controller device node to sun8i-h3.dtsi
Date: Tue, 5 Apr 2016 00:22:33 +0800 [thread overview]
Message-ID: <1459786954-12649-5-git-send-email-wens@csie.org> (raw)
In-Reply-To: <1459786954-12649-1-git-send-email-wens@csie.org>
From: LABBE Corentin <clabbe.montjoie@gmail.com>
The Allwinner H3 SoC has a gigabit Ethernet controller.
Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
[wens@csie.org: drop pinmux; update clocks/resets]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
This is not a stable binding. Do not merge.
---
arch/arm/boot/dts/sun8i-h3.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 9a28aeba9bc6..7749af6354bb 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -635,6 +635,18 @@
status = "disabled";
};
+ emac: ethernet@1c30000 {
+ compatible = "allwinner,sun8i-h3-emac";
+ reg = <0x01c30000 0x1000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&ahb_rst 17>;
+ reset-names = "ahb";
+ clocks = <&bus_gates 17>, <&ephy>;
+ clock-names = "ahb", "tx";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
gic: interrupt-controller@01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
--
2.7.0
WARNING: multiple messages have this Message-ID (diff)
From: wens@csie.org (Chen-Yu Tsai)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH RFC 4/5] ARM: dts: sun8i-h3: Add Ethernet controller device node to sun8i-h3.dtsi
Date: Tue, 5 Apr 2016 00:22:33 +0800 [thread overview]
Message-ID: <1459786954-12649-5-git-send-email-wens@csie.org> (raw)
In-Reply-To: <1459786954-12649-1-git-send-email-wens@csie.org>
From: LABBE Corentin <clabbe.montjoie@gmail.com>
The Allwinner H3 SoC has a gigabit Ethernet controller.
Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com>
[wens at csie.org: drop pinmux; update clocks/resets]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
This is not a stable binding. Do not merge.
---
arch/arm/boot/dts/sun8i-h3.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 9a28aeba9bc6..7749af6354bb 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -635,6 +635,18 @@
status = "disabled";
};
+ emac: ethernet at 1c30000 {
+ compatible = "allwinner,sun8i-h3-emac";
+ reg = <0x01c30000 0x1000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&ahb_rst 17>;
+ reset-names = "ahb";
+ clocks = <&bus_gates 17>, <&ephy>;
+ clock-names = "ahb", "tx";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
gic: interrupt-controller at 01c81000 {
compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
reg = <0x01c81000 0x1000>,
--
2.7.0
next prev parent reply other threads:[~2016-04-04 16:22 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-04 16:22 [PATCH RFC 0/5] net: phy: sun8i-h3-ephy: Add Allwinner H3 Ethernet PHY driver Chen-Yu Tsai
2016-04-04 16:22 ` Chen-Yu Tsai
2016-04-04 16:22 ` Chen-Yu Tsai
2016-04-04 16:22 ` [PATCH RFC 1/5] net: phy: sun8i-h3-ephy: Add bindings for Allwinner H3 Ethernet PHY Chen-Yu Tsai
2016-04-04 16:22 ` Chen-Yu Tsai
2016-04-07 17:57 ` Rob Herring
2016-04-07 17:57 ` Rob Herring
2016-04-07 17:57 ` Rob Herring
2016-04-11 19:23 ` Florian Fainelli
2016-04-11 19:23 ` Florian Fainelli
2016-04-12 1:38 ` Chen-Yu Tsai
2016-04-12 1:38 ` Chen-Yu Tsai
2016-05-07 5:30 ` Chen-Yu Tsai
2016-05-07 5:30 ` Chen-Yu Tsai
2016-05-07 5:30 ` Chen-Yu Tsai
2016-05-07 8:14 ` Hans de Goede
2016-05-07 8:14 ` Hans de Goede
2016-04-04 16:22 ` [PATCH RFC 2/5] net: phy: sun8i-h3-ephy: Add driver " Chen-Yu Tsai
2016-04-04 16:22 ` Chen-Yu Tsai
2016-04-11 19:23 ` Florian Fainelli
2016-04-11 19:23 ` Florian Fainelli
2016-04-11 19:23 ` Florian Fainelli
2016-04-14 2:04 ` Chen-Yu Tsai
2016-04-14 2:04 ` Chen-Yu Tsai
2016-04-04 16:22 ` [PATCH RFC 3/5] ARM: dts: sun8i-h3: Add H3 Ethernet PHY device node to sun8i-h3.dtsi Chen-Yu Tsai
2016-04-04 16:22 ` Chen-Yu Tsai
2016-04-04 16:22 ` Chen-Yu Tsai
2016-04-04 16:22 ` Chen-Yu Tsai [this message]
2016-04-04 16:22 ` [PATCH RFC 4/5] ARM: dts: sun8i-h3: Add Ethernet controller " Chen-Yu Tsai
2016-04-04 16:22 ` Chen-Yu Tsai
2016-04-04 16:22 ` [PATCH RFC 5/5] ARM: dts: sun8i: Enable Ethernet controller on the Orange PI PC Chen-Yu Tsai
2016-04-04 16:22 ` Chen-Yu Tsai
2016-04-11 19:25 ` Florian Fainelli
2016-04-11 19:25 ` Florian Fainelli
2016-04-11 19:25 ` Florian Fainelli
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