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From: Andre Przywara <andre.przywara@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	Christoffer Dall <christoffer.dall@linaro.org>
Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 24/57] KVM: arm/arm64: vgic-new: Add GICv2 MMIO handling framework
Date: Thu, 19 May 2016 19:08:03 +0100	[thread overview]
Message-ID: <1463681316-23039-25-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1463681316-23039-1-git-send-email-andre.przywara@arm.com>

Create vgic-mmio-v2.c to describe GICv2 emulation specific handlers
using the initializer macros provided by the VGIC MMIO framework.
Provide a function to register the GICv2 distributor registers to
the kvm_io_bus framework.
The actual handler functions are still stubs in this patch.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
---
Changelog v1 .. v2:
- new patch, split out from the generic MMIO framework patch
- use a separate file to hold GICv2 emulation specific handlers
- replace _nyi stub functions with raz/wi versions

Changelog v2 .. v3:
- replace kvm/vgic/vgic.h with kvm/arm_vgic.h
- add vgic_register_dist_iodev() prototype

Changelog v3 .. v4:
- specify accessor width

 virt/kvm/arm/vgic/vgic-mmio-v2.c | 76 ++++++++++++++++++++++++++++++++++++++++
 virt/kvm/arm/vgic/vgic-mmio.c    | 26 ++++++++++++++
 virt/kvm/arm/vgic/vgic-mmio.h    |  2 ++
 virt/kvm/arm/vgic/vgic.h         |  2 ++
 4 files changed, 106 insertions(+)
 create mode 100644 virt/kvm/arm/vgic/vgic-mmio-v2.c

diff --git a/virt/kvm/arm/vgic/vgic-mmio-v2.c b/virt/kvm/arm/vgic/vgic-mmio-v2.c
new file mode 100644
index 0000000..a3e31a9
--- /dev/null
+++ b/virt/kvm/arm/vgic/vgic-mmio-v2.c
@@ -0,0 +1,76 @@
+/*
+ * VGICv2 MMIO handling functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/irqchip/arm-gic.h>
+#include <linux/kvm.h>
+#include <linux/kvm_host.h>
+#include <kvm/iodev.h>
+#include <kvm/arm_vgic.h>
+
+#include "vgic.h"
+#include "vgic-mmio.h"
+
+static const struct vgic_register_region vgic_v2_dist_registers[] = {
+	REGISTER_DESC_WITH_LENGTH(GIC_DIST_CTRL,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 12,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_IGROUP,
+		vgic_mmio_read_rao, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ENABLE_SET,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ENABLE_CLEAR,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_PENDING_SET,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_PENDING_CLEAR,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ACTIVE_SET,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ACTIVE_CLEAR,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_PRI,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 8,
+		VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_TARGET,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 8,
+		VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_CONFIG,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 2,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_LENGTH(GIC_DIST_SOFTINT,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 4,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_LENGTH(GIC_DIST_SGI_PENDING_CLEAR,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 16,
+		VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
+	REGISTER_DESC_WITH_LENGTH(GIC_DIST_SGI_PENDING_SET,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 16,
+		VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
+};
+
+unsigned int vgic_v2_init_dist_iodev(struct vgic_io_device *dev)
+{
+	dev->regions = vgic_v2_dist_registers;
+	dev->nr_regions = ARRAY_SIZE(vgic_v2_dist_registers);
+
+	kvm_iodevice_init(&dev->dev, &kvm_io_gic_ops);
+
+	return SZ_4K;
+}
diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c
index 012b82b..1a97765 100644
--- a/virt/kvm/arm/vgic/vgic-mmio.c
+++ b/virt/kvm/arm/vgic/vgic-mmio.c
@@ -182,3 +182,29 @@ struct kvm_io_device_ops kvm_io_gic_ops = {
 	.read = dispatch_mmio_read,
 	.write = dispatch_mmio_write,
 };
+
+int vgic_register_dist_iodev(struct kvm *kvm, gpa_t dist_base_address,
+			     enum vgic_type type)
+{
+	struct vgic_io_device *io_device = &kvm->arch.vgic.dist_iodev;
+	int ret = 0;
+	unsigned int len;
+
+	switch (type) {
+	case VGIC_V2:
+		len = vgic_v2_init_dist_iodev(io_device);
+		break;
+	default:
+		BUG_ON(1);
+	}
+
+	io_device->base_addr = dist_base_address;
+	io_device->redist_vcpu = NULL;
+
+	mutex_lock(&kvm->slots_lock);
+	ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, dist_base_address,
+				      len, &io_device->dev);
+	mutex_unlock(&kvm->slots_lock);
+
+	return ret;
+}
diff --git a/virt/kvm/arm/vgic/vgic-mmio.h b/virt/kvm/arm/vgic/vgic-mmio.h
index 58a1878..b38ff6c 100644
--- a/virt/kvm/arm/vgic/vgic-mmio.h
+++ b/virt/kvm/arm/vgic/vgic-mmio.h
@@ -96,4 +96,6 @@ unsigned long vgic_mmio_read_rao(struct kvm_vcpu *vcpu,
 void vgic_mmio_write_wi(struct kvm_vcpu *vcpu, gpa_t addr,
 			unsigned int len, unsigned long val);
 
+unsigned int vgic_v2_init_dist_iodev(struct vgic_io_device *dev);
+
 #endif
diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
index 81b1a20..fd9acaa 100644
--- a/virt/kvm/arm/vgic/vgic.h
+++ b/virt/kvm/arm/vgic/vgic.h
@@ -27,6 +27,8 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu);
 void vgic_v2_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr);
 void vgic_v2_clear_lr(struct kvm_vcpu *vcpu, int lr);
 void vgic_v2_set_underflow(struct kvm_vcpu *vcpu);
+int vgic_register_dist_iodev(struct kvm *kvm, gpa_t dist_base_address,
+			     enum vgic_type);
 
 #ifdef CONFIG_KVM_ARM_VGIC_V3
 void vgic_v3_process_maintenance(struct kvm_vcpu *vcpu);
-- 
2.8.2

WARNING: multiple messages have this Message-ID (diff)
From: andre.przywara@arm.com (Andre Przywara)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 24/57] KVM: arm/arm64: vgic-new: Add GICv2 MMIO handling framework
Date: Thu, 19 May 2016 19:08:03 +0100	[thread overview]
Message-ID: <1463681316-23039-25-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1463681316-23039-1-git-send-email-andre.przywara@arm.com>

Create vgic-mmio-v2.c to describe GICv2 emulation specific handlers
using the initializer macros provided by the VGIC MMIO framework.
Provide a function to register the GICv2 distributor registers to
the kvm_io_bus framework.
The actual handler functions are still stubs in this patch.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
---
Changelog v1 .. v2:
- new patch, split out from the generic MMIO framework patch
- use a separate file to hold GICv2 emulation specific handlers
- replace _nyi stub functions with raz/wi versions

Changelog v2 .. v3:
- replace kvm/vgic/vgic.h with kvm/arm_vgic.h
- add vgic_register_dist_iodev() prototype

Changelog v3 .. v4:
- specify accessor width

 virt/kvm/arm/vgic/vgic-mmio-v2.c | 76 ++++++++++++++++++++++++++++++++++++++++
 virt/kvm/arm/vgic/vgic-mmio.c    | 26 ++++++++++++++
 virt/kvm/arm/vgic/vgic-mmio.h    |  2 ++
 virt/kvm/arm/vgic/vgic.h         |  2 ++
 4 files changed, 106 insertions(+)
 create mode 100644 virt/kvm/arm/vgic/vgic-mmio-v2.c

diff --git a/virt/kvm/arm/vgic/vgic-mmio-v2.c b/virt/kvm/arm/vgic/vgic-mmio-v2.c
new file mode 100644
index 0000000..a3e31a9
--- /dev/null
+++ b/virt/kvm/arm/vgic/vgic-mmio-v2.c
@@ -0,0 +1,76 @@
+/*
+ * VGICv2 MMIO handling functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/irqchip/arm-gic.h>
+#include <linux/kvm.h>
+#include <linux/kvm_host.h>
+#include <kvm/iodev.h>
+#include <kvm/arm_vgic.h>
+
+#include "vgic.h"
+#include "vgic-mmio.h"
+
+static const struct vgic_register_region vgic_v2_dist_registers[] = {
+	REGISTER_DESC_WITH_LENGTH(GIC_DIST_CTRL,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 12,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_IGROUP,
+		vgic_mmio_read_rao, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ENABLE_SET,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ENABLE_CLEAR,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_PENDING_SET,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_PENDING_CLEAR,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ACTIVE_SET,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ACTIVE_CLEAR,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 1,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_PRI,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 8,
+		VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_TARGET,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 8,
+		VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
+	REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_CONFIG,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 2,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_LENGTH(GIC_DIST_SOFTINT,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 4,
+		VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_LENGTH(GIC_DIST_SGI_PENDING_CLEAR,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 16,
+		VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
+	REGISTER_DESC_WITH_LENGTH(GIC_DIST_SGI_PENDING_SET,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 16,
+		VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
+};
+
+unsigned int vgic_v2_init_dist_iodev(struct vgic_io_device *dev)
+{
+	dev->regions = vgic_v2_dist_registers;
+	dev->nr_regions = ARRAY_SIZE(vgic_v2_dist_registers);
+
+	kvm_iodevice_init(&dev->dev, &kvm_io_gic_ops);
+
+	return SZ_4K;
+}
diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic/vgic-mmio.c
index 012b82b..1a97765 100644
--- a/virt/kvm/arm/vgic/vgic-mmio.c
+++ b/virt/kvm/arm/vgic/vgic-mmio.c
@@ -182,3 +182,29 @@ struct kvm_io_device_ops kvm_io_gic_ops = {
 	.read = dispatch_mmio_read,
 	.write = dispatch_mmio_write,
 };
+
+int vgic_register_dist_iodev(struct kvm *kvm, gpa_t dist_base_address,
+			     enum vgic_type type)
+{
+	struct vgic_io_device *io_device = &kvm->arch.vgic.dist_iodev;
+	int ret = 0;
+	unsigned int len;
+
+	switch (type) {
+	case VGIC_V2:
+		len = vgic_v2_init_dist_iodev(io_device);
+		break;
+	default:
+		BUG_ON(1);
+	}
+
+	io_device->base_addr = dist_base_address;
+	io_device->redist_vcpu = NULL;
+
+	mutex_lock(&kvm->slots_lock);
+	ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, dist_base_address,
+				      len, &io_device->dev);
+	mutex_unlock(&kvm->slots_lock);
+
+	return ret;
+}
diff --git a/virt/kvm/arm/vgic/vgic-mmio.h b/virt/kvm/arm/vgic/vgic-mmio.h
index 58a1878..b38ff6c 100644
--- a/virt/kvm/arm/vgic/vgic-mmio.h
+++ b/virt/kvm/arm/vgic/vgic-mmio.h
@@ -96,4 +96,6 @@ unsigned long vgic_mmio_read_rao(struct kvm_vcpu *vcpu,
 void vgic_mmio_write_wi(struct kvm_vcpu *vcpu, gpa_t addr,
 			unsigned int len, unsigned long val);
 
+unsigned int vgic_v2_init_dist_iodev(struct vgic_io_device *dev);
+
 #endif
diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
index 81b1a20..fd9acaa 100644
--- a/virt/kvm/arm/vgic/vgic.h
+++ b/virt/kvm/arm/vgic/vgic.h
@@ -27,6 +27,8 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu);
 void vgic_v2_populate_lr(struct kvm_vcpu *vcpu, struct vgic_irq *irq, int lr);
 void vgic_v2_clear_lr(struct kvm_vcpu *vcpu, int lr);
 void vgic_v2_set_underflow(struct kvm_vcpu *vcpu);
+int vgic_register_dist_iodev(struct kvm *kvm, gpa_t dist_base_address,
+			     enum vgic_type);
 
 #ifdef CONFIG_KVM_ARM_VGIC_V3
 void vgic_v3_process_maintenance(struct kvm_vcpu *vcpu);
-- 
2.8.2

  parent reply	other threads:[~2016-05-19 18:08 UTC|newest]

Thread overview: 118+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-19 18:07 [PATCH v5 00/57] KVM: arm/arm64: Rework virtual GIC emulation Andre Przywara
2016-05-19 18:07 ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 01/57] KVM: arm/arm64: vgic: streamline vgic_update_irq_pending() interface Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 02/57] KVM: arm/arm64: vgic: avoid map in kvm_vgic_inject_mapped_irq() Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 03/57] KVM: arm/arm64: vgic: avoid map in kvm_vgic_map_is_active() Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 04/57] KVM: arm/arm64: vgic: avoid map in kvm_vgic_unmap_phys_irq() Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 05/57] KVM: arm/arm64: Remove the IRQ field from struct irq_phys_map Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 06/57] KVM: arm/arm64: arch_timer: Remove irq_phys_map Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 07/57] KVM: arm/arm64: vgic: Remove irq_phys_map from interface Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 08/57] KVM: arm/arm64: Move timer IRQ map to latest possible time Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 09/57] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 10/57] KVM: arm/arm64: Fix MMIO emulation data handling Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 11/57] KVM: arm/arm64: Export mmio_read/write_bus Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 12/57] KVM: arm/arm64: pmu: abstract access to number of SPIs Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 13/57] KVM: arm/arm64: Provide functionality to pause and resume a guest Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 14/57] KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 15/57] KVM: arm/arm64: vgic-new: Add data structure definitions Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 16/57] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 17/57] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 18/57] KVM: arm/arm64: vgic-new: Add IRQ sorting Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 19/57] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 20/57] KVM: arm/arm64: vgic-new: Add GICv2 world switch backend Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 21/57] KVM: arm/arm64: vgic-new: Add GICv3 " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 22/57] KVM: arm/arm64: vgic-new: Implement kvm_vgic_vcpu_pending_irq Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 23/57] KVM: arm/arm64: vgic-new: Add MMIO handling framework Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` Andre Przywara [this message]
2016-05-19 18:08   ` [PATCH v5 24/57] KVM: arm/arm64: vgic-new: Add GICv2 " Andre Przywara
2016-05-19 18:08 ` [PATCH v5 25/57] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 26/57] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 27/57] KVM: arm/arm64: vgic-new: Add PENDING " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 28/57] KVM: arm/arm64: vgic-new: Add ACTIVE " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 29/57] KVM: arm/arm64: vgic-new: Add PRIORITY " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 30/57] KVM: arm/arm64: vgic-new: Add CONFIG " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 31/57] KVM: arm/arm64: vgic-new: Add TARGET " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 32/57] KVM: arm/arm64: vgic-new: Add SGIR register handler Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 33/57] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 34/57] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 35/57] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 36/57] KVM: arm/arm64: vgic-new: Add GICv3 redistributor IIDR and TYPER handler Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 37/57] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 38/57] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 39/57] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 40/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 41/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 42/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 43/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 44/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 45/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 46/57] KVM: arm/arm64: vgic-new: Export register access interface Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 47/57] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 48/57] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 49/57] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 50/57] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 51/57] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 52/57] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 53/57] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 54/57] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 55/57] KVM: arm/arm64: vgic-new: Wire up irqfd injection Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 56/57] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 57/57] KVM: arm/arm64: vgic-new: enable build Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-20 15:04 ` [PATCH v5 00/57] KVM: arm/arm64: Rework virtual GIC emulation Christoffer Dall
2016-05-20 15:04   ` Christoffer Dall

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