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From: Andre Przywara <andre.przywara@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	Christoffer Dall <christoffer.dall@linaro.org>
Cc: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 08/57] KVM: arm/arm64: Move timer IRQ map to latest possible time
Date: Thu, 19 May 2016 19:07:47 +0100	[thread overview]
Message-ID: <1463681316-23039-9-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1463681316-23039-1-git-send-email-andre.przywara@arm.com>

From: Christoffer Dall <christoffer.dall@linaro.org>

We are about to modify the VGIC to allocate all data structures
dynamically and store mapped IRQ information on a per-IRQ struct, which
is indeed allocated dynamically at init time.

Therefore, we cannot record the mapped IRQ info from the timer at timer
reset time like it's done now, because VCPU reset happens before timer
init.

A possible later time to do this is on the first run of a per VCPU, it
just requires us to move the enable state to be a per-VCPU state and do
the lookup of the physical IRQ number when we are about to run the VCPU.

Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/kvm/arm.c           |  6 ++--
 include/kvm/arm_arch_timer.h |  8 +++---
 virt/kvm/arm/arch_timer.c    | 66 +++++++++++++++++++++++++-------------------
 virt/kvm/arm/hyp/timer-sr.c  |  5 ++--
 4 files changed, 47 insertions(+), 38 deletions(-)

diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index be4b639..ceb9345 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -459,7 +459,7 @@ static void update_vttbr(struct kvm *kvm)
 static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu)
 {
 	struct kvm *kvm = vcpu->kvm;
-	int ret;
+	int ret = 0;
 
 	if (likely(vcpu->arch.has_run_once))
 		return 0;
@@ -482,9 +482,9 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu)
 	 * interrupts from the virtual timer with a userspace gic.
 	 */
 	if (irqchip_in_kernel(kvm) && vgic_initialized(kvm))
-		kvm_timer_enable(kvm);
+		ret = kvm_timer_enable(vcpu);
 
-	return 0;
+	return ret;
 }
 
 bool kvm_arch_intc_initialized(struct kvm *kvm)
diff --git a/include/kvm/arm_arch_timer.h b/include/kvm/arm_arch_timer.h
index a47b7de..dda39d8 100644
--- a/include/kvm/arm_arch_timer.h
+++ b/include/kvm/arm_arch_timer.h
@@ -24,9 +24,6 @@
 #include <linux/workqueue.h>
 
 struct arch_timer_kvm {
-	/* Is the timer enabled */
-	bool			enabled;
-
 	/* Virtual offset */
 	cycle_t			cntvoff;
 };
@@ -55,10 +52,13 @@ struct arch_timer_cpu {
 
 	/* Active IRQ state caching */
 	bool				active_cleared_last;
+
+	/* Is the timer enabled */
+	bool			enabled;
 };
 
 int kvm_timer_hyp_init(void);
-void kvm_timer_enable(struct kvm *kvm);
+int kvm_timer_enable(struct kvm_vcpu *vcpu);
 void kvm_timer_init(struct kvm *kvm);
 int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
 			 const struct kvm_irq_level *irq);
diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
index 3232105..e2d5b6f 100644
--- a/virt/kvm/arm/arch_timer.c
+++ b/virt/kvm/arm/arch_timer.c
@@ -197,7 +197,7 @@ static int kvm_timer_update_state(struct kvm_vcpu *vcpu)
 	 * because the guest would never see the interrupt.  Instead wait
 	 * until we call this function from kvm_timer_flush_hwstate.
 	 */
-	if (!vgic_initialized(vcpu->kvm))
+	if (!vgic_initialized(vcpu->kvm) || !timer->enabled)
 		return -ENODEV;
 
 	if (kvm_timer_should_fire(vcpu) != timer->irq.level)
@@ -333,9 +333,6 @@ int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
 			 const struct kvm_irq_level *irq)
 {
 	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
-	struct irq_desc *desc;
-	struct irq_data *data;
-	int phys_irq;
 
 	/*
 	 * The vcpu timer irq number cannot be determined in
@@ -354,26 +351,7 @@ int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
 	timer->cntv_ctl = 0;
 	kvm_timer_update_state(vcpu);
 
-	/*
-	 * Find the physical IRQ number corresponding to the host_vtimer_irq
-	 */
-	desc = irq_to_desc(host_vtimer_irq);
-	if (!desc) {
-		kvm_err("%s: no interrupt descriptor\n", __func__);
-		return -EINVAL;
-	}
-
-	data = irq_desc_get_irq_data(desc);
-	while (data->parent_data)
-		data = data->parent_data;
-
-	phys_irq = data->hwirq;
-
-	/*
-	 * Tell the VGIC that the virtual interrupt is tied to a
-	 * physical interrupt. We do that once per VCPU.
-	 */
-	return kvm_vgic_map_phys_irq(vcpu, irq->irq, phys_irq);
+	return 0;
 }
 
 void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu)
@@ -501,10 +479,40 @@ void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu)
 	kvm_vgic_unmap_phys_irq(vcpu, timer->irq.irq);
 }
 
-void kvm_timer_enable(struct kvm *kvm)
+int kvm_timer_enable(struct kvm_vcpu *vcpu)
 {
-	if (kvm->arch.timer.enabled)
-		return;
+	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
+	struct irq_desc *desc;
+	struct irq_data *data;
+	int phys_irq;
+	int ret;
+
+	if (timer->enabled)
+		return 0;
+
+	/*
+	 * Find the physical IRQ number corresponding to the host_vtimer_irq
+	 */
+	desc = irq_to_desc(host_vtimer_irq);
+	if (!desc) {
+		kvm_err("%s: no interrupt descriptor\n", __func__);
+		return -EINVAL;
+	}
+
+	data = irq_desc_get_irq_data(desc);
+	while (data->parent_data)
+		data = data->parent_data;
+
+	phys_irq = data->hwirq;
+
+	/*
+	 * Tell the VGIC that the virtual interrupt is tied to a
+	 * physical interrupt. We do that once per VCPU.
+	 */
+	ret = kvm_vgic_map_phys_irq(vcpu, timer->irq.irq, phys_irq);
+	if (ret)
+		return ret;
+
 
 	/*
 	 * There is a potential race here between VCPUs starting for the first
@@ -515,7 +523,9 @@ void kvm_timer_enable(struct kvm *kvm)
 	 * the arch timers are enabled.
 	 */
 	if (timecounter && wqueue)
-		kvm->arch.timer.enabled = 1;
+		timer->enabled = 1;
+
+	return 0;
 }
 
 void kvm_timer_init(struct kvm *kvm)
diff --git a/virt/kvm/arm/hyp/timer-sr.c b/virt/kvm/arm/hyp/timer-sr.c
index ea00d69..798866a 100644
--- a/virt/kvm/arm/hyp/timer-sr.c
+++ b/virt/kvm/arm/hyp/timer-sr.c
@@ -24,11 +24,10 @@
 /* vcpu is already in the HYP VA space */
 void __hyp_text __timer_save_state(struct kvm_vcpu *vcpu)
 {
-	struct kvm *kvm = kern_hyp_va(vcpu->kvm);
 	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
 	u64 val;
 
-	if (kvm->arch.timer.enabled) {
+	if (timer->enabled) {
 		timer->cntv_ctl = read_sysreg_el0(cntv_ctl);
 		timer->cntv_cval = read_sysreg_el0(cntv_cval);
 	}
@@ -60,7 +59,7 @@ void __hyp_text __timer_restore_state(struct kvm_vcpu *vcpu)
 	val |= CNTHCTL_EL1PCTEN;
 	write_sysreg(val, cnthctl_el2);
 
-	if (kvm->arch.timer.enabled) {
+	if (timer->enabled) {
 		write_sysreg(kvm->arch.timer.cntvoff, cntvoff_el2);
 		write_sysreg_el0(timer->cntv_cval, cntv_cval);
 		isb();
-- 
2.8.2

WARNING: multiple messages have this Message-ID (diff)
From: andre.przywara@arm.com (Andre Przywara)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 08/57] KVM: arm/arm64: Move timer IRQ map to latest possible time
Date: Thu, 19 May 2016 19:07:47 +0100	[thread overview]
Message-ID: <1463681316-23039-9-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1463681316-23039-1-git-send-email-andre.przywara@arm.com>

From: Christoffer Dall <christoffer.dall@linaro.org>

We are about to modify the VGIC to allocate all data structures
dynamically and store mapped IRQ information on a per-IRQ struct, which
is indeed allocated dynamically at init time.

Therefore, we cannot record the mapped IRQ info from the timer at timer
reset time like it's done now, because VCPU reset happens before timer
init.

A possible later time to do this is on the first run of a per VCPU, it
just requires us to move the enable state to be a per-VCPU state and do
the lookup of the physical IRQ number when we are about to run the VCPU.

Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/kvm/arm.c           |  6 ++--
 include/kvm/arm_arch_timer.h |  8 +++---
 virt/kvm/arm/arch_timer.c    | 66 +++++++++++++++++++++++++-------------------
 virt/kvm/arm/hyp/timer-sr.c  |  5 ++--
 4 files changed, 47 insertions(+), 38 deletions(-)

diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index be4b639..ceb9345 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -459,7 +459,7 @@ static void update_vttbr(struct kvm *kvm)
 static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu)
 {
 	struct kvm *kvm = vcpu->kvm;
-	int ret;
+	int ret = 0;
 
 	if (likely(vcpu->arch.has_run_once))
 		return 0;
@@ -482,9 +482,9 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu)
 	 * interrupts from the virtual timer with a userspace gic.
 	 */
 	if (irqchip_in_kernel(kvm) && vgic_initialized(kvm))
-		kvm_timer_enable(kvm);
+		ret = kvm_timer_enable(vcpu);
 
-	return 0;
+	return ret;
 }
 
 bool kvm_arch_intc_initialized(struct kvm *kvm)
diff --git a/include/kvm/arm_arch_timer.h b/include/kvm/arm_arch_timer.h
index a47b7de..dda39d8 100644
--- a/include/kvm/arm_arch_timer.h
+++ b/include/kvm/arm_arch_timer.h
@@ -24,9 +24,6 @@
 #include <linux/workqueue.h>
 
 struct arch_timer_kvm {
-	/* Is the timer enabled */
-	bool			enabled;
-
 	/* Virtual offset */
 	cycle_t			cntvoff;
 };
@@ -55,10 +52,13 @@ struct arch_timer_cpu {
 
 	/* Active IRQ state caching */
 	bool				active_cleared_last;
+
+	/* Is the timer enabled */
+	bool			enabled;
 };
 
 int kvm_timer_hyp_init(void);
-void kvm_timer_enable(struct kvm *kvm);
+int kvm_timer_enable(struct kvm_vcpu *vcpu);
 void kvm_timer_init(struct kvm *kvm);
 int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
 			 const struct kvm_irq_level *irq);
diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
index 3232105..e2d5b6f 100644
--- a/virt/kvm/arm/arch_timer.c
+++ b/virt/kvm/arm/arch_timer.c
@@ -197,7 +197,7 @@ static int kvm_timer_update_state(struct kvm_vcpu *vcpu)
 	 * because the guest would never see the interrupt.  Instead wait
 	 * until we call this function from kvm_timer_flush_hwstate.
 	 */
-	if (!vgic_initialized(vcpu->kvm))
+	if (!vgic_initialized(vcpu->kvm) || !timer->enabled)
 		return -ENODEV;
 
 	if (kvm_timer_should_fire(vcpu) != timer->irq.level)
@@ -333,9 +333,6 @@ int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
 			 const struct kvm_irq_level *irq)
 {
 	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
-	struct irq_desc *desc;
-	struct irq_data *data;
-	int phys_irq;
 
 	/*
 	 * The vcpu timer irq number cannot be determined in
@@ -354,26 +351,7 @@ int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu,
 	timer->cntv_ctl = 0;
 	kvm_timer_update_state(vcpu);
 
-	/*
-	 * Find the physical IRQ number corresponding to the host_vtimer_irq
-	 */
-	desc = irq_to_desc(host_vtimer_irq);
-	if (!desc) {
-		kvm_err("%s: no interrupt descriptor\n", __func__);
-		return -EINVAL;
-	}
-
-	data = irq_desc_get_irq_data(desc);
-	while (data->parent_data)
-		data = data->parent_data;
-
-	phys_irq = data->hwirq;
-
-	/*
-	 * Tell the VGIC that the virtual interrupt is tied to a
-	 * physical interrupt. We do that once per VCPU.
-	 */
-	return kvm_vgic_map_phys_irq(vcpu, irq->irq, phys_irq);
+	return 0;
 }
 
 void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu)
@@ -501,10 +479,40 @@ void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu)
 	kvm_vgic_unmap_phys_irq(vcpu, timer->irq.irq);
 }
 
-void kvm_timer_enable(struct kvm *kvm)
+int kvm_timer_enable(struct kvm_vcpu *vcpu)
 {
-	if (kvm->arch.timer.enabled)
-		return;
+	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
+	struct irq_desc *desc;
+	struct irq_data *data;
+	int phys_irq;
+	int ret;
+
+	if (timer->enabled)
+		return 0;
+
+	/*
+	 * Find the physical IRQ number corresponding to the host_vtimer_irq
+	 */
+	desc = irq_to_desc(host_vtimer_irq);
+	if (!desc) {
+		kvm_err("%s: no interrupt descriptor\n", __func__);
+		return -EINVAL;
+	}
+
+	data = irq_desc_get_irq_data(desc);
+	while (data->parent_data)
+		data = data->parent_data;
+
+	phys_irq = data->hwirq;
+
+	/*
+	 * Tell the VGIC that the virtual interrupt is tied to a
+	 * physical interrupt. We do that once per VCPU.
+	 */
+	ret = kvm_vgic_map_phys_irq(vcpu, timer->irq.irq, phys_irq);
+	if (ret)
+		return ret;
+
 
 	/*
 	 * There is a potential race here between VCPUs starting for the first
@@ -515,7 +523,9 @@ void kvm_timer_enable(struct kvm *kvm)
 	 * the arch timers are enabled.
 	 */
 	if (timecounter && wqueue)
-		kvm->arch.timer.enabled = 1;
+		timer->enabled = 1;
+
+	return 0;
 }
 
 void kvm_timer_init(struct kvm *kvm)
diff --git a/virt/kvm/arm/hyp/timer-sr.c b/virt/kvm/arm/hyp/timer-sr.c
index ea00d69..798866a 100644
--- a/virt/kvm/arm/hyp/timer-sr.c
+++ b/virt/kvm/arm/hyp/timer-sr.c
@@ -24,11 +24,10 @@
 /* vcpu is already in the HYP VA space */
 void __hyp_text __timer_save_state(struct kvm_vcpu *vcpu)
 {
-	struct kvm *kvm = kern_hyp_va(vcpu->kvm);
 	struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
 	u64 val;
 
-	if (kvm->arch.timer.enabled) {
+	if (timer->enabled) {
 		timer->cntv_ctl = read_sysreg_el0(cntv_ctl);
 		timer->cntv_cval = read_sysreg_el0(cntv_cval);
 	}
@@ -60,7 +59,7 @@ void __hyp_text __timer_restore_state(struct kvm_vcpu *vcpu)
 	val |= CNTHCTL_EL1PCTEN;
 	write_sysreg(val, cnthctl_el2);
 
-	if (kvm->arch.timer.enabled) {
+	if (timer->enabled) {
 		write_sysreg(kvm->arch.timer.cntvoff, cntvoff_el2);
 		write_sysreg_el0(timer->cntv_cval, cntv_cval);
 		isb();
-- 
2.8.2

  parent reply	other threads:[~2016-05-19 18:07 UTC|newest]

Thread overview: 118+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-19 18:07 [PATCH v5 00/57] KVM: arm/arm64: Rework virtual GIC emulation Andre Przywara
2016-05-19 18:07 ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 01/57] KVM: arm/arm64: vgic: streamline vgic_update_irq_pending() interface Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 02/57] KVM: arm/arm64: vgic: avoid map in kvm_vgic_inject_mapped_irq() Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 03/57] KVM: arm/arm64: vgic: avoid map in kvm_vgic_map_is_active() Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 04/57] KVM: arm/arm64: vgic: avoid map in kvm_vgic_unmap_phys_irq() Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 05/57] KVM: arm/arm64: Remove the IRQ field from struct irq_phys_map Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 06/57] KVM: arm/arm64: arch_timer: Remove irq_phys_map Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 07/57] KVM: arm/arm64: vgic: Remove irq_phys_map from interface Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` Andre Przywara [this message]
2016-05-19 18:07   ` [PATCH v5 08/57] KVM: arm/arm64: Move timer IRQ map to latest possible time Andre Przywara
2016-05-19 18:07 ` [PATCH v5 09/57] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 10/57] KVM: arm/arm64: Fix MMIO emulation data handling Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 11/57] KVM: arm/arm64: Export mmio_read/write_bus Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 12/57] KVM: arm/arm64: pmu: abstract access to number of SPIs Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 13/57] KVM: arm/arm64: Provide functionality to pause and resume a guest Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 14/57] KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 15/57] KVM: arm/arm64: vgic-new: Add data structure definitions Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 16/57] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 17/57] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 18/57] KVM: arm/arm64: vgic-new: Add IRQ sorting Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 19/57] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:07 ` [PATCH v5 20/57] KVM: arm/arm64: vgic-new: Add GICv2 world switch backend Andre Przywara
2016-05-19 18:07   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 21/57] KVM: arm/arm64: vgic-new: Add GICv3 " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 22/57] KVM: arm/arm64: vgic-new: Implement kvm_vgic_vcpu_pending_irq Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 23/57] KVM: arm/arm64: vgic-new: Add MMIO handling framework Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 24/57] KVM: arm/arm64: vgic-new: Add GICv2 " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 25/57] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 26/57] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 27/57] KVM: arm/arm64: vgic-new: Add PENDING " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 28/57] KVM: arm/arm64: vgic-new: Add ACTIVE " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 29/57] KVM: arm/arm64: vgic-new: Add PRIORITY " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 30/57] KVM: arm/arm64: vgic-new: Add CONFIG " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 31/57] KVM: arm/arm64: vgic-new: Add TARGET " Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 32/57] KVM: arm/arm64: vgic-new: Add SGIR register handler Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 33/57] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 34/57] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 35/57] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 36/57] KVM: arm/arm64: vgic-new: Add GICv3 redistributor IIDR and TYPER handler Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 37/57] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 38/57] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 39/57] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 40/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 41/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 42/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 43/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 44/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 45/57] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 46/57] KVM: arm/arm64: vgic-new: Export register access interface Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 47/57] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 48/57] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 49/57] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 50/57] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 51/57] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 52/57] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 53/57] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 54/57] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 55/57] KVM: arm/arm64: vgic-new: Wire up irqfd injection Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 56/57] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-19 18:08 ` [PATCH v5 57/57] KVM: arm/arm64: vgic-new: enable build Andre Przywara
2016-05-19 18:08   ` Andre Przywara
2016-05-20 15:04 ` [PATCH v5 00/57] KVM: arm/arm64: Rework virtual GIC emulation Christoffer Dall
2016-05-20 15:04   ` Christoffer Dall

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