All of lore.kernel.org
 help / color / mirror / Atom feed
From: Gilad Ben-Yossef <gilad@benyossef.com>
To: Simon Horman <horms@verge.net.au>,
	Magnus Damm <magnus.damm@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S. Miller" <davem@davemloft.net>
Cc: Ofir Drang <ofir.drang@arm.com>,
	linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-crypto@vger.kernel.org
Subject: [PATCH v2 4/5] clk: renesas: r8a7795: add ccree clock bindings
Date: Thu, 24 May 2018 15:19:09 +0100	[thread overview]
Message-ID: <1527171551-21979-5-git-send-email-gilad@benyossef.com> (raw)
In-Reply-To: <1527171551-21979-1-git-send-email-gilad@benyossef.com>

This patch adds the clock used by the CryptoCell 630p instance in the SoC.

Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---

This patch depends upon the "clk: renesas: r8a7795: Add CR clock" patch
from Geert Uytterhoeven.

 drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index e5b1865..a85dd50 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -133,6 +133,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
 	DEF_MOD("sys-dmac2",		 217,	R8A7795_CLK_S0D3),
 	DEF_MOD("sys-dmac1",		 218,	R8A7795_CLK_S0D3),
 	DEF_MOD("sys-dmac0",		 219,	R8A7795_CLK_S0D3),
+	DEF_MOD("sceg-pub",		 229,	R8A7795_CLK_CR),
 	DEF_MOD("cmt3",			 300,	R8A7795_CLK_R),
 	DEF_MOD("cmt2",			 301,	R8A7795_CLK_R),
 	DEF_MOD("cmt1",			 302,	R8A7795_CLK_R),
-- 
2.7.4

WARNING: multiple messages have this Message-ID (diff)
From: gilad@benyossef.com (Gilad Ben-Yossef)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 4/5] clk: renesas: r8a7795: add ccree clock bindings
Date: Thu, 24 May 2018 15:19:09 +0100	[thread overview]
Message-ID: <1527171551-21979-5-git-send-email-gilad@benyossef.com> (raw)
In-Reply-To: <1527171551-21979-1-git-send-email-gilad@benyossef.com>

This patch adds the clock used by the CryptoCell 630p instance in the SoC.

Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com>
---

This patch depends upon the "clk: renesas: r8a7795: Add CR clock" patch
from Geert Uytterhoeven.

 drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index e5b1865..a85dd50 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -133,6 +133,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
 	DEF_MOD("sys-dmac2",		 217,	R8A7795_CLK_S0D3),
 	DEF_MOD("sys-dmac1",		 218,	R8A7795_CLK_S0D3),
 	DEF_MOD("sys-dmac0",		 219,	R8A7795_CLK_S0D3),
+	DEF_MOD("sceg-pub",		 229,	R8A7795_CLK_CR),
 	DEF_MOD("cmt3",			 300,	R8A7795_CLK_R),
 	DEF_MOD("cmt2",			 301,	R8A7795_CLK_R),
 	DEF_MOD("cmt1",			 302,	R8A7795_CLK_R),
-- 
2.7.4

  parent reply	other threads:[~2018-05-24 14:19 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-24 14:19 [PATCH v2 0/5] crypto: ccree: cleanup, fixes and R-Car enabling Gilad Ben-Yossef
2018-05-24 14:19 ` Gilad Ben-Yossef
2018-05-24 14:19 ` [PATCH v2 1/5] crypto: ccree: correct host regs offset Gilad Ben-Yossef
2018-05-24 14:19   ` Gilad Ben-Yossef
2018-05-29 16:12   ` Simon Horman
2018-05-29 16:12     ` Simon Horman
2018-05-31 11:49     ` Gilad Ben-Yossef
2018-05-31 11:51     ` Gilad Ben-Yossef
2018-05-31 11:51       ` Gilad Ben-Yossef
2018-05-31 11:51       ` Gilad Ben-Yossef
2018-05-31 11:51       ` Gilad Ben-Yossef
2018-05-24 14:19 ` [PATCH v2 2/5] crypto: ccree: better clock handling Gilad Ben-Yossef
2018-05-24 14:19   ` Gilad Ben-Yossef
2018-05-29 16:13   ` Simon Horman
2018-05-29 16:13     ` Simon Horman
2018-05-24 14:19 ` [PATCH v2 3/5] crypto: ccree: silence debug prints Gilad Ben-Yossef
2018-05-24 14:19   ` Gilad Ben-Yossef
2018-05-29 16:13   ` Simon Horman
2018-05-29 16:13     ` Simon Horman
2018-05-24 14:19 ` Gilad Ben-Yossef [this message]
2018-05-24 14:19   ` [PATCH v2 4/5] clk: renesas: r8a7795: add ccree clock bindings Gilad Ben-Yossef
2018-05-29  8:48   ` Geert Uytterhoeven
2018-05-29  8:48     ` Geert Uytterhoeven
2018-05-29  8:48     ` Geert Uytterhoeven
2018-05-29  8:48     ` Geert Uytterhoeven
2018-05-24 14:19 ` [PATCH v2 5/5] arm64: dts: renesas: r8a7795: add ccree binding Gilad Ben-Yossef
2018-05-24 14:19   ` Gilad Ben-Yossef
2018-05-29 16:19   ` Simon Horman
2018-05-29 16:19     ` Simon Horman
2018-05-31 11:55     ` Gilad Ben-Yossef
2018-05-31 11:55       ` Gilad Ben-Yossef
2018-05-31 11:55       ` Gilad Ben-Yossef
2018-05-31 11:55       ` Gilad Ben-Yossef
2018-06-01  8:12       ` Geert Uytterhoeven
2018-06-01  8:12         ` Geert Uytterhoeven
2018-06-01  8:12         ` Geert Uytterhoeven
2018-06-01  8:12         ` Geert Uytterhoeven
2018-06-02 13:12         ` Simon Horman
2018-06-02 13:12           ` Simon Horman
2018-06-02 13:12           ` Simon Horman
2018-06-02 13:12           ` Simon Horman
2018-06-01  8:07   ` Geert Uytterhoeven
2018-06-01  8:07     ` Geert Uytterhoeven
2018-06-01  8:07     ` Geert Uytterhoeven
2018-06-01  8:07     ` Geert Uytterhoeven
2018-05-30 16:28 ` [PATCH v2 0/5] crypto: ccree: cleanup, fixes and R-Car enabling Herbert Xu
2018-05-30 16:28   ` Herbert Xu
2018-06-19 12:58 ` Geert Uytterhoeven
2018-06-19 12:58   ` Geert Uytterhoeven
2018-06-19 12:58   ` Geert Uytterhoeven
2018-06-19 12:58   ` Geert Uytterhoeven
2018-06-19 12:58   ` Geert Uytterhoeven
2018-06-19 13:57   ` Gilad Ben-Yossef
2018-06-19 13:57     ` Gilad Ben-Yossef
2018-06-19 13:57     ` Gilad Ben-Yossef
2018-06-19 13:57     ` Gilad Ben-Yossef
2018-06-19 13:57     ` Gilad Ben-Yossef
2018-06-19 13:57     ` Gilad Ben-Yossef
2018-06-20  8:51     ` Simon Horman
2018-06-20  8:51       ` Simon Horman
2018-06-20  8:51       ` Simon Horman
2018-06-20  8:51       ` Simon Horman
2018-06-21  5:00       ` Gilad Ben-Yossef
2018-06-21  5:00         ` Gilad Ben-Yossef
2018-06-21  5:00         ` Gilad Ben-Yossef
2018-06-21  5:00         ` Gilad Ben-Yossef
2018-06-21  5:00         ` Gilad Ben-Yossef
2018-06-21  5:00         ` Gilad Ben-Yossef

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1527171551-21979-5-git-send-email-gilad@benyossef.com \
    --to=gilad@benyossef.com \
    --cc=catalin.marinas@arm.com \
    --cc=davem@davemloft.net \
    --cc=devicetree@vger.kernel.org \
    --cc=geert+renesas@glider.be \
    --cc=herbert@gondor.apana.org.au \
    --cc=horms@verge.net.au \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-crypto@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=magnus.damm@gmail.com \
    --cc=mark.rutland@arm.com \
    --cc=mturquette@baylibre.com \
    --cc=ofir.drang@arm.com \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.