From: Will Deacon <will.deacon@arm.com> To: linux-kernel@vger.kernel.org Cc: peterz@infradead.org, benh@au1.ibm.com, torvalds@linux-foundation.org, npiggin@gmail.com, catalin.marinas@arm.com, linux-arm-kernel@lists.infradead.org, Will Deacon <will.deacon@arm.com> Subject: [RFC PATCH 10/11] arm64: tlb: Adjust stride and type of TLBI according to mmu_gather Date: Fri, 24 Aug 2018 16:52:45 +0100 [thread overview] Message-ID: <1535125966-7666-11-git-send-email-will.deacon@arm.com> (raw) In-Reply-To: <1535125966-7666-1-git-send-email-will.deacon@arm.com> Now that the core mmu_gather code keeps track of both the levels of page table cleared and also whether or not these entries correspond to intermediate entries, we can use this in our tlb_flush() callback to reduce the number of invalidations we issue as well as their scope. Signed-off-by: Will Deacon <will.deacon@arm.com> --- arch/arm64/include/asm/tlb.h | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h index bd00017d529a..baca8dff6884 100644 --- a/arch/arm64/include/asm/tlb.h +++ b/arch/arm64/include/asm/tlb.h @@ -34,20 +34,21 @@ static void tlb_flush(struct mmu_gather *tlb); static inline void tlb_flush(struct mmu_gather *tlb) { struct vm_area_struct vma = TLB_FLUSH_VMA(tlb->mm, 0); + bool last_level = !tlb->freed_tables; + unsigned long stride = tlb_get_unmap_granule(tlb); /* - * The ASID allocator will either invalidate the ASID or mark - * it as used. + * If we're tearing down the address space then we only care about + * invalidating the walk-cache, since the ASID allocator won't + * reallocate our ASID without invalidating the entire TLB. */ - if (tlb->fullmm) + if (tlb->fullmm) { + if (!last_level) + flush_tlb_mm(tlb->mm); return; + } - /* - * The intermediate page table levels are already handled by - * the __(pte|pmd|pud)_free_tlb() functions, so last level - * TLBI is sufficient here. - */ - __flush_tlb_range(&vma, tlb->start, tlb->end, PAGE_SIZE, true); + __flush_tlb_range(&vma, tlb->start, tlb->end, stride, last_level); } static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, -- 2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon) To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 10/11] arm64: tlb: Adjust stride and type of TLBI according to mmu_gather Date: Fri, 24 Aug 2018 16:52:45 +0100 [thread overview] Message-ID: <1535125966-7666-11-git-send-email-will.deacon@arm.com> (raw) In-Reply-To: <1535125966-7666-1-git-send-email-will.deacon@arm.com> Now that the core mmu_gather code keeps track of both the levels of page table cleared and also whether or not these entries correspond to intermediate entries, we can use this in our tlb_flush() callback to reduce the number of invalidations we issue as well as their scope. Signed-off-by: Will Deacon <will.deacon@arm.com> --- arch/arm64/include/asm/tlb.h | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h index bd00017d529a..baca8dff6884 100644 --- a/arch/arm64/include/asm/tlb.h +++ b/arch/arm64/include/asm/tlb.h @@ -34,20 +34,21 @@ static void tlb_flush(struct mmu_gather *tlb); static inline void tlb_flush(struct mmu_gather *tlb) { struct vm_area_struct vma = TLB_FLUSH_VMA(tlb->mm, 0); + bool last_level = !tlb->freed_tables; + unsigned long stride = tlb_get_unmap_granule(tlb); /* - * The ASID allocator will either invalidate the ASID or mark - * it as used. + * If we're tearing down the address space then we only care about + * invalidating the walk-cache, since the ASID allocator won't + * reallocate our ASID without invalidating the entire TLB. */ - if (tlb->fullmm) + if (tlb->fullmm) { + if (!last_level) + flush_tlb_mm(tlb->mm); return; + } - /* - * The intermediate page table levels are already handled by - * the __(pte|pmd|pud)_free_tlb() functions, so last level - * TLBI is sufficient here. - */ - __flush_tlb_range(&vma, tlb->start, tlb->end, PAGE_SIZE, true); + __flush_tlb_range(&vma, tlb->start, tlb->end, stride, last_level); } static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, -- 2.1.4
next prev parent reply other threads:[~2018-08-24 15:53 UTC|newest] Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-08-24 15:52 [RFC PATCH 00/11] Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 Will Deacon 2018-08-24 15:52 ` Will Deacon 2018-08-24 15:52 ` [RFC PATCH 01/11] arm64: tlb: Use last-level invalidation in flush_tlb_kernel_range() Will Deacon 2018-08-24 15:52 ` Will Deacon 2018-08-24 15:52 ` [RFC PATCH 02/11] arm64: tlb: Add DSB ISHST prior to TLBI in __flush_tlb_[kernel_]pgtable() Will Deacon 2018-08-24 15:52 ` Will Deacon 2018-08-24 17:56 ` Peter Zijlstra 2018-08-24 17:56 ` Peter Zijlstra 2018-08-28 13:03 ` Will Deacon 2018-08-28 13:03 ` Will Deacon 2018-08-24 15:52 ` [RFC PATCH 03/11] arm64: pgtable: Implement p[mu]d_valid() and check in set_p[mu]d() Will Deacon 2018-08-24 15:52 ` Will Deacon 2018-08-24 16:15 ` Linus Torvalds 2018-08-24 16:15 ` Linus Torvalds 2018-08-28 12:49 ` Will Deacon 2018-08-28 12:49 ` Will Deacon 2018-08-24 15:52 ` [RFC PATCH 04/11] arm64: tlb: Justify non-leaf invalidation in flush_tlb_range() Will Deacon 2018-08-24 15:52 ` Will Deacon 2018-08-24 15:52 ` [RFC PATCH 05/11] arm64: tlbflush: Allow stride to be specified for __flush_tlb_range() Will Deacon 2018-08-24 15:52 ` Will Deacon 2018-08-24 15:52 ` [RFC PATCH 06/11] arm64: tlb: Remove redundant !CONFIG_HAVE_RCU_TABLE_FREE code Will Deacon 2018-08-24 15:52 ` Will Deacon 2018-08-24 15:52 ` [RFC PATCH 07/11] asm-generic/tlb: Guard with #ifdef CONFIG_MMU Will Deacon 2018-08-24 15:52 ` Will Deacon 2018-08-24 15:52 ` [RFC PATCH 08/11] asm-generic/tlb: Track freeing of page-table directories in struct mmu_gather Will Deacon 2018-08-24 15:52 ` Will Deacon 2018-08-27 4:44 ` Nicholas Piggin 2018-08-27 4:44 ` Nicholas Piggin 2018-08-28 13:46 ` Peter Zijlstra 2018-08-28 13:46 ` Peter Zijlstra 2018-08-28 13:48 ` Peter Zijlstra 2018-08-28 13:48 ` Peter Zijlstra 2018-08-28 14:12 ` Nicholas Piggin 2018-08-28 14:12 ` Nicholas Piggin 2018-08-24 15:52 ` [RFC PATCH 09/11] asm-generic/tlb: Track which levels of the page tables have been cleared Will Deacon 2018-08-24 15:52 ` Will Deacon 2018-08-27 7:53 ` Peter Zijlstra 2018-08-27 7:53 ` Peter Zijlstra 2018-08-28 13:12 ` Will Deacon 2018-08-28 13:12 ` Will Deacon 2018-08-24 15:52 ` Will Deacon [this message] 2018-08-24 15:52 ` [RFC PATCH 10/11] arm64: tlb: Adjust stride and type of TLBI according to mmu_gather Will Deacon 2018-08-24 15:52 ` [RFC PATCH 11/11] arm64: tlb: Avoid synchronous TLBIs when freeing page tables Will Deacon 2018-08-24 15:52 ` Will Deacon 2018-08-24 16:20 ` [RFC PATCH 00/11] Avoid synchronous TLB invalidation for intermediate page-table entries on arm64 Linus Torvalds 2018-08-24 16:20 ` Linus Torvalds 2018-08-26 10:56 ` Peter Zijlstra 2018-08-26 10:56 ` Peter Zijlstra 2018-09-04 18:38 ` Jon Masters 2018-09-04 18:38 ` Jon Masters 2018-09-05 12:28 ` Will Deacon 2018-09-05 12:28 ` Will Deacon 2018-09-07 6:36 ` Jon Masters 2018-09-07 6:36 ` Jon Masters 2018-09-13 15:53 ` Will Deacon 2018-09-13 15:53 ` Will Deacon 2018-09-13 16:53 ` Jon Masters 2018-09-13 16:53 ` Jon Masters
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