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From: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>
Cc: Fabrizio Castro <fabrizio.castro@bp.renesas.com>,
	linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org,
	Simon Horman <horms@verge.net.au>,
	Chris Paterson <Chris.Paterson2@renesas.com>,
	Biju Das <biju.das@bp.renesas.com>
Subject: [PATCH] clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK
Date: Fri, 22 Feb 2019 11:59:39 +0000	[thread overview]
Message-ID: <1550836779-6868-1-git-send-email-fabrizio.castro@bp.renesas.com> (raw)

Enum LAST_DT_CORE_CLK needs updating as R8A774A1_CLK_CANFD
was recently added and it's the core clock with the highest
index.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
---
 drivers/clk/renesas/r8a774a1-cpg-mssr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
index 5fcd6c5..8e7bb43 100644
--- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
@@ -21,7 +21,7 @@
 
 enum clk_ids {
 	/* Core Clock Outputs exported to DT */
-	LAST_DT_CORE_CLK = R8A774A1_CLK_OSC,
+	LAST_DT_CORE_CLK = R8A774A1_CLK_CANFD,
 
 	/* External Input Clocks */
 	CLK_EXTAL,
-- 
2.7.4


             reply	other threads:[~2019-02-22 11:59 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-22 11:59 Fabrizio Castro [this message]
2019-02-22 12:01 ` [PATCH] clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK Chris Paterson
2019-02-25  9:27   ` Simon Horman
2019-02-25  9:32     ` Geert Uytterhoeven
2019-02-25  9:44     ` Fabrizio Castro
2019-02-25  9:47       ` Geert Uytterhoeven
2019-02-25  9:49         ` Fabrizio Castro
2019-02-25 17:13 ` Stephen Boyd

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