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From: Manish Narani <manish.narani@xilinx.com>
To: ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,
	adrian.hunter@intel.com, michal.simek@xilinx.com,
	jolly.shah@xilinx.com, nava.manne@xilinx.com,
	rajan.vaja@xilinx.com, manish.narani@xilinx.com
Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, git@xilinx.com
Subject: [PATCH v5 4/8] dt-bindings: mmc: Add optional generic properties for mmc
Date: Fri,  1 Nov 2019 11:35:49 +0530	[thread overview]
Message-ID: <1572588353-110682-5-git-send-email-manish.narani@xilinx.com> (raw)
In-Reply-To: <1572588353-110682-1-git-send-email-manish.narani@xilinx.com>

Add optional properties for mmc hosts which are used to set clk delays
for different speed modes in the controller.

Signed-off-by: Manish Narani <manish.narani@xilinx.com>
---
 .../bindings/mmc/mmc-controller.yaml          | 92 +++++++++++++++++++
 1 file changed, 92 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml
index 080754e0ef35..87a83d966851 100644
--- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml
+++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml
@@ -212,6 +212,98 @@ properties:
     description:
       eMMC HS400 enhanced strobe mode is supported
 
+  # Below mentioned are the clock (phase) delays which are to be configured
+  # in the controller while switching to particular speed mode. The range
+  # of values are 0 to 359 degrees.
+
+  clk-phase-legacy:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for Legacy Mode.
+
+  clk-phase-mmc-hs:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair degrees for MMC HS.
+
+  clk-phase-sd-hs:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SD HS.
+
+  clk-phase-uhs-sdr12:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SDR12.
+
+  clk-phase-uhs-sdr25:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SDR25.
+
+  clk-phase-uhs-sdr50:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SDR50.
+
+  clk-phase-uhs-sdr104:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SDR104.
+
+  clk-phase-uhs-ddr50:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SD DDR50.
+
+  clk-phase-mmc-ddr52:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for MMC DDR52.
+
+  clk-phase-mmc-hs200:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for MMC HS200.
+
+  clk-phase-mmc-hs400:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for MMC HS400.
+
   dsr:
     allOf:
       - $ref: /schemas/types.yaml#/definitions/uint32
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Manish Narani <manish.narani@xilinx.com>
To: ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,
	adrian.hunter@intel.com, michal.simek@xilinx.com,
	jolly.shah@xilinx.com, nava.manne@xilinx.com,
	rajan.vaja@xilinx.com, manish.narani@xilinx.com
Cc: devicetree@vger.kernel.org, linux-mmc@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, git@xilinx.com
Subject: [PATCH v5 4/8] dt-bindings: mmc: Add optional generic properties for mmc
Date: Fri,  1 Nov 2019 11:35:49 +0530	[thread overview]
Message-ID: <1572588353-110682-5-git-send-email-manish.narani@xilinx.com> (raw)
In-Reply-To: <1572588353-110682-1-git-send-email-manish.narani@xilinx.com>

Add optional properties for mmc hosts which are used to set clk delays
for different speed modes in the controller.

Signed-off-by: Manish Narani <manish.narani@xilinx.com>
---
 .../bindings/mmc/mmc-controller.yaml          | 92 +++++++++++++++++++
 1 file changed, 92 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml
index 080754e0ef35..87a83d966851 100644
--- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml
+++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml
@@ -212,6 +212,98 @@ properties:
     description:
       eMMC HS400 enhanced strobe mode is supported
 
+  # Below mentioned are the clock (phase) delays which are to be configured
+  # in the controller while switching to particular speed mode. The range
+  # of values are 0 to 359 degrees.
+
+  clk-phase-legacy:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for Legacy Mode.
+
+  clk-phase-mmc-hs:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair degrees for MMC HS.
+
+  clk-phase-sd-hs:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SD HS.
+
+  clk-phase-uhs-sdr12:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SDR12.
+
+  clk-phase-uhs-sdr25:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SDR25.
+
+  clk-phase-uhs-sdr50:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SDR50.
+
+  clk-phase-uhs-sdr104:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SDR104.
+
+  clk-phase-uhs-ddr50:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for SD DDR50.
+
+  clk-phase-mmc-ddr52:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for MMC DDR52.
+
+  clk-phase-mmc-hs200:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for MMC HS200.
+
+  clk-phase-mmc-hs400:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+      - minimum: 0
+      - maximum: 359
+    description:
+      Input/Output Clock Delay pair in degrees for MMC HS400.
+
   dsr:
     allOf:
       - $ref: /schemas/types.yaml#/definitions/uint32
-- 
2.17.1


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  parent reply	other threads:[~2019-11-01  6:06 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-01  6:05 [PATCH v5 0/8] Arasan SDHCI enhancements and ZynqMP Tap Delays Handling Manish Narani
2019-11-01  6:05 ` Manish Narani
2019-11-01  6:05 ` [PATCH v5 1/8] mmc: sdhci-of-arasan: Separate out clk related data to another structure Manish Narani
2019-11-01  6:05   ` Manish Narani
2019-11-01  6:05 ` [PATCH v5 2/8] dt-bindings: mmc: arasan: Update Documentation for the input clock Manish Narani
2019-11-01  6:05   ` Manish Narani
2019-11-01  6:05   ` Manish Narani
2019-11-01  6:05 ` [PATCH v5 3/8] mmc: sdhci-of-arasan: Add sampling clock for a phy to use Manish Narani
2019-11-01  6:05   ` Manish Narani
2019-11-01  6:05 ` Manish Narani [this message]
2019-11-01  6:05   ` [PATCH v5 4/8] dt-bindings: mmc: Add optional generic properties for mmc Manish Narani
2019-11-04 23:14   ` Rob Herring
2019-11-04 23:14     ` Rob Herring
2019-11-04 23:14     ` Rob Herring
2019-11-11 10:07     ` Manish Narani
2019-11-11 10:07       ` Manish Narani
2019-11-11 10:07       ` Manish Narani
2019-11-18  3:55       ` Manish Narani
2019-11-18  3:55         ` Manish Narani
2019-11-18  3:55         ` Manish Narani
2019-11-18 14:44       ` Rob Herring
2019-11-18 14:44         ` Rob Herring
2019-11-18 14:44         ` Rob Herring
2019-11-01  6:05 ` [PATCH v5 5/8] mmc: sdhci-of-arasan: Add support to set clock phase delays for SD Manish Narani
2019-11-01  6:05   ` Manish Narani
2019-11-01  6:05 ` [PATCH v5 6/8] firmware: xilinx: Add SDIO Tap Delay nodes Manish Narani
2019-11-01  6:05   ` Manish Narani
2019-11-01  6:05 ` [PATCH v5 7/8] dt-bindings: mmc: arasan: Document 'xlnx,zynqmp-8.9a' controller Manish Narani
2019-11-01  6:05   ` [PATCH v5 7/8] dt-bindings: mmc: arasan: Document 'xlnx, zynqmp-8.9a' controller Manish Narani
2019-11-01  6:05 ` [PATCH v5 8/8] mmc: sdhci-of-arasan: Add support for ZynqMP Platform Tap Delays Setup Manish Narani
2019-11-01  6:05   ` Manish Narani

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