All of lore.kernel.org
 help / color / mirror / Atom feed
From: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
To: ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org
Cc: linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org,
	linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org,
	john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org,
	linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	hauke.mehrtens-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
	robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	andy.shevchenko-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org,
	kishon-l0cyMroinI0@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
Subject: [PATCH v9 07/16] Documentation: DT: MIPS: lantiq: Add docs for the RCU bindings
Date: Wed,  9 Aug 2017 00:52:38 +0200	[thread overview]
Message-ID: <20170808225247.32266-8-hauke@hauke-m.de> (raw)
In-Reply-To: <20170808225247.32266-1-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>

From: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>

This adds the initial documentation for the RCU module (a MFD device
which provides USB PHYs, reset controllers and more).

The RCU register range is used for multiple purposes. Mostly one device
uses one or multiple register exclusively, but for some registers some
bits are for one driver and some other bits are for a different driver.
With this patch all accesses to the RCU registers will go through
syscon.

Signed-off-by: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
---
 .../devicetree/bindings/mips/lantiq/rcu.txt        | 90 ++++++++++++++++++++++
 1 file changed, 90 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mips/lantiq/rcu.txt

diff --git a/Documentation/devicetree/bindings/mips/lantiq/rcu.txt b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt
new file mode 100644
index 000000000000..7b9be2d13c53
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt
@@ -0,0 +1,90 @@
+Lantiq XWAY SoC RCU binding
+===========================
+
+This binding describes the RCU (reset controller unit) multifunction device,
+where each sub-device has it's own set of registers.
+
+The RCU register range is used for multiple purposes. Mostly one device
+uses one or multiple register exclusively, but for some registers some
+bits are for one driver and some other bits are for a different driver.
+With this patch all accesses to the RCU registers will go through
+syscon.
+
+
+-------------------------------------------------------------------------------
+Required properties:
+- compatible	: The first and second values must be:
+		  "lantiq,xrx200-rcu", "simple-mfd", "syscon"
+- reg		: The address and length of the system control registers
+
+
+-------------------------------------------------------------------------------
+Example of the RCU bindings on a xRX200 SoC:
+	rcu0: rcu@203000 {
+		compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
+		reg = <0x203000 0x100>;
+		ranges = <0x0 0x203000 0x100>;
+		big-endian;
+
+		gphy0: gphy@20 {
+			compatible = "lantiq,xrx200a2x-gphy";
+			reg = <0x20 0x4>;
+
+			resets = <&reset0 31 30>, <&reset1 7 7>;
+			reset-names = "gphy", "gphy2";
+			lantiq,gphy-mode = <GPHY_MODE_GE>;
+		};
+
+		gphy1: gphy@68 {
+			compatible = "lantiq,xrx200a2x-gphy";
+			reg = <0x68 0x4>;
+
+			resets = <&reset0 29 28>, <&reset1 6 6>;
+			reset-names = "gphy", "gphy2";
+			lantiq,gphy-mode = <GPHY_MODE_GE>;
+		};
+
+		reset0: reset-controller@10 {
+			compatible = "lantiq,xrx200-reset";
+			reg = <0x10 4>, <0x14 4>;
+
+			#reset-cells = <2>;
+		};
+
+		reset1: reset-controller@48 {
+			compatible = "lantiq,xrx200-reset";
+			reg = <0x48 4>, <0x24 4>;
+
+			#reset-cells = <2>;
+		};
+
+		usb_phy0: usb2-phy@18 {
+			compatible = "lantiq,xrx200-usb2-phy";
+			reg = <0x18 4>, <0x38 4>;
+			status = "disabled";
+
+			resets = <&reset1 4 4>, <&reset0 4 4>;
+			reset-names = "phy", "ctrl";
+			#phy-cells = <0>;
+		};
+
+		usb_phy1: usb2-phy@34 {
+			compatible = "lantiq,xrx200-usb2-phy";
+			reg = <0x34 4>, <0x3C 4>;
+			status = "disabled";
+
+			resets = <&reset1 5 4>, <&reset0 4 4>;
+			reset-names = "phy", "ctrl";
+			#phy-cells = <0>;
+		};
+
+		reboot@10 {
+			compatible = "syscon-reboot";
+			reg = <0x10 4>;
+
+			regmap = <&rcu0>;
+			offset = <0x10>;
+			mask = <0x40000000>;
+		};
+	};
+
-- 
2.11.0

--
To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

WARNING: multiple messages have this Message-ID (diff)
From: Hauke Mehrtens <hauke@hauke-m.de>
To: ralf@linux-mips.org
Cc: linux-mips@linux-mips.org, linux-mtd@lists.infradead.org,
	linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org,
	martin.blumenstingl@googlemail.com, john@phrozen.org,
	linux-spi@vger.kernel.org, hauke.mehrtens@intel.com,
	robh@kernel.org, andy.shevchenko@gmail.com,
	p.zabel@pengutronix.de, kishon@ti.com, mark.rutland@arm.com,
	Hauke Mehrtens <hauke@hauke-m.de>
Subject: [PATCH v9 07/16] Documentation: DT: MIPS: lantiq: Add docs for the RCU bindings
Date: Wed,  9 Aug 2017 00:52:38 +0200	[thread overview]
Message-ID: <20170808225247.32266-8-hauke@hauke-m.de> (raw)
In-Reply-To: <20170808225247.32266-1-hauke@hauke-m.de>

From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

This adds the initial documentation for the RCU module (a MFD device
which provides USB PHYs, reset controllers and more).

The RCU register range is used for multiple purposes. Mostly one device
uses one or multiple register exclusively, but for some registers some
bits are for one driver and some other bits are for a different driver.
With this patch all accesses to the RCU registers will go through
syscon.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/mips/lantiq/rcu.txt        | 90 ++++++++++++++++++++++
 1 file changed, 90 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mips/lantiq/rcu.txt

diff --git a/Documentation/devicetree/bindings/mips/lantiq/rcu.txt b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt
new file mode 100644
index 000000000000..7b9be2d13c53
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt
@@ -0,0 +1,90 @@
+Lantiq XWAY SoC RCU binding
+===========================
+
+This binding describes the RCU (reset controller unit) multifunction device,
+where each sub-device has it's own set of registers.
+
+The RCU register range is used for multiple purposes. Mostly one device
+uses one or multiple register exclusively, but for some registers some
+bits are for one driver and some other bits are for a different driver.
+With this patch all accesses to the RCU registers will go through
+syscon.
+
+
+-------------------------------------------------------------------------------
+Required properties:
+- compatible	: The first and second values must be:
+		  "lantiq,xrx200-rcu", "simple-mfd", "syscon"
+- reg		: The address and length of the system control registers
+
+
+-------------------------------------------------------------------------------
+Example of the RCU bindings on a xRX200 SoC:
+	rcu0: rcu@203000 {
+		compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
+		reg = <0x203000 0x100>;
+		ranges = <0x0 0x203000 0x100>;
+		big-endian;
+
+		gphy0: gphy@20 {
+			compatible = "lantiq,xrx200a2x-gphy";
+			reg = <0x20 0x4>;
+
+			resets = <&reset0 31 30>, <&reset1 7 7>;
+			reset-names = "gphy", "gphy2";
+			lantiq,gphy-mode = <GPHY_MODE_GE>;
+		};
+
+		gphy1: gphy@68 {
+			compatible = "lantiq,xrx200a2x-gphy";
+			reg = <0x68 0x4>;
+
+			resets = <&reset0 29 28>, <&reset1 6 6>;
+			reset-names = "gphy", "gphy2";
+			lantiq,gphy-mode = <GPHY_MODE_GE>;
+		};
+
+		reset0: reset-controller@10 {
+			compatible = "lantiq,xrx200-reset";
+			reg = <0x10 4>, <0x14 4>;
+
+			#reset-cells = <2>;
+		};
+
+		reset1: reset-controller@48 {
+			compatible = "lantiq,xrx200-reset";
+			reg = <0x48 4>, <0x24 4>;
+
+			#reset-cells = <2>;
+		};
+
+		usb_phy0: usb2-phy@18 {
+			compatible = "lantiq,xrx200-usb2-phy";
+			reg = <0x18 4>, <0x38 4>;
+			status = "disabled";
+
+			resets = <&reset1 4 4>, <&reset0 4 4>;
+			reset-names = "phy", "ctrl";
+			#phy-cells = <0>;
+		};
+
+		usb_phy1: usb2-phy@34 {
+			compatible = "lantiq,xrx200-usb2-phy";
+			reg = <0x34 4>, <0x3C 4>;
+			status = "disabled";
+
+			resets = <&reset1 5 4>, <&reset0 4 4>;
+			reset-names = "phy", "ctrl";
+			#phy-cells = <0>;
+		};
+
+		reboot@10 {
+			compatible = "syscon-reboot";
+			reg = <0x10 4>;
+
+			regmap = <&rcu0>;
+			offset = <0x10>;
+			mask = <0x40000000>;
+		};
+	};
+
-- 
2.11.0


  parent reply	other threads:[~2017-08-08 22:52 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-08 22:52 [PATCH v9 00/16] MIPS: lantiq: handle RCU register by separate drivers Hauke Mehrtens
2017-08-08 22:52 ` Hauke Mehrtens
     [not found] ` <20170808225247.32266-1-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-08-08 22:52   ` [PATCH v9 01/16] MIPS: lantiq: Use of_platform_default_populate instead of __dt_register_buses Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
2017-08-08 22:52   ` [PATCH v9 02/16] mtd: lantiq-flash: drop check of boot select Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
2017-08-08 22:52   ` [PATCH v9 03/16] mtd: spi-falcon: " Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
     [not found]     ` <20170808225247.32266-4-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-08-09 11:44       ` Mark Brown
2017-08-09 11:44         ` Mark Brown
     [not found]         ` <20170809114421.oo2bunardgw3p4tk-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2017-08-09 14:02           ` Langer, Thomas
2017-08-09 14:02             ` Langer, Thomas
2017-08-09 14:02             ` Langer, Thomas
     [not found]             ` <0DAF21CFE1B20740AE23D6AF6E54843F1EA0A385-kPTMFJFq+rF9qrmMLTLiibfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2017-08-10 15:05               ` Mark Brown
2017-08-10 15:05                 ` Mark Brown
2017-08-10 15:05                 ` Mark Brown
2017-08-08 22:52   ` [PATCH v9 04/16] watchdog: lantiq: access boot cause register through regmap Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
2017-08-08 22:52   ` [PATCH v9 05/16] watchdog: lantiq: add device tree binding documentation Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
     [not found]     ` <20170808225247.32266-6-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-08-17 15:09       ` Rob Herring
2017-08-17 15:09         ` Rob Herring
2017-08-08 22:52   ` [PATCH v9 06/16] MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFD Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
2017-08-08 22:52   ` Hauke Mehrtens [this message]
2017-08-08 22:52     ` [PATCH v9 07/16] Documentation: DT: MIPS: lantiq: Add docs for the RCU bindings Hauke Mehrtens
2017-08-08 22:52   ` [PATCH v9 08/16] MIPS: lantiq: Convert the fpi bus driver to a platform_driver Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
2017-08-08 22:52   ` [PATCH v9 09/16] MIPS: lantiq: remove ltq_reset_cause() and ltq_boot_select() Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
2017-08-08 22:52   ` [PATCH v9 10/16] reset: Add a reset controller driver for the Lantiq XWAY based SoCs Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
     [not found]     ` <20170808225247.32266-11-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-08-17 15:10       ` Rob Herring
2017-08-17 15:10         ` Rob Herring
2017-08-08 22:52   ` [PATCH v9 11/16] MIPS: lantiq: remove old reset controller implementation Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
2017-08-08 22:52   ` [PATCH v9 12/16] MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
2017-08-08 22:52   ` [PATCH v9 13/16] MIPS: lantiq: remove old GPHY loader code Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
2017-08-08 22:52   ` [PATCH v9 14/16] phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
2017-08-11 10:23     ` Kishon Vijay Abraham I
2017-08-11 10:23       ` Kishon Vijay Abraham I
     [not found]     ` <20170808225247.32266-15-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-08-17 15:10       ` Rob Herring
2017-08-17 15:10         ` Rob Herring
2017-08-08 22:52   ` [PATCH v9 15/16] MIPS: lantiq: remove old USB PHY initialisation Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens
2017-08-08 22:52   ` [PATCH v9 16/16] MIPS: lantiq: Remove the arch/mips/lantiq/xway/reset.c implementation Hauke Mehrtens
2017-08-08 22:52     ` Hauke Mehrtens

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170808225247.32266-8-hauke@hauke-m.de \
    --to=hauke-5/s+jyg5szeelga04laivw@public.gmane.org \
    --cc=andy.shevchenko-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org \
    --cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=hauke.mehrtens-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org \
    --cc=john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org \
    --cc=kishon-l0cyMroinI0@public.gmane.org \
    --cc=linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org \
    --cc=linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
    --cc=linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
    --cc=mark.rutland-5wv7dgnIgG8@public.gmane.org \
    --cc=martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org \
    --cc=p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org \
    --cc=ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org \
    --cc=robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.