From: Stafford Horne <shorne@gmail.com> To: QEMU Development <qemu-devel@nongnu.org> Cc: Richard Henderson <rth@twiddle.net>, Richard Henderson <richard.henderson@linaro.org>, Openrisc <openrisc@lists.librecores.org>, Stafford Horne <shorne@gmail.com> Subject: [Qemu-devel] [PATCH v2 5/5] openrisc: Only kick cpu on timeout, not on update Date: Fri, 13 Oct 2017 22:49:30 +0900 [thread overview] Message-ID: <20171013134930.32547-6-shorne@gmail.com> (raw) In-Reply-To: <20171013134930.32547-1-shorne@gmail.com> Previously we were kicking the cpu on every update. This caused problems noticeable in SMP configurations where one CPU got pinned continuously servicing timer exceptions. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com> --- hw/openrisc/cputimer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/openrisc/cputimer.c b/hw/openrisc/cputimer.c index 4c5415ff75..850f88761c 100644 --- a/hw/openrisc/cputimer.c +++ b/hw/openrisc/cputimer.c @@ -78,7 +78,6 @@ void cpu_openrisc_timer_update(OpenRISCCPU *cpu) } next = now + (uint64_t)wait * TIMER_PERIOD; timer_mod(cpu->env.timer, next); - qemu_cpu_kick(CPU(cpu)); } void cpu_openrisc_count_start(OpenRISCCPU *cpu) @@ -120,6 +119,7 @@ static void openrisc_timer_cb(void *opaque) } cpu_openrisc_timer_update(cpu); + qemu_cpu_kick(CPU(cpu)); } static const VMStateDescription vmstate_or1k_timer = { -- 2.13.6
WARNING: multiple messages have this Message-ID (diff)
From: Stafford Horne <shorne@gmail.com> To: openrisc@lists.librecores.org Subject: [OpenRISC] [PATCH v2 5/5] openrisc: Only kick cpu on timeout, not on update Date: Fri, 13 Oct 2017 22:49:30 +0900 [thread overview] Message-ID: <20171013134930.32547-6-shorne@gmail.com> (raw) In-Reply-To: <20171013134930.32547-1-shorne@gmail.com> Previously we were kicking the cpu on every update. This caused problems noticeable in SMP configurations where one CPU got pinned continuously servicing timer exceptions. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Stafford Horne <shorne@gmail.com> --- hw/openrisc/cputimer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/openrisc/cputimer.c b/hw/openrisc/cputimer.c index 4c5415ff75..850f88761c 100644 --- a/hw/openrisc/cputimer.c +++ b/hw/openrisc/cputimer.c @@ -78,7 +78,6 @@ void cpu_openrisc_timer_update(OpenRISCCPU *cpu) } next = now + (uint64_t)wait * TIMER_PERIOD; timer_mod(cpu->env.timer, next); - qemu_cpu_kick(CPU(cpu)); } void cpu_openrisc_count_start(OpenRISCCPU *cpu) @@ -120,6 +119,7 @@ static void openrisc_timer_cb(void *opaque) } cpu_openrisc_timer_update(cpu); + qemu_cpu_kick(CPU(cpu)); } static const VMStateDescription vmstate_or1k_timer = { -- 2.13.6
next prev parent reply other threads:[~2017-10-13 13:50 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-10-13 13:49 [Qemu-devel] [PATCH v2 0/5] OpenRISC SMP Support Stafford Horne 2017-10-13 13:49 ` [OpenRISC] " Stafford Horne 2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 1/5] openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC) Stafford Horne 2017-10-13 13:49 ` [OpenRISC] " Stafford Horne 2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 2/5] target/openrisc: Make coreid and numcores variable Stafford Horne 2017-10-13 13:49 ` [OpenRISC] " Stafford Horne 2017-10-13 13:58 ` [Qemu-devel] " Richard Henderson 2017-10-13 13:58 ` [OpenRISC] " Richard Henderson 2017-10-13 14:31 ` [Qemu-devel] " Stafford Horne 2017-10-13 14:31 ` [OpenRISC] " Stafford Horne 2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 3/5] openrisc/cputimer: Perparation for Multicore Stafford Horne 2017-10-13 13:49 ` [OpenRISC] " Stafford Horne 2017-10-13 13:49 ` [Qemu-devel] [PATCH v2 4/5] openrisc: Initial SMP support Stafford Horne 2017-10-13 13:49 ` [OpenRISC] " Stafford Horne 2017-10-13 13:49 ` Stafford Horne [this message] 2017-10-13 13:49 ` [OpenRISC] [PATCH v2 5/5] openrisc: Only kick cpu on timeout, not on update Stafford Horne
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