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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 11/17] drm/i915/gtt: Free unused page tables on unbind the context
Date: Wed,  6 Jun 2018 07:27:04 +0100	[thread overview]
Message-ID: <20180606062710.29984-12-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20180606062710.29984-1-chris@chris-wilson.co.uk>

As we cannot reliably change used page tables while the context is
active, the earliest opportunity we have to recover excess pages is when
the context becomes idle. So whenever we unbind the context (it must be
idle, and indeed being evicted) free the unused ptes.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 44 +++++++++++++++++++++++++----
 drivers/gpu/drm/i915/i915_gem_gtt.h |  1 +
 2 files changed, 40 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index d29e49226f33..bb1b26030d81 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1804,20 +1804,28 @@ static void gen6_ppgtt_enable(struct drm_i915_private *dev_priv)
 static void gen6_ppgtt_clear_range(struct i915_address_space *vm,
 				   u64 start, u64 length)
 {
-	struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
+	struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm));
 	unsigned int first_entry = start >> PAGE_SHIFT;
 	unsigned int pde = first_entry / GEN6_PTES;
 	unsigned int pte = first_entry % GEN6_PTES;
 	unsigned int num_entries = length >> PAGE_SHIFT;
-	gen6_pte_t scratch_pte =
+	const gen6_pte_t scratch_pte =
 		vm->pte_encode(vm->scratch_page.daddr, I915_CACHE_LLC, 0);
 
 	while (num_entries) {
-		struct i915_page_table *pt = ppgtt->pd.page_table[pde++];
-		unsigned int end = min(pte + num_entries, GEN6_PTES);
+		struct i915_page_table *pt = ppgtt->base.pd.page_table[pde++];
+		const unsigned int end = min(pte + num_entries, GEN6_PTES);
+		const unsigned int count = end - pte;
 		gen6_pte_t *vaddr;
 
-		num_entries -= end - pte;
+		GEM_BUG_ON(pt == vm->scratch_pt);
+
+		num_entries -= count;
+
+		GEM_BUG_ON(count > pt->used_ptes);
+		pt->used_ptes -= count;
+		if (!pt->used_ptes)
+			ppgtt->scan_for_unused_pt = true;
 
 		/*
 		 * Note that the hw doesn't support removing PDE on the fly
@@ -1849,6 +1857,8 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm,
 	struct sgt_dma iter = sgt_dma(vma);
 	gen6_pte_t *vaddr;
 
+	GEM_BUG_ON(ppgtt->pd.page_table[act_pt] == vm->scratch_pt);
+
 	vaddr = kmap_atomic_px(ppgtt->pd.page_table[act_pt]);
 	do {
 		vaddr[act_pte] = pte_encode | GEN6_PTE_ADDR_ENCODE(iter.dma);
@@ -1884,6 +1894,8 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
 	bool flush = false;
 
 	gen6_for_each_pde(pt, &ppgtt->base.pd, start, length, pde) {
+		const unsigned int count = gen6_pte_count(start, length);
+
 		if (pt == vm->scratch_pt) {
 			pt = alloc_pt(vm);
 			if (IS_ERR(pt))
@@ -1900,7 +1912,11 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
 					  ppgtt->pd_addr + pde);
 				flush = true;
 			}
+
+			GEM_BUG_ON(pt->used_ptes);
 		}
+
+		pt->used_ptes += count;
 	}
 
 	if (flush) {
@@ -2004,6 +2020,24 @@ static int pd_vma_bind(struct i915_vma *vma,
 
 static void pd_vma_unbind(struct i915_vma *vma)
 {
+	struct gen6_hw_ppgtt *ppgtt = vma->private;
+	struct i915_page_table * const scratch_pt = ppgtt->base.vm.scratch_pt;
+	struct i915_page_table *pt;
+	unsigned int pde;
+
+	if (!ppgtt->scan_for_unused_pt)
+		return;
+
+	/* Free all no longer used page tables */
+	gen6_for_all_pdes(pt, &ppgtt->base.pd, pde) {
+		if (pt->used_ptes || pt == scratch_pt)
+			continue;
+
+		free_pt(&ppgtt->base.vm, pt);
+		ppgtt->base.pd.page_table[pde] = scratch_pt;
+	}
+
+	ppgtt->scan_for_unused_pt = false;
 }
 
 static const struct i915_vma_ops pd_vma_ops = {
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index c20a4f06db37..dc98830fae69 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -414,6 +414,7 @@ struct gen6_hw_ppgtt {
 	gen6_pte_t __iomem *pd_addr;
 
 	unsigned int pin_count;
+	bool scan_for_unused_pt;
 
 	int (*switch_mm)(struct gen6_hw_ppgtt *ppgtt, struct i915_request *rq);
 };
-- 
2.17.1

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  parent reply	other threads:[~2018-06-06  6:27 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-06  6:26 Full ppgtt for hsw, closer Chris Wilson
2018-06-06  6:26 ` [PATCH 01/17] drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories Chris Wilson
2018-06-06  6:26 ` [PATCH 02/17] drm/i915: Prepare for non-object vma Chris Wilson
2018-06-06 23:18   ` Matthew Auld
2018-06-06  6:26 ` [PATCH 03/17] drm/i915: Decouple vma vfuncs from vm Chris Wilson
2018-06-06  6:26 ` [PATCH 04/17] drm/i915/gtt: Push allocation to hw ppgtt constructor Chris Wilson
2018-06-06  6:26 ` [PATCH 05/17] drm/i915/gtt: Subclass gen6_hw_ppgtt Chris Wilson
2018-06-06  6:26 ` [PATCH 06/17] drm/i915/gtt Onionify error handling for gen6_ppgtt_create Chris Wilson
2018-06-06 23:24   ` Matthew Auld
2018-06-06 23:25     ` Matthew Auld
2018-06-06  6:27 ` [PATCH 07/17] drm/i915/gtt: Reorder aliasing_ppgtt fini Chris Wilson
2018-06-06 23:29   ` Matthew Auld
2018-06-06  6:27 ` [PATCH 08/17] drm/i915/gtt: Make gen6 page directories evictable Chris Wilson
2018-06-06  6:45   ` [PATCH] " Chris Wilson
2018-06-06  6:51   ` Chris Wilson
2018-06-06 23:07     ` Matthew Auld
2018-06-06  6:27 ` [PATCH 09/17] drm/i915/gtt: Only keep gen6 page directories pinned while active Chris Wilson
2018-06-06  6:27 ` [PATCH 10/17] drm/i915/gtt: Lazily allocate page directories for gen7 Chris Wilson
2018-06-06 22:25   ` Matthew Auld
2018-06-06  6:27 ` Chris Wilson [this message]
2018-06-06 22:27   ` [PATCH 11/17] drm/i915/gtt: Free unused page tables on unbind the context Matthew Auld
2018-06-06  6:27 ` [PATCH 12/17] drm/i915/gtt: Skip initializing PT with scratch if full Chris Wilson
2018-06-06 22:27   ` Matthew Auld
2018-06-06  6:27 ` [PATCH 13/17] drm/i915/gtt: Cache the PTE encoding of the scratch page Chris Wilson
2018-06-06 22:29   ` Matthew Auld
2018-06-06  6:27 ` [PATCH 14/17] drm/i915/gtt: Reduce a pair of runtime asserts Chris Wilson
2018-06-06 22:32   ` Matthew Auld
2018-06-06  6:27 ` [PATCH 15/17] drm/i915/gtt: Skip clearing the GGTT under gen6+ full-ppgtt Chris Wilson
2018-06-06  6:27 ` [PATCH 16/17] drm/i915/ringbuffer: Force restore of mm after failed context switch Chris Wilson
2018-06-06  6:27 ` [PATCH 17/17] RFT drm/i915/gtt: Enable full-ppgtt by default everywhere Chris Wilson
2018-06-06  6:43 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/17] drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories Patchwork
2018-06-06  6:47 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-06-06  7:03 ` ✓ Fi.CI.BAT: success " Patchwork
2018-06-06  7:07 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/17] drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories (rev3) Patchwork
2018-06-06  7:12 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-06-06  7:23 ` ✓ Fi.CI.BAT: success " Patchwork
2018-06-06  9:42 ` ✗ Fi.CI.IGT: failure " Patchwork

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