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From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>,
	Jani Nikula <jani.nikula@intel.com>,
	Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH] drm/i915/psr: Enable PSR1 on gen-9+ HW
Date: Thu,  6 Sep 2018 16:52:02 -0700	[thread overview]
Message-ID: <20180906235202.29865-1-dhinakaran.pandiyan@intel.com> (raw)

We have new tests and fixes in place since the feature was last
disabled.

Try again for gen-9+ hardware and enable only PSR1 as a first step.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Jose Roberto de Souza <jose.souza@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
References: commit 2ee7dc497e34 ("drm/i915: disable PSR by default on HSW/BDW")
References: commit dcb2e993f3c0 ("Revert "drm/i915: Enable PSR by default on Valleyview and Cherryview."")
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index b6838b525502..fc823f93a4dc 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -71,6 +71,10 @@ static bool psr_global_enabled(u32 debug)
 static bool intel_psr2_enabled(struct drm_i915_private *dev_priv,
 			       const struct intel_crtc_state *crtc_state)
 {
+	/* Disable PSR2 by default for all platforms */
+	if (i915_modparams.enable_psr == -1)
+		return false;
+
 	switch (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
 	case I915_PSR_DEBUG_FORCE_PSR1:
 		return false;
@@ -1051,7 +1055,7 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
  * intel_psr_init - Init basic PSR work and mutex.
  * @dev_priv: i915 device private
  *
- * This function is  called only once at driver load to initialize basic
+ * This function is called only once at driver load to initialize basic
  * PSR stuff.
  */
 void intel_psr_init(struct drm_i915_private *dev_priv)
@@ -1065,19 +1069,14 @@ void intel_psr_init(struct drm_i915_private *dev_priv)
 	if (!dev_priv->psr.sink_support)
 		return;
 
-	if (i915_modparams.enable_psr == -1) {
-		i915_modparams.enable_psr = dev_priv->vbt.psr.enable;
-
-		/* Per platform default: all disabled. */
-		i915_modparams.enable_psr = 0;
-	}
+	if (i915_modparams.enable_psr == -1)
+		if (INTEL_GEN(dev_priv) < 9 || !dev_priv->vbt.psr.enable)
+			i915_modparams.enable_psr = 0;
 
-	/* Set link_standby x link_off defaults */
 	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
 		/* HSW and BDW require workarounds that we don't implement. */
 		dev_priv->psr.link_standby = false;
 	else
-		/* For new platforms let's respect VBT back again */
 		dev_priv->psr.link_standby = dev_priv->vbt.psr.full_link;
 
 	INIT_WORK(&dev_priv->psr.work, intel_psr_work);
-- 
2.17.1

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             reply	other threads:[~2018-09-06 23:52 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-06 23:52 Dhinakaran Pandiyan [this message]
2018-09-07  0:13 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/psr: Enable PSR1 on gen-9+ HW Patchwork
2018-09-07  0:31 ` ✓ Fi.CI.BAT: success " Patchwork
2018-09-07  1:18 ` ✓ Fi.CI.IGT: " Patchwork
2018-09-07  5:06 ` [PATCH] " Rodrigo Vivi
2018-09-07  6:49   ` Dhinakaran Pandiyan
2018-09-11 14:04   ` Ville Syrjälä
2018-09-18  0:39     ` Dhinakaran Pandiyan

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