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From: "Z.q. Hou" <zhiqiang.hou@nxp.com>
To: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	Leo Li <leoyang.li@nxp.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>,
	"M.h. Lian" <minghuan.lian@nxp.com>,
	Xiaowei Bao <xiaowei.bao@nxp.com>,
	"Z.q. Hou" <zhiqiang.hou@nxp.com>
Subject: [PATCH 10/23] PCI: mobiveil: fix the INTx process error
Date: Tue, 6 Nov 2018 13:20:10 +0000	[thread overview]
Message-ID: <20181106131807.29951-11-Zhiqiang.Hou@nxp.com> (raw)
In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com>

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

In the loop block, there is not code change the loop key,
this patch updated the loop key by re-read the INTx status
register.

This patch also change to clear the handled INTx status.

Note: Need MV to test this change.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 drivers/pci/controller/pcie-mobiveil.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index d03392940944..884c9f95374d 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -361,6 +361,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc)
 	/* Handle INTx */
 	if (intr_status & PAB_INTP_INTX_MASK) {
 		shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT);
+		shifted_status &= PAB_INTP_INTX_MASK;
 		shifted_status >>= PAB_INTX_START;
 		do {
 			for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) {
@@ -372,12 +373,16 @@ static void mobiveil_pcie_isr(struct irq_desc *desc)
 					dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n",
 							    bit);
 
-				/* clear interrupt */
-				csr_writel(pcie,
-					   shifted_status << PAB_INTX_START,
+				/* clear interrupt handled */
+				csr_writel(pcie, 1 << (PAB_INTX_START + bit),
 					   PAB_INTP_AMBA_MISC_STAT);
 			}
-		} while ((shifted_status >> PAB_INTX_START) != 0);
+
+			shifted_status = csr_readl(pcie,
+						   PAB_INTP_AMBA_MISC_STAT);
+			shifted_status &= PAB_INTP_INTX_MASK;
+			shifted_status >>= PAB_INTX_START;
+		} while (shifted_status != 0);
 	}
 
 	/* read extra MSI status register */
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: zhiqiang.hou@nxp.com (Z.q. Hou)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 10/23] PCI: mobiveil: fix the INTx process error
Date: Tue, 6 Nov 2018 13:20:10 +0000	[thread overview]
Message-ID: <20181106131807.29951-11-Zhiqiang.Hou@nxp.com> (raw)
In-Reply-To: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com>

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

In the loop block, there is not code change the loop key,
this patch updated the loop key by re-read the INTx status
register.

This patch also change to clear the handled INTx status.

Note: Need MV to test this change.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
---
 drivers/pci/controller/pcie-mobiveil.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index d03392940944..884c9f95374d 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -361,6 +361,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc)
 	/* Handle INTx */
 	if (intr_status & PAB_INTP_INTX_MASK) {
 		shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT);
+		shifted_status &= PAB_INTP_INTX_MASK;
 		shifted_status >>= PAB_INTX_START;
 		do {
 			for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) {
@@ -372,12 +373,16 @@ static void mobiveil_pcie_isr(struct irq_desc *desc)
 					dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n",
 							    bit);
 
-				/* clear interrupt */
-				csr_writel(pcie,
-					   shifted_status << PAB_INTX_START,
+				/* clear interrupt handled */
+				csr_writel(pcie, 1 << (PAB_INTX_START + bit),
 					   PAB_INTP_AMBA_MISC_STAT);
 			}
-		} while ((shifted_status >> PAB_INTX_START) != 0);
+
+			shifted_status = csr_readl(pcie,
+						   PAB_INTP_AMBA_MISC_STAT);
+			shifted_status &= PAB_INTP_INTX_MASK;
+			shifted_status >>= PAB_INTX_START;
+		} while (shifted_status != 0);
 	}
 
 	/* read extra MSI status register */
-- 
2.17.1

  parent reply	other threads:[~2018-11-06 13:20 UTC|newest]

Thread overview: 103+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-06 13:19 [PATCH 00/23] PCI: refactor the Mobiveil driver and add PCIe support for NXP LX SoCs Z.q. Hou
2018-11-06 13:19 ` Z.q. Hou
2018-11-06 13:19 ` Z.q. Hou
2018-11-06 13:19 ` [PATCH 01/23] PCI: mobiveil: uniform the register accessors Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19 ` [PATCH 02/23] PCI: mobiveil: format the code without function change Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19 ` [PATCH 03/23] PCI: mobiveil: correct the returned error number Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19 ` [PATCH 04/23] PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19 ` [PATCH 05/23] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19 ` [PATCH 06/23] PCI: mobiveil: replace the resource list iteration function Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19 ` [PATCH 07/23] PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19 ` [PATCH 08/23] PCI: mobiveil: use the 1st inbound window for MEM inbound transactions Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:19   ` Z.q. Hou
2018-11-06 13:20 ` [PATCH 09/23] PCI: mobiveil: correct the inbound/outbound window setup routine Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20 ` Z.q. Hou [this message]
2018-11-06 13:20   ` [PATCH 10/23] PCI: mobiveil: fix the INTx process error Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-15  2:59   ` Z.q. Hou
2018-11-15  2:59     ` Z.q. Hou
2018-11-15  2:59     ` Z.q. Hou
2018-11-06 13:20 ` [PATCH 11/23] PCI: mobiveil: only fixup the Class Code field Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20 ` [PATCH 12/23] PCI: mobiveil: move out the link up waiting from mobiveil_host_init Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20 ` [PATCH 13/23] PCI: mobiveil: move irq chained handler setup out of DT parse Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20 ` [PATCH 14/23] PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20 ` [PATCH 15/23] dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-12 18:12   ` Rob Herring
2018-11-12 18:12     ` Rob Herring
2018-11-13  6:08     ` Z.q. Hou
2018-11-13  6:08       ` Z.q. Hou
2018-11-13  6:08       ` Z.q. Hou
2018-11-14  9:33   ` Subrahmanya Lingappa
2018-11-14  9:33     ` Subrahmanya Lingappa
2018-11-15  2:27     ` Z.q. Hou
2018-11-15  2:27       ` Z.q. Hou
2018-11-15  2:27       ` Z.q. Hou
2018-11-06 13:20 ` [PATCH 16/23] PCI: mobiveil: refactor the Mobiveil driver Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20 ` [PATCH 17/23] PCI: mobiveil: continue to initialize the host upon no PCIe link Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:20   ` Z.q. Hou
2018-11-06 13:21 ` [PATCH 18/23] PCI: mobiveil: disabled IB and OB windows set by bootloader Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-11-06 13:21 ` [PATCH 19/23] PCI: mobiveil: add Byte and Half-Word width register accessors Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-11-06 13:21 ` [PATCH 20/23] PCI: mobiveil: change prototype of function mobiveil_host_init Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-11-06 13:21 ` [PATCH 21/23] dt-bindings: pci: Add NXP LX SoCs PCIe controller Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-11-08 21:29   ` Leo Li
2018-11-08 21:29     ` Leo Li
2018-11-08 21:29     ` Leo Li
2018-11-12  1:48     ` Z.q. Hou
2018-11-12  1:48       ` Z.q. Hou
2018-11-12  1:48       ` Z.q. Hou
2018-11-14 18:51       ` Leo Li
2018-11-14 18:51         ` Leo Li
2018-11-14 18:51         ` Leo Li
2018-11-15  2:47         ` Z.q. Hou
2018-11-15  2:47           ` Z.q. Hou
2018-11-15  2:47           ` Z.q. Hou
2018-11-06 13:21 ` [PATCH 22/23] PCI: mobiveil: add PCIe RC driver for NXP LX series SoCs Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-11-06 13:21 ` [PATCH 23/23] arm64: dts: freescale: lx2160a: add pcie DT nodes Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-11-06 13:21   ` Z.q. Hou
2018-12-03 11:58 ` [PATCH 00/23] PCI: refactor the Mobiveil driver and add PCIe support for NXP LX SoCs Lorenzo Pieralisi
2018-12-03 11:58   ` Lorenzo Pieralisi
2018-12-03 11:58   ` Lorenzo Pieralisi
2018-12-10 10:13   ` Subrahmanya Lingappa
2018-12-10 10:16   ` Subrahmanya Lingappa
2018-12-10 10:16     ` Subrahmanya Lingappa

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