From: Geert Uytterhoeven <geert+renesas@glider.be> To: Linus Walleij <linus.walleij@linaro.org> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>, linux-renesas-soc@vger.kernel.org, linux-sh@vger.kernel.org, linux-gpio@vger.kernel.org, Geert Uytterhoeven <geert+renesas@glider.be> Subject: [PATCH 06/15] pinctrl: sh-pfc: r8a77995: Remove bogus SEL_PWM[0-3]_3 configurations Date: Thu, 13 Dec 2018 18:27:05 +0000 [thread overview] Message-ID: <20181213182714.26094-7-geert+renesas@glider.be> (raw) In-Reply-To: <20181213182714.26094-1-geert+renesas@glider.be> While the SEL_PWM[0-3] fields in the Module Select Register 0 support 4 possible configurations per PWM pin, only the first 3 are valid. Replace the invalid and unused configurations for SEL_PWM[0-3]_3 by dummies. Fixes: 794a6711764658a1 ("pinctrl: sh-pfc: Initial R8A77995 PFC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c index e457539a61c55bb9..84d78db381e30249 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c @@ -388,10 +388,10 @@ FM(IP12_31_28) IP12_31_28 \ #define MOD_SEL0_27 FM(SEL_MSIOF3_0) FM(SEL_MSIOF3_1) #define MOD_SEL0_26 FM(SEL_HSCIF3_0) FM(SEL_HSCIF3_1) #define MOD_SEL0_25 FM(SEL_SCIF4_0) FM(SEL_SCIF4_1) -#define MOD_SEL0_24_23 FM(SEL_PWM0_0) FM(SEL_PWM0_1) FM(SEL_PWM0_2) FM(SEL_PWM0_3) -#define MOD_SEL0_22_21 FM(SEL_PWM1_0) FM(SEL_PWM1_1) FM(SEL_PWM1_2) FM(SEL_PWM1_3) -#define MOD_SEL0_20_19 FM(SEL_PWM2_0) FM(SEL_PWM2_1) FM(SEL_PWM2_2) FM(SEL_PWM2_3) -#define MOD_SEL0_18_17 FM(SEL_PWM3_0) FM(SEL_PWM3_1) FM(SEL_PWM3_2) FM(SEL_PWM3_3) +#define MOD_SEL0_24_23 FM(SEL_PWM0_0) FM(SEL_PWM0_1) FM(SEL_PWM0_2) F_(0, 0) +#define MOD_SEL0_22_21 FM(SEL_PWM1_0) FM(SEL_PWM1_1) FM(SEL_PWM1_2) F_(0, 0) +#define MOD_SEL0_20_19 FM(SEL_PWM2_0) FM(SEL_PWM2_1) FM(SEL_PWM2_2) F_(0, 0) +#define MOD_SEL0_18_17 FM(SEL_PWM3_0) FM(SEL_PWM3_1) FM(SEL_PWM3_2) F_(0, 0) #define MOD_SEL0_15 FM(SEL_IRQ_0_0) FM(SEL_IRQ_0_1) #define MOD_SEL0_14 FM(SEL_IRQ_1_0) FM(SEL_IRQ_1_1) #define MOD_SEL0_13 FM(SEL_IRQ_2_0) FM(SEL_IRQ_2_1) -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert+renesas@glider.be> To: Linus Walleij <linus.walleij@linaro.org> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>, linux-renesas-soc@vger.kernel.org, linux-sh@vger.kernel.org, linux-gpio@vger.kernel.org, Geert Uytterhoeven <geert+renesas@glider.be> Subject: [PATCH 06/15] pinctrl: sh-pfc: r8a77995: Remove bogus SEL_PWM[0-3]_3 configurations Date: Thu, 13 Dec 2018 19:27:05 +0100 [thread overview] Message-ID: <20181213182714.26094-7-geert+renesas@glider.be> (raw) In-Reply-To: <20181213182714.26094-1-geert+renesas@glider.be> While the SEL_PWM[0-3] fields in the Module Select Register 0 support 4 possible configurations per PWM pin, only the first 3 are valid. Replace the invalid and unused configurations for SEL_PWM[0-3]_3 by dummies. Fixes: 794a6711764658a1 ("pinctrl: sh-pfc: Initial R8A77995 PFC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c index e457539a61c55bb9..84d78db381e30249 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77995.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77995.c @@ -388,10 +388,10 @@ FM(IP12_31_28) IP12_31_28 \ #define MOD_SEL0_27 FM(SEL_MSIOF3_0) FM(SEL_MSIOF3_1) #define MOD_SEL0_26 FM(SEL_HSCIF3_0) FM(SEL_HSCIF3_1) #define MOD_SEL0_25 FM(SEL_SCIF4_0) FM(SEL_SCIF4_1) -#define MOD_SEL0_24_23 FM(SEL_PWM0_0) FM(SEL_PWM0_1) FM(SEL_PWM0_2) FM(SEL_PWM0_3) -#define MOD_SEL0_22_21 FM(SEL_PWM1_0) FM(SEL_PWM1_1) FM(SEL_PWM1_2) FM(SEL_PWM1_3) -#define MOD_SEL0_20_19 FM(SEL_PWM2_0) FM(SEL_PWM2_1) FM(SEL_PWM2_2) FM(SEL_PWM2_3) -#define MOD_SEL0_18_17 FM(SEL_PWM3_0) FM(SEL_PWM3_1) FM(SEL_PWM3_2) FM(SEL_PWM3_3) +#define MOD_SEL0_24_23 FM(SEL_PWM0_0) FM(SEL_PWM0_1) FM(SEL_PWM0_2) F_(0, 0) +#define MOD_SEL0_22_21 FM(SEL_PWM1_0) FM(SEL_PWM1_1) FM(SEL_PWM1_2) F_(0, 0) +#define MOD_SEL0_20_19 FM(SEL_PWM2_0) FM(SEL_PWM2_1) FM(SEL_PWM2_2) F_(0, 0) +#define MOD_SEL0_18_17 FM(SEL_PWM3_0) FM(SEL_PWM3_1) FM(SEL_PWM3_2) F_(0, 0) #define MOD_SEL0_15 FM(SEL_IRQ_0_0) FM(SEL_IRQ_0_1) #define MOD_SEL0_14 FM(SEL_IRQ_1_0) FM(SEL_IRQ_1_1) #define MOD_SEL0_13 FM(SEL_IRQ_2_0) FM(SEL_IRQ_2_1) -- 2.17.1
next prev parent reply other threads:[~2018-12-13 18:27 UTC|newest] Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-12-13 18:26 [PATCH 00/15] pinctrl: sh-pfc: Fix config register descriptions Geert Uytterhoeven 2018-12-13 18:26 ` Geert Uytterhoeven 2018-12-13 18:27 ` [PATCH 01/15] pinctrl: sh-pfc: r8a77994: Remove bogus IPSR9 field Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-14 8:00 ` Sergei Shtylyov 2018-12-14 8:00 ` Sergei Shtylyov 2018-12-14 9:38 ` Geert Uytterhoeven 2018-12-14 9:38 ` Geert Uytterhoeven 2018-12-17 13:38 ` Simon Horman 2018-12-17 13:38 ` Simon Horman 2018-12-13 18:27 ` [PATCH 02/15] pinctrl: sh-pfc: r8a779970: Add missing MOD_SEL0 field Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-17 13:47 ` Simon Horman 2018-12-17 13:47 ` Simon Horman 2018-12-13 18:27 ` [PATCH 03/15] pinctrl: sh-pfc: r8a779980: " Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-17 13:48 ` Simon Horman 2018-12-17 13:48 ` Simon Horman 2018-12-13 18:27 ` [PATCH 04/15] pinctrl: sh-pfc: sh7734: Add missing IPSR11 field Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-17 14:03 ` Simon Horman 2018-12-17 14:03 ` Simon Horman 2018-12-13 18:27 ` [PATCH 05/15] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 SEL_I2C1 field width Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-17 13:58 ` Simon Horman 2018-12-17 13:58 ` Simon Horman 2018-12-13 18:27 ` Geert Uytterhoeven [this message] 2018-12-13 18:27 ` [PATCH 06/15] pinctrl: sh-pfc: r8a77995: Remove bogus SEL_PWM[0-3]_3 configurations Geert Uytterhoeven 2018-12-17 14:07 ` Simon Horman 2018-12-17 14:07 ` Simon Horman 2018-12-17 14:12 ` Geert Uytterhoeven 2018-12-17 14:12 ` Geert Uytterhoeven 2018-12-17 19:58 ` Simon Horman 2018-12-17 19:58 ` Simon Horman 2018-12-13 18:27 ` [PATCH 07/15] pinctrl: sh-pfc: sh7264: Fix PFCR3 and PFCR0 register configuration Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-17 14:24 ` Simon Horman 2018-12-17 14:24 ` Simon Horman 2018-12-13 18:27 ` [PATCH 08/15] pinctrl: sh-pfc: sh7269: Add missing PCIOR0 field Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-17 14:29 ` Simon Horman 2018-12-17 14:29 ` Simon Horman 2018-12-13 18:27 ` [PATCH 09/15] pinctrl: sh-pfc: sh7734: Remove bogus IPSR10 value Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-17 14:31 ` Simon Horman 2018-12-17 14:31 ` Simon Horman 2018-12-13 18:27 ` [PATCH 10/15] pinctrl: sh-pfc: sh7734: Fix shifted values in IPSR10 Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-17 14:37 ` Simon Horman 2018-12-17 14:37 ` Simon Horman 2018-12-17 14:45 ` Geert Uytterhoeven 2018-12-17 14:45 ` Geert Uytterhoeven 2018-12-17 15:18 ` Simon Horman 2018-12-17 15:18 ` Simon Horman 2018-12-13 18:27 ` [PATCH 11/15] pinctrl: sh-pfc: Print actual field width for variable-width fields Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-17 14:46 ` Simon Horman 2018-12-17 14:46 ` Simon Horman 2018-12-17 14:58 ` Geert Uytterhoeven 2018-12-17 14:58 ` Geert Uytterhoeven 2018-12-17 15:17 ` Simon Horman 2018-12-17 15:17 ` Simon Horman 2018-12-13 18:27 ` [PATCH 12/15] pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-17 14:47 ` Simon Horman 2018-12-17 14:47 ` Simon Horman 2018-12-13 18:27 ` [PATCH 13/15] [RFC] pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-13 18:27 ` [PATCH 14/15] [RFC] pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven 2018-12-13 18:27 ` [PATCH 15/15] [RFC] pinctrl: sh-pfc: Validate pinmux tables at runtime when debugging Geert Uytterhoeven 2018-12-13 18:27 ` Geert Uytterhoeven
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