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From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,
	Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	linux-renesas-soc@vger.kernel.org, linux-sh@vger.kernel.org,
	linux-gpio@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH 07/15] pinctrl: sh-pfc: sh7264: Fix PFCR3 and PFCR0 register configuration
Date: Thu, 13 Dec 2018 18:27:06 +0000	[thread overview]
Message-ID: <20181213182714.26094-8-geert+renesas@glider.be> (raw)
In-Reply-To: <20181213182714.26094-1-geert+renesas@glider.be>

The Port F Control Register 3 (PFCR3) contains only a single field.
However, counting from left to right, it is the fourth field, not the
first field.
Insert the missing dummy configuration values (3 fields of 16 values) to
fix this.

The descriptor for the Port F Control Register 0 (PFCR0) lacks the
description for the 4th field (PF0 Mode, PF0MD[2:0]).
Add the missing configuration values to fix this.

Fixes: a8d42fc4217b1ea1 ("sh-pfc: Add sh7264 pinmux support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Compile-tested only.
Based on the SH7264 Hardware User Manual Rev. 4.00.

The odd location of the closing curly brace in the PFCR0 section
suggests an editing accident.
---
 drivers/pinctrl/sh-pfc/pfc-sh7264.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7264.c b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
index 4f44ce0d7237faa9..501de63e6c5f4be2 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7264.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
@@ -1713,6 +1713,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 	},
 
 	{ PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) {
+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 		PF12MD_000, PF12MD_001, 0, PF12MD_011,
 		PF12MD_100, PF12MD_101, 0, 0,
 		0, 0, 0, 0, 0, 0, 0, 0 }
@@ -1756,8 +1759,10 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 		0, 0, 0, 0, 0, 0, 0, 0,
 		PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,
 		PF1MD_100, PF1MD_101, 0, 0,
-		0, 0, 0, 0, 0, 0, 0, 0
-	 }
+		0, 0, 0, 0, 0, 0, 0, 0,
+		PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011,
+		PF0MD_100, PF0MD_101, 0, 0,
+		0, 0, 0, 0, 0, 0, 0, 0 }
 	},
 
 	{ PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) {
-- 
2.17.1

WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>,
	Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
	linux-renesas-soc@vger.kernel.org, linux-sh@vger.kernel.org,
	linux-gpio@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH 07/15] pinctrl: sh-pfc: sh7264: Fix PFCR3 and PFCR0 register configuration
Date: Thu, 13 Dec 2018 19:27:06 +0100	[thread overview]
Message-ID: <20181213182714.26094-8-geert+renesas@glider.be> (raw)
In-Reply-To: <20181213182714.26094-1-geert+renesas@glider.be>

The Port F Control Register 3 (PFCR3) contains only a single field.
However, counting from left to right, it is the fourth field, not the
first field.
Insert the missing dummy configuration values (3 fields of 16 values) to
fix this.

The descriptor for the Port F Control Register 0 (PFCR0) lacks the
description for the 4th field (PF0 Mode, PF0MD[2:0]).
Add the missing configuration values to fix this.

Fixes: a8d42fc4217b1ea1 ("sh-pfc: Add sh7264 pinmux support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Compile-tested only.
Based on the SH7264 Hardware User Manual Rev. 4.00.

The odd location of the closing curly brace in the PFCR0 section
suggests an editing accident.
---
 drivers/pinctrl/sh-pfc/pfc-sh7264.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7264.c b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
index 4f44ce0d7237faa9..501de63e6c5f4be2 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7264.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
@@ -1713,6 +1713,9 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 	},
 
 	{ PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) {
+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 		PF12MD_000, PF12MD_001, 0, PF12MD_011,
 		PF12MD_100, PF12MD_101, 0, 0,
 		0, 0, 0, 0, 0, 0, 0, 0 }
@@ -1756,8 +1759,10 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 		0, 0, 0, 0, 0, 0, 0, 0,
 		PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,
 		PF1MD_100, PF1MD_101, 0, 0,
-		0, 0, 0, 0, 0, 0, 0, 0
-	 }
+		0, 0, 0, 0, 0, 0, 0, 0,
+		PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011,
+		PF0MD_100, PF0MD_101, 0, 0,
+		0, 0, 0, 0, 0, 0, 0, 0 }
 	},
 
 	{ PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) {
-- 
2.17.1


  parent reply	other threads:[~2018-12-13 18:27 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-13 18:26 [PATCH 00/15] pinctrl: sh-pfc: Fix config register descriptions Geert Uytterhoeven
2018-12-13 18:26 ` Geert Uytterhoeven
2018-12-13 18:27 ` [PATCH 01/15] pinctrl: sh-pfc: r8a77994: Remove bogus IPSR9 field Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-14  8:00   ` Sergei Shtylyov
2018-12-14  8:00     ` Sergei Shtylyov
2018-12-14  9:38     ` Geert Uytterhoeven
2018-12-14  9:38       ` Geert Uytterhoeven
2018-12-17 13:38   ` Simon Horman
2018-12-17 13:38     ` Simon Horman
2018-12-13 18:27 ` [PATCH 02/15] pinctrl: sh-pfc: r8a779970: Add missing MOD_SEL0 field Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-17 13:47   ` Simon Horman
2018-12-17 13:47     ` Simon Horman
2018-12-13 18:27 ` [PATCH 03/15] pinctrl: sh-pfc: r8a779980: " Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-17 13:48   ` Simon Horman
2018-12-17 13:48     ` Simon Horman
2018-12-13 18:27 ` [PATCH 04/15] pinctrl: sh-pfc: sh7734: Add missing IPSR11 field Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-17 14:03   ` Simon Horman
2018-12-17 14:03     ` Simon Horman
2018-12-13 18:27 ` [PATCH 05/15] pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 SEL_I2C1 field width Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-17 13:58   ` Simon Horman
2018-12-17 13:58     ` Simon Horman
2018-12-13 18:27 ` [PATCH 06/15] pinctrl: sh-pfc: r8a77995: Remove bogus SEL_PWM[0-3]_3 configurations Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-17 14:07   ` Simon Horman
2018-12-17 14:07     ` Simon Horman
2018-12-17 14:12     ` Geert Uytterhoeven
2018-12-17 14:12       ` Geert Uytterhoeven
2018-12-17 19:58       ` Simon Horman
2018-12-17 19:58         ` Simon Horman
2018-12-13 18:27 ` Geert Uytterhoeven [this message]
2018-12-13 18:27   ` [PATCH 07/15] pinctrl: sh-pfc: sh7264: Fix PFCR3 and PFCR0 register configuration Geert Uytterhoeven
2018-12-17 14:24   ` Simon Horman
2018-12-17 14:24     ` Simon Horman
2018-12-13 18:27 ` [PATCH 08/15] pinctrl: sh-pfc: sh7269: Add missing PCIOR0 field Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-17 14:29   ` Simon Horman
2018-12-17 14:29     ` Simon Horman
2018-12-13 18:27 ` [PATCH 09/15] pinctrl: sh-pfc: sh7734: Remove bogus IPSR10 value Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-17 14:31   ` Simon Horman
2018-12-17 14:31     ` Simon Horman
2018-12-13 18:27 ` [PATCH 10/15] pinctrl: sh-pfc: sh7734: Fix shifted values in IPSR10 Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-17 14:37   ` Simon Horman
2018-12-17 14:37     ` Simon Horman
2018-12-17 14:45     ` Geert Uytterhoeven
2018-12-17 14:45       ` Geert Uytterhoeven
2018-12-17 15:18       ` Simon Horman
2018-12-17 15:18         ` Simon Horman
2018-12-13 18:27 ` [PATCH 11/15] pinctrl: sh-pfc: Print actual field width for variable-width fields Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-17 14:46   ` Simon Horman
2018-12-17 14:46     ` Simon Horman
2018-12-17 14:58     ` Geert Uytterhoeven
2018-12-17 14:58       ` Geert Uytterhoeven
2018-12-17 15:17       ` Simon Horman
2018-12-17 15:17         ` Simon Horman
2018-12-13 18:27 ` [PATCH 12/15] pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-17 14:47   ` Simon Horman
2018-12-17 14:47     ` Simon Horman
2018-12-13 18:27 ` [PATCH 13/15] [RFC] pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-13 18:27 ` [PATCH 14/15] [RFC] pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven
2018-12-13 18:27 ` [PATCH 15/15] [RFC] pinctrl: sh-pfc: Validate pinmux tables at runtime when debugging Geert Uytterhoeven
2018-12-13 18:27   ` Geert Uytterhoeven

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