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From: Julien Grall <julien.grall@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: tokamoto@jp.fujitsu.com, Anton.Kirilov@arm.com,
	catalin.marinas@arm.com, will.deacon@arm.com, oleg@redhat.com,
	Julien Grall <julien.grall@arm.com>,
	alex.bennee@linaro.org, Dave.Martin@arm.com, Daniel.Kiss@arm.com
Subject: [RFC PATCH 5/8] arm64/sve: Implement helper to flush SVE registers
Date: Fri, 18 Jan 2019 16:46:07 +0000	[thread overview]
Message-ID: <20190118164610.8123-6-julien.grall@arm.com> (raw)
In-Reply-To: <20190118164610.8123-1-julien.grall@arm.com>

Introduce a new helper that will zero all SVE registers but the first
128-bits of each vector.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 arch/arm64/include/asm/fpsimd.h       |  3 +++
 arch/arm64/include/asm/fpsimdmacros.h | 19 +++++++++++++++++++
 arch/arm64/kernel/entry-fpsimd.S      |  7 +++++++
 3 files changed, 29 insertions(+)

diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index dd1ad3950ef5..fa2439205c35 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -79,6 +79,9 @@ static inline void *sve_pffr(struct thread_struct *thread)
 extern void sve_save_state(void *state, u32 *pfpsr);
 extern void sve_load_state(void const *state, u32 const *pfpsr,
 			   unsigned long vq_minus_1);
+
+extern void sve_flush_live(void);
+
 extern unsigned int sve_get_vl(void);
 
 struct arm64_cpu_capabilities;
diff --git a/arch/arm64/include/asm/fpsimdmacros.h b/arch/arm64/include/asm/fpsimdmacros.h
index 5e291d9c1ba0..a41ab337bf42 100644
--- a/arch/arm64/include/asm/fpsimdmacros.h
+++ b/arch/arm64/include/asm/fpsimdmacros.h
@@ -175,6 +175,13 @@
 		| ((\np) << 5)
 .endm
 
+/* PFALSE P\np.B */
+.macro _sve_pfalse np
+	_sve_check_preg \np
+	.inst	0x2518e400			\
+		| (\np)
+.endm
+
 .macro __for from:req, to:req
 	.if (\from) == (\to)
 		_for__body %\from
@@ -209,6 +216,18 @@
 921:
 .endm
 
+/* Preserve the first 128-bits of Znz and zero the rest. */
+.macro _sve_flush_z nz
+	_sve_check_zreg \nz
+	mov	v\nz\().16b, v\nz\().16b
+.endm
+
+.macro sve_flush
+ _for n, 0, 31, _sve_flush_z	\n
+ _for n, 0, 15, _sve_pfalse	\n
+		_sve_wrffr	0
+.endm
+
 .macro sve_save nxbase, xpfpsr, nxtmp
  _for n, 0, 31,	_sve_str_v	\n, \nxbase, \n - 34
  _for n, 0, 15,	_sve_str_p	\n, \nxbase, \n - 16
diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S
index 12d4958e6429..17121a51c41f 100644
--- a/arch/arm64/kernel/entry-fpsimd.S
+++ b/arch/arm64/kernel/entry-fpsimd.S
@@ -57,4 +57,11 @@ ENTRY(sve_get_vl)
 	_sve_rdvl	0, 1
 	ret
 ENDPROC(sve_get_vl)
+
+/* Zero all SVE registers but the first 128-bits of each vector */
+ENTRY(sve_flush_live)
+	sve_flush
+	ret
+ENDPROC(sve_flush_live)
+
 #endif /* CONFIG_ARM64_SVE */
-- 
2.11.0


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  parent reply	other threads:[~2019-01-18 16:48 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-18 16:46 [RFC PATCH 0/8] arm64/sve: First steps towards optimizing syscalls Julien Grall
2019-01-18 16:46 ` [RFC PATCH 1/8] arm64/fpsimd: Update documentation of do_sve_acc Julien Grall
2019-01-21 12:13   ` Mark Rutland
2019-01-22 16:03     ` Julien Grall
2019-01-18 16:46 ` [RFC PATCH 2/8] arm64/signal: Update the comment in preserve_sve_context Julien Grall
2019-01-21 12:17   ` Mark Rutland
2019-01-18 16:46 ` [RFC PATCH 3/8] arm64/fpsimdmacros: Allow the macro "for" to be used in more cases Julien Grall
2019-01-18 16:46 ` [RFC PATCH 4/8] arm64/fpsimdmacros: Introduce a macro to update ZCR_EL1.LEN Julien Grall
2019-01-18 16:46 ` Julien Grall [this message]
2019-01-18 16:46 ` [RFC PATCH 6/8] arm64/sve: Implement helper to load SVE registers from FPSIMD state Julien Grall
2019-01-18 16:46 ` [RFC PATCH 7/8] arm64/sve: Don't disable SVE on syscalls return Julien Grall
2019-01-18 16:46 ` [RFC PATCH 8/8] arm64/sve: Rework SVE trap access to use TIF_SVE_NEEDS_FLUSH Julien Grall

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