From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [PATCH 00/12] drm/i915: YCbCr output fixes and prep work for YCbCr 4:4:4 output
Date: Thu, 18 Jul 2019 17:50:41 +0300 [thread overview]
Message-ID: <20190718145053.25808-1-ville.syrjala@linux.intel.com> (raw)
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
I was playing around with YCbCr 4:4:4 output and noticed several
things wrong in our code. So I fixed it all and tossed in the
prep work for YCbCr 4:4:4 output on ilk+.
Ville Syrjälä (12):
drm/dp: Add definitons for MSA MISC bits
drm/i915: Fix HSW+ DP MSA YCbCr colorspace indication
drm/i915: Fix AVI infoframe quantization range for YCbCr output
drm/i915: Extract intel_hdmi_limited_color_range()
drm/i915: Never set limited_color_range=true for YCbCr output
drm/i915: Switch to using DP_MSA_MISC_* defines
drm/i915: Don't look at unrelated PIPECONF bits for interlaced readout
drm/i915: Simplify intel_get_crtc_ycbcr_config()
drm/i915: Add PIPECONF YCbCr 4:4:4 programming for HSW
drm/i915: Document ILK+ pipe csc matrix better
drm/i915: Set up ILK/SNB csc unit properly for YCbCr output
drm/i915: Add PIPECONF YCbCr 4:4:4 programming for ILK-IVB
drivers/gpu/drm/i915/display/intel_color.c | 51 ++++++--
drivers/gpu/drm/i915/display/intel_ddi.c | 28 +++--
drivers/gpu/drm/i915/display/intel_display.c | 120 ++++++++++++-------
drivers/gpu/drm/i915/display/intel_dp.c | 10 ++
drivers/gpu/drm/i915/display/intel_hdmi.c | 61 +++++++---
drivers/gpu/drm/i915/i915_reg.h | 31 ++---
include/drm/drm_dp_helper.h | 42 +++++++
7 files changed, 247 insertions(+), 96 deletions(-)
--
2.21.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next reply other threads:[~2019-07-18 14:50 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-18 14:50 Ville Syrjala [this message]
2019-07-18 14:50 ` [PATCH 01/12] drm/dp: Add definitons for MSA MISC bits Ville Syrjala
2019-09-18 18:55 ` [Intel-gfx] " Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 02/12] drm/i915: Fix HSW+ DP MSA YCbCr colorspace indication Ville Syrjala
2019-09-18 18:59 ` Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 03/12] drm/i915: Fix AVI infoframe quantization range for YCbCr output Ville Syrjala
2019-09-20 12:56 ` Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 04/12] drm/i915: Extract intel_hdmi_limited_color_range() Ville Syrjala
2019-09-18 19:00 ` Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 05/12] drm/i915: Never set limited_color_range=true for YCbCr output Ville Syrjala
2019-07-18 16:45 ` [PATCH v2 " Ville Syrjala
2019-09-18 19:01 ` [Intel-gfx] " Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 06/12] drm/i915: Switch to using DP_MSA_MISC_* defines Ville Syrjala
2019-09-18 19:01 ` Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 07/12] drm/i915: Don't look at unrelated PIPECONF bits for interlaced readout Ville Syrjala
2019-09-18 19:02 ` [Intel-gfx] " Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 08/12] drm/i915: Simplify intel_get_crtc_ycbcr_config() Ville Syrjala
2019-09-18 19:02 ` Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 09/12] drm/i915: Add PIPECONF YCbCr 4:4:4 programming for HSW Ville Syrjala
2019-09-18 19:03 ` Mun, Gwan-gyeong
2019-09-20 12:20 ` [Intel-gfx] " Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 10/12] drm/i915: Document ILK+ pipe csc matrix better Ville Syrjala
2019-09-20 14:24 ` [Intel-gfx] " Mun, Gwan-gyeong
2019-09-20 14:29 ` Ville Syrjälä
2019-07-18 14:50 ` [PATCH 11/12] drm/i915: Set up ILK/SNB csc unit properly for YCbCr output Ville Syrjala
2019-09-20 12:19 ` [Intel-gfx] " Mun, Gwan-gyeong
2019-07-18 14:50 ` [PATCH 12/12] drm/i915: Add PIPECONF YCbCr 4:4:4 programming for ILK-IVB Ville Syrjala
2019-09-18 19:05 ` Mun, Gwan-gyeong
2019-09-20 12:21 ` [Intel-gfx] " Mun, Gwan-gyeong
2019-07-18 15:33 ` ✗ Fi.CI.BAT: failure for drm/i915: YCbCr output fixes and prep work for YCbCr 4:4:4 output Patchwork
2019-07-18 17:21 ` ✓ Fi.CI.BAT: success for drm/i915: YCbCr output fixes and prep work for YCbCr 4:4:4 output (rev2) Patchwork
2019-07-18 20:11 ` ✓ Fi.CI.IGT: " Patchwork
2019-09-20 18:48 ` [PATCH 00/12] drm/i915: YCbCr output fixes and prep work for YCbCr 4:4:4 output Ville Syrjälä
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190718145053.25808-1-ville.syrjala@linux.intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.