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From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [PATCH v3 0/9] DC3CO Support for TGL.
Date: Tue, 30 Jul 2019 19:20:15 +0530	[thread overview]
Message-ID: <20190730135024.31765-1-anshuman.gupta@intel.com> (raw)

This update is a rebased and has addressed patch style review comment
from Jani Nikula.

one patch of this series "tgl-DC3CO-PSR2-helper"
will require rebase after https://patchwork.freedesktop.org/series/62416/
series will merged to drm-tip.
TGL supports DC3CO only on PipeA in LPSP mpde, so DC3CO doesn't depends
on TGL PSR "Transcoder B" feature.

B.Specs:49196
DC3CO requirements:
*Audio codec idle and disabled.
*External displays disabled.
 WD transcoders and DP/HDMI transcoders must be disabled.
*Backlight cannot be driven from the display utility pin.
 It can be driven from the south display.
*This feature should be enabled only in Display Video playback on eDP.
*DC5 and DC6 not allowed when this feature is enabled.
*PSR2 deep sleep disabled (PSR2_CTL Idle Frames = 0000b)
*Disable DC3co before mode set, or other Aux, PLL, and DBUF programming,
 and do not re-enable until after that programming is completed.
*DC3co must not be enabled until after PSR2 is enabled.
*DC3co must be disabled before PSR2 is disabled.

Anshuman Gupta (9):
  drm/i915/tgl: Add DC3CO required register and bits
  drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
  drm/i915/tgl: Add power well to enable DC3CO state
  drm/i915/tgl: mutual exclusive handling for DC3CO and DC5/6
  drm/i915/tgl: Add helper function to prefer dc3co over dc5
  drm/i915/tgl: Add VIDEO power domain
  drm/i915/tgl: DC3CO PSR2 helper
  drm/i915/tgl: switch between dc3co and dc5 based on display idleness
  drm/i915/tgl: Add DC3CO counter in i915_dmc_info

 drivers/gpu/drm/i915/display/intel_display.c  |   9 +
 .../drm/i915/display/intel_display_power.c    | 264 +++++++++++++++++-
 .../drm/i915/display/intel_display_power.h    |  11 +
 drivers/gpu/drm/i915/display/intel_psr.c      |  44 +++
 drivers/gpu/drm/i915/display/intel_psr.h      |   2 +
 drivers/gpu/drm/i915/i915_debugfs.c           |   9 +-
 drivers/gpu/drm/i915/i915_drv.h               |   8 +
 drivers/gpu/drm/i915/i915_params.c            |   3 +-
 drivers/gpu/drm/i915/i915_reg.h               |  11 +
 drivers/gpu/drm/i915/intel_pm.c               |   2 +-
 drivers/gpu/drm/i915/intel_pm.h               |   2 +
 11 files changed, 359 insertions(+), 6 deletions(-)

-- 
2.21.0

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             reply	other threads:[~2019-07-30 13:54 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-30 13:50 Anshuman Gupta [this message]
2019-07-30 13:50 ` [PATCH v3 1/9] drm/i915/tgl: Add DC3CO required register and bits Anshuman Gupta
2019-08-01  4:23   ` Animesh Manna
2019-07-30 13:50 ` [PATCH v3 2/9] drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask Anshuman Gupta
2019-08-01  4:35   ` Animesh Manna
2019-07-30 13:50 ` [PATCH v3 3/9] drm/i915/tgl: Add power well to enable DC3CO state Anshuman Gupta
2019-07-30 13:50 ` [PATCH v3 4/9] drm/i915/tgl: mutual exclusive handling for DC3CO and DC5/6 Anshuman Gupta
2019-07-30 13:50 ` [PATCH v3 5/9] drm/i915/tgl: Add helper function to prefer dc3co over dc5 Anshuman Gupta
2019-07-30 13:50 ` [PATCH v3 6/9] drm/i915/tgl: Add VIDEO power domain Anshuman Gupta
2019-07-30 13:50 ` [PATCH v3 7/9] drm/i915/tgl: DC3CO PSR2 helper Anshuman Gupta
2019-07-31  7:11   ` kbuild test robot
2019-07-30 13:50 ` [PATCH v3 8/9] drm/i915/tgl: switch between dc3co and dc5 based on display idleness Anshuman Gupta
2019-07-30 13:50 ` [PATCH v3 9/9] drm/i915/tgl: Add DC3CO counter in i915_dmc_info Anshuman Gupta
2019-07-30 14:23 ` ✗ Fi.CI.SPARSE: warning for DC3CO Support for TGL Patchwork
2019-07-30 14:41 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-31  0:37 ` ✓ Fi.CI.IGT: " Patchwork

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