From: Palmer Dabbelt <palmer@sifive.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Alistair Francis <alistair.francis@wdc.com>,
Palmer Dabbelt <palmer@sifive.com>,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
Guenter Roeck <linux@roeck-us.net>
Subject: [Qemu-devel] [PULL 03/48] riscv: sifive_u: Fix clock-names property for ethernet node
Date: Wed, 18 Sep 2019 07:55:55 -0700 [thread overview]
Message-ID: <20190918145640.17349-4-palmer@sifive.com> (raw)
In-Reply-To: <20190918145640.17349-1-palmer@sifive.com>
From: Guenter Roeck <linux@roeck-us.net>
The correct property name is clock-names, not clocks-names.
Without this patch, the Ethernet driver fails to instantiate with
the following error.
macb 100900fc.ethernet: failed to get macb_clk (-2)
macb: probe of 100900fc.ethernet failed with error -2
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
hw/riscv/sifive_u.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 8313f2605e..ae5a16e636 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -215,7 +215,7 @@ static void *create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ);
qemu_fdt_setprop_cells(fdt, nodename, "clocks",
ethclk_phandle, ethclk_phandle, ethclk_phandle);
- qemu_fdt_setprop(fdt, nodename, "clocks-names", ethclk_names,
+ qemu_fdt_setprop(fdt, nodename, "clock-names", ethclk_names,
sizeof(ethclk_names));
qemu_fdt_setprop_cells(fdt, nodename, "#address-cells", 1);
qemu_fdt_setprop_cells(fdt, nodename, "#size-cells", 0);
--
2.21.0
WARNING: multiple messages have this Message-ID (diff)
From: Palmer Dabbelt <palmer@sifive.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
Guenter Roeck <linux@roeck-us.net>,
Alistair Francis <alistair.francis@wdc.com>,
Palmer Dabbelt <palmer@sifive.com>
Subject: [Qemu-riscv] [PULL 03/48] riscv: sifive_u: Fix clock-names property for ethernet node
Date: Wed, 18 Sep 2019 07:55:55 -0700 [thread overview]
Message-ID: <20190918145640.17349-4-palmer@sifive.com> (raw)
In-Reply-To: <20190918145640.17349-1-palmer@sifive.com>
From: Guenter Roeck <linux@roeck-us.net>
The correct property name is clock-names, not clocks-names.
Without this patch, the Ethernet driver fails to instantiate with
the following error.
macb 100900fc.ethernet: failed to get macb_clk (-2)
macb: probe of 100900fc.ethernet failed with error -2
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
hw/riscv/sifive_u.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 8313f2605e..ae5a16e636 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -215,7 +215,7 @@ static void *create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ);
qemu_fdt_setprop_cells(fdt, nodename, "clocks",
ethclk_phandle, ethclk_phandle, ethclk_phandle);
- qemu_fdt_setprop(fdt, nodename, "clocks-names", ethclk_names,
+ qemu_fdt_setprop(fdt, nodename, "clock-names", ethclk_names,
sizeof(ethclk_names));
qemu_fdt_setprop_cells(fdt, nodename, "#address-cells", 1);
qemu_fdt_setprop_cells(fdt, nodename, "#size-cells", 0);
--
2.21.0
next prev parent reply other threads:[~2019-09-18 15:35 UTC|newest]
Thread overview: 104+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-18 14:55 [Qemu-devel] [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1, v3 Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-devel] [PULL 01/48] riscv: sifive_u: Add support for loading initrd Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-devel] [PULL 02/48] riscv: sivive_u: Add dummy serial clock and aliases entry for uart Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:55 ` Palmer Dabbelt [this message]
2019-09-18 14:55 ` [Qemu-riscv] [PULL 03/48] riscv: sifive_u: Fix clock-names property for ethernet node Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-devel] [PULL 04/48] target/riscv/pmp: Restrict priviledged PMP to system-mode emulation Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-devel] [PULL 05/48] target/riscv/pmp: Convert qemu_log_mask(LOG_TRACE) to trace events Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-devel] [PULL 06/48] riscv: plic: Remove unused interrupt functions Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-devel] [PULL 07/48] target/riscv: Create function to test if FP is enabled Palmer Dabbelt
2019-09-18 14:55 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 08/48] target/riscv: Update the Hypervisor CSRs to v0.4 Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 09/48] riscv: rv32: Root page table address can be larger than 32-bit Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 10/48] riscv: Add a helper routine for finding firmware Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 11/48] riscv: Resolve full path of the given bios image Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-24 10:17 ` Peter Maydell
2019-09-24 10:17 ` Peter Maydell
2019-10-02 21:38 ` Alistair Francis
2019-10-02 21:38 ` Alistair Francis
2019-09-18 14:56 ` [Qemu-devel] [PULL 12/48] riscv: hmp: Add a command to show virtual memory mappings Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 13/48] riscv: sifive_test: Add reset functionality Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 14/48] riscv: hw: Remove duplicated "hw/hw.h" inclusion Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 15/48] riscv: hw: Remove superfluous "linux, phandle" property Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 16/48] riscv: hw: Use qemu_fdt_setprop_cell() for property with only 1 cell Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 17/48] riscv: hw: Remove not needed PLIC properties in device tree Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 18/48] riscv: hw: Change create_fdt() to return void Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 19/48] riscv: hw: Change to use qemu_log_mask(LOG_GUEST_ERROR, ...) instead Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 20/48] riscv: hw: Remove the unnecessary include of target/riscv/cpu.h Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 21/48] riscv: roms: Remove executable attribute of opensbi images Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 22/48] riscv: sifive_u: Remove the unnecessary include of prci header Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 23/48] riscv: sifive: Rename sifive_prci.{c, h} to sifive_e_prci.{c, h} Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 24/48] riscv: sifive_e: prci: Fix a typo of hfxosccfg register programming Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 25/48] riscv: sifive_e: prci: Update the PRCI register block size Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 26/48] riscv: sifive_e: Drop sifive_mmio_emulate() Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 27/48] riscv: Add a sifive_cpu.h to include both E and U cpu type defines Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 28/48] riscv: hart: Extract hart realize to a separate routine Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 29/48] riscv: hart: Add a "hartid-base" property to RISC-V hart array Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 30/48] riscv: sifive_u: Set the minimum number of cpus to 2 Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 31/48] riscv: sifive_u: Update hart configuration to reflect the real FU540 SoC Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 32/48] riscv: sifive_u: Update PLIC hart topology configuration string Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 33/48] riscv: sifive: Implement PRCI model for FU540 Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 34/48] riscv: sifive_u: Generate hfclk and rtcclk nodes Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 35/48] riscv: sifive_u: Add PRCI block to the SoC Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 36/48] riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 37/48] riscv: sifive_u: Update UART base addresses and IRQs Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 38/48] riscv: sifive_u: Change UART node name in device tree Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 39/48] riscv: roms: Update default bios for sifive_u machine Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 40/48] riscv: sifive: Implement a model for SiFive FU540 OTP Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 41/48] riscv: sifive_u: Instantiate OTP memory with a serial number Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 42/48] riscv: sifive_u: Fix broken GEM support Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 43/48] riscv: sifive_u: Remove handcrafted clock nodes for UART and ethernet Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 44/48] riscv: sifive_u: Update model and compatible strings in device tree Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 45/48] target/riscv: Use both register name and ABI name Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 46/48] target/riscv: Fix mstatus dirty mask Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 47/48] target/riscv: Use TB_FLAGS_MSTATUS_FS for floating point Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-devel] [PULL 48/48] gdbstub: riscv: fix the fflags registers Palmer Dabbelt
2019-09-18 14:56 ` [Qemu-riscv] " Palmer Dabbelt
2019-09-19 12:26 ` [Qemu-devel] [PULL] RISC-V Patches for the 4.2 Soft Freeze, Part 1, v3 Peter Maydell
2019-09-19 12:26 ` [Qemu-riscv] " Peter Maydell
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