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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 4/5] drm/i915/display/icl+: Check if DMC is fused off
Date: Fri, 18 Oct 2019 17:41:23 -0700	[thread overview]
Message-ID: <20191019004124.371929-4-jose.souza@intel.com> (raw)
In-Reply-To: <20191019004124.371929-1-jose.souza@intel.com>

Check if DMC is fused off and handle it.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Martin Peres <martin.peres@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h          | 1 +
 drivers/gpu/drm/i915/intel_device_info.c | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 31375ddc2b3b..84fca4f3af5a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7660,6 +7660,7 @@ enum {
 #define SKL_DFSM_CDCLK_LIMIT_540		(1 << 23)
 #define SKL_DFSM_CDCLK_LIMIT_450		(2 << 23)
 #define SKL_DFSM_CDCLK_LIMIT_337_5		(3 << 23)
+#define ICL_DFSM_DMC_DISABLE			(1 << 23)
 #define SKL_DFSM_PIPE_A_DISABLE			(1 << 30)
 #define SKL_DFSM_PIPE_B_DISABLE			(1 << 21)
 #define SKL_DFSM_PIPE_C_DISABLE			(1 << 28)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index b6a9f527f8f9..97d962944e48 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -993,6 +993,9 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
 
 		if (dfsm & SKL_DFSM_DISPLAY_PM_DISABLE)
 			info->display.has_fbc = 0;
+
+		if (INTEL_GEN(dev_priv) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE))
+			info->display.has_csr = 0;
 	}
 
 	/* Initialize slice/subslice/EU info */
-- 
2.23.0

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  parent reply	other threads:[~2019-10-19  0:41 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-19  0:41 [PATCH 1/5] drm/i915/display: Handle fused off display correctly José Roberto de Souza
2019-10-19  0:41 ` [PATCH 2/5] drm/i915/display: Handle fused off HDCP José Roberto de Souza
2019-10-23 13:37   ` Ramalingam C
2019-10-23 13:37     ` [Intel-gfx] " Ramalingam C
2019-10-23 18:54     ` Souza, Jose
2019-10-23 18:54       ` [Intel-gfx] " Souza, Jose
2019-10-24  6:57       ` Ramalingam C
2019-10-24  6:57         ` [Intel-gfx] " Ramalingam C
2019-10-19  0:41 ` [PATCH 3/5] drm/i915/display: Check if FBC is fused off José Roberto de Souza
2019-10-23 13:50   ` Ramalingam C
2019-10-23 13:50     ` [Intel-gfx] " Ramalingam C
2019-10-19  0:41 ` José Roberto de Souza [this message]
2019-10-24  7:06   ` [PATCH 4/5] drm/i915/display/icl+: Check if DMC " Ramalingam C
2019-10-24  7:06     ` [Intel-gfx] " Ramalingam C
2019-10-19  0:41 ` [PATCH 5/5] drm/i915/display/cnl+: Handle fused off DSC José Roberto de Souza
2019-10-23 18:37   ` Manasi Navare
2019-10-23 18:37     ` [Intel-gfx] " Manasi Navare
2019-10-24  6:55   ` Ramalingam C
2019-10-24  6:55     ` [Intel-gfx] " Ramalingam C
2019-10-19  1:34 ` ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/display: Handle fused off display correctly Patchwork
2019-10-19  4:15 ` ✓ Fi.CI.IGT: " Patchwork
2019-10-23 12:15 ` [PATCH 1/5] " Jani Nikula
2019-10-23 12:15   ` [Intel-gfx] " Jani Nikula
2019-10-23 13:18 ` Ramalingam C
2019-10-23 13:18   ` [Intel-gfx] " Ramalingam C
2019-10-23 13:23   ` Jani Nikula
2019-10-23 13:23     ` [Intel-gfx] " Jani Nikula
2019-10-23 19:13     ` Souza, Jose
2019-10-23 19:13       ` [Intel-gfx] " Souza, Jose
2019-10-23 13:43 ` Ramalingam C
2019-10-23 13:43   ` [Intel-gfx] " Ramalingam C
2019-10-26  0:13 [PATCH 1/5] drm/i915: Add two spaces before the SKL_DFSM registers José Roberto de Souza
2019-10-26  0:13 ` [PATCH 4/5] drm/i915/display/icl+: Check if DMC is fused off José Roberto de Souza

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