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From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Manasi Navare <manasi.d.navare@intel.com>
Subject: [PATCH] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
Date: Wed, 23 Oct 2019 17:00:41 -0700	[thread overview]
Message-ID: <20191024000041.7391-1-manasi.d.navare@intel.com> (raw)

Adaptive Sync is a VESA feature so add a DRM core helper to parse
the EDID's detailed descritors to obtain the adaptive sync monitor range.
Store this info as part fo drm_display_info so it can be used
across all drivers.
This part of the code is stripped out of amdgpu's function
amdgpu_dm_update_freesync_caps() to make it generic and be used
across all DRM drivers

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/drm_edid.c  | 49 +++++++++++++++++++++++++++++++++++++
 include/drm/drm_connector.h | 25 +++++++++++++++++++
 include/drm/drm_edid.h      |  2 ++
 3 files changed, 76 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 474ac04d5600..97dd1200773e 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4707,6 +4707,52 @@ static void drm_parse_cea_ext(struct drm_connector *connector,
 	}
 }
 
+void drm_get_adaptive_sync_limits(struct drm_connector *connector,
+				  const struct edid *edid)
+{
+	struct drm_display_info *info = &connector->display_info;
+	const struct detailed_timing *timing;
+	const struct detailed_non_pixel *data;
+	const struct detailed_data_monitor_range *range;
+	int i;
+
+	/*
+	 * Restrict Adaptive Sync only for dp and edp
+	 */
+	if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort &&
+	    connector->connector_type != DRM_MODE_CONNECTOR_eDP)
+		return;
+
+	if (edid->version <= 1 && !(edid->version == 1 && edid->revision > 1))
+		return;
+
+	for (i = 0; i < 4; i++) {
+		timing  = &edid->detailed_timings[i];
+		data    = &timing->data.other_data;
+		range   = &data->data.range;
+		/*
+		 * Check if monitor has continuous frequency mode
+		 */
+		if (data->type != EDID_DETAIL_MONITOR_RANGE)
+			continue;
+		/*
+		 * Check for flag range limits only. If flag == 1 then
+		 * no additional timing information provided.
+		 * Default GTF, GTF Secondary curve and CVT are not
+		 * supported
+		 */
+		if (range->flags != 1)
+			continue;
+
+		info->adaptive_sync.min_vfreq = range->min_vfreq;
+		info->adaptive_sync.max_vfreq = range->max_vfreq;
+		info->adaptive_sync.pixel_clock_mhz =
+			range->pixel_clock_mhz * 10;
+		break;
+	}
+}
+EXPORT_SYMBOL(drm_get_adaptive_sync_limits);
+
 /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset
  * all of the values which would have been set from EDID
  */
@@ -4728,6 +4774,7 @@ drm_reset_display_info(struct drm_connector *connector)
 	memset(&info->hdmi, 0, sizeof(info->hdmi));
 
 	info->non_desktop = 0;
+	memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync));
 }
 
 u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid)
@@ -4743,6 +4790,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
 
 	info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP);
 
+	drm_get_adaptive_sync_limits(connector, edid);
+
 	DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
 
 	if (edid->revision < 3)
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 5f8c3389d46f..a27a84270d8d 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -254,6 +254,26 @@ enum drm_panel_orientation {
 	DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
 };
 
+/**
+ * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for
+ * &drm_display_info
+ *
+ * This struct is used to store a Panel's Adaptive Sync capabilities
+ * as parsed from EDID's detailed monitor range descriptor block.
+ *
+ * @min_vfreq: This is the min supported refresh rate in Hz from
+ *             EDID's detailed monitor range.
+ * @max_vfreq: This is the max supported refresh rate in Hz from
+ *             EDID's detailed monitor range
+ * @pixel_clock_mhz: This is the dotclock in MHz from
+ *                   EDID's detailed monitor range
+ */
+struct drm_adaptive_sync_info {
+	int min_vfreq;
+	int max_vfreq;
+	int pixel_clock_mhz;
+};
+
 /*
  * This is a consolidated colorimetry list supported by HDMI and
  * DP protocol standard. The respective connectors will register
@@ -465,6 +485,11 @@ struct drm_display_info {
 	 * @non_desktop: Non desktop display (HMD).
 	 */
 	bool non_desktop;
+
+	/**
+	 * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink
+	 */
+	struct drm_adaptive_sync_info adaptive_sync;
 };
 
 int drm_display_info_set_bus_formats(struct drm_display_info *info,
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index f0b03d401c27..b9a230aa3e69 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -503,4 +503,6 @@ void drm_edid_get_monitor_name(struct edid *edid, char *name,
 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
 					   int hsize, int vsize, int fresh,
 					   bool rb);
+void drm_get_adaptive_sync_limits(struct drm_connector *connector,
+				  const struct edid *edid);
 #endif /* __DRM_EDID_H__ */
-- 
2.19.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Harry Wentland <harry.wentland@amd.com>
Subject: [Intel-gfx] [PATCH] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
Date: Wed, 23 Oct 2019 17:00:41 -0700	[thread overview]
Message-ID: <20191024000041.7391-1-manasi.d.navare@intel.com> (raw)
Message-ID: <20191024000041.ugOt_juumtOFfkT-ecoT1xYiJ7hlUVVzHGicx0CTQGc@z> (raw)

Adaptive Sync is a VESA feature so add a DRM core helper to parse
the EDID's detailed descritors to obtain the adaptive sync monitor range.
Store this info as part fo drm_display_info so it can be used
across all drivers.
This part of the code is stripped out of amdgpu's function
amdgpu_dm_update_freesync_caps() to make it generic and be used
across all DRM drivers

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Clinton A Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/drm_edid.c  | 49 +++++++++++++++++++++++++++++++++++++
 include/drm/drm_connector.h | 25 +++++++++++++++++++
 include/drm/drm_edid.h      |  2 ++
 3 files changed, 76 insertions(+)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 474ac04d5600..97dd1200773e 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4707,6 +4707,52 @@ static void drm_parse_cea_ext(struct drm_connector *connector,
 	}
 }
 
+void drm_get_adaptive_sync_limits(struct drm_connector *connector,
+				  const struct edid *edid)
+{
+	struct drm_display_info *info = &connector->display_info;
+	const struct detailed_timing *timing;
+	const struct detailed_non_pixel *data;
+	const struct detailed_data_monitor_range *range;
+	int i;
+
+	/*
+	 * Restrict Adaptive Sync only for dp and edp
+	 */
+	if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort &&
+	    connector->connector_type != DRM_MODE_CONNECTOR_eDP)
+		return;
+
+	if (edid->version <= 1 && !(edid->version == 1 && edid->revision > 1))
+		return;
+
+	for (i = 0; i < 4; i++) {
+		timing  = &edid->detailed_timings[i];
+		data    = &timing->data.other_data;
+		range   = &data->data.range;
+		/*
+		 * Check if monitor has continuous frequency mode
+		 */
+		if (data->type != EDID_DETAIL_MONITOR_RANGE)
+			continue;
+		/*
+		 * Check for flag range limits only. If flag == 1 then
+		 * no additional timing information provided.
+		 * Default GTF, GTF Secondary curve and CVT are not
+		 * supported
+		 */
+		if (range->flags != 1)
+			continue;
+
+		info->adaptive_sync.min_vfreq = range->min_vfreq;
+		info->adaptive_sync.max_vfreq = range->max_vfreq;
+		info->adaptive_sync.pixel_clock_mhz =
+			range->pixel_clock_mhz * 10;
+		break;
+	}
+}
+EXPORT_SYMBOL(drm_get_adaptive_sync_limits);
+
 /* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset
  * all of the values which would have been set from EDID
  */
@@ -4728,6 +4774,7 @@ drm_reset_display_info(struct drm_connector *connector)
 	memset(&info->hdmi, 0, sizeof(info->hdmi));
 
 	info->non_desktop = 0;
+	memset(&info->adaptive_sync, 0, sizeof(info->adaptive_sync));
 }
 
 u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid)
@@ -4743,6 +4790,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
 
 	info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP);
 
+	drm_get_adaptive_sync_limits(connector, edid);
+
 	DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
 
 	if (edid->revision < 3)
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 5f8c3389d46f..a27a84270d8d 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -254,6 +254,26 @@ enum drm_panel_orientation {
 	DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
 };
 
+/**
+ * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for
+ * &drm_display_info
+ *
+ * This struct is used to store a Panel's Adaptive Sync capabilities
+ * as parsed from EDID's detailed monitor range descriptor block.
+ *
+ * @min_vfreq: This is the min supported refresh rate in Hz from
+ *             EDID's detailed monitor range.
+ * @max_vfreq: This is the max supported refresh rate in Hz from
+ *             EDID's detailed monitor range
+ * @pixel_clock_mhz: This is the dotclock in MHz from
+ *                   EDID's detailed monitor range
+ */
+struct drm_adaptive_sync_info {
+	int min_vfreq;
+	int max_vfreq;
+	int pixel_clock_mhz;
+};
+
 /*
  * This is a consolidated colorimetry list supported by HDMI and
  * DP protocol standard. The respective connectors will register
@@ -465,6 +485,11 @@ struct drm_display_info {
 	 * @non_desktop: Non desktop display (HMD).
 	 */
 	bool non_desktop;
+
+	/**
+	 * @adaptive_sync: Adaptive Sync capabilities of the DP/eDP sink
+	 */
+	struct drm_adaptive_sync_info adaptive_sync;
 };
 
 int drm_display_info_set_bus_formats(struct drm_display_info *info,
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index f0b03d401c27..b9a230aa3e69 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -503,4 +503,6 @@ void drm_edid_get_monitor_name(struct edid *edid, char *name,
 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
 					   int hsize, int vsize, int fresh,
 					   bool rb);
+void drm_get_adaptive_sync_limits(struct drm_connector *connector,
+				  const struct edid *edid);
 #endif /* __DRM_EDID_H__ */
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

             reply	other threads:[~2019-10-24  0:00 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-24  0:00 Manasi Navare [this message]
2019-10-24  0:00 ` [Intel-gfx] [PATCH] drm/dp: Add function to parse EDID descriptors for adaptive sync limits Manasi Navare
2019-10-24  3:59 ` ✗ Fi.CI.BAT: failure for " Patchwork
2019-10-24  3:59   ` [Intel-gfx] " Patchwork
2019-10-24 10:31 ` [PATCH] " Thierry Reding
2019-10-24 10:31   ` [Intel-gfx] " Thierry Reding
2019-10-24 10:31   ` Thierry Reding
2019-10-24 11:34   ` Ville Syrjälä
2019-10-24 11:34     ` [Intel-gfx] " Ville Syrjälä
2019-10-24 11:34     ` Ville Syrjälä
2019-10-24 13:54     ` Thierry Reding
2019-10-24 13:54       ` [Intel-gfx] " Thierry Reding
2019-10-24 13:54       ` Thierry Reding
2019-10-24 14:20       ` Ville Syrjälä
2019-10-24 14:20         ` [Intel-gfx] " Ville Syrjälä
2019-10-24 14:20         ` Ville Syrjälä
2019-10-24 14:40         ` Thierry Reding
2019-10-24 14:40           ` [Intel-gfx] " Thierry Reding
2019-10-24 14:40           ` Thierry Reding
2019-10-24 17:31         ` Manasi Navare
2019-10-24 17:31           ` Manasi Navare
2019-10-24 17:17   ` Manasi Navare
2019-10-24 17:17     ` Manasi Navare
2019-10-24 15:06 ` Harry Wentland
2019-10-24 15:06   ` [Intel-gfx] " Harry Wentland
2019-10-25 20:02   ` Manasi Navare
2019-10-25 20:02     ` [Intel-gfx] " Manasi Navare
2019-10-25 20:02     ` Manasi Navare

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