From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> To: intel-gfx@lists.freedesktop.org Subject: [CI 04/12] drm/i915: Perform manual conversions for crtc uapi/hw split, v2. Date: Tue, 29 Oct 2019 08:22:21 +0100 [thread overview] Message-ID: <20191029072229.27092-4-maarten.lankhorst@linux.intel.com> (raw) In-Reply-To: <20191029072229.27092-1-maarten.lankhorst@linux.intel.com> intel_get_load_detect_pipe() needs to set uapi active, uapi enable is set by the call to drm_atomic_set_mode_for_crtc(), so we can remove it. intel_pipe_config_compare() needs to look at hw state, but I didn't change spatch to look at it. It's easy enough to do manually. intel_atomic_check() definitely needs to check for uapi enable, otherwise intel_modeset_pipe_config cannot copy uapi state to hw. Changes since v1: - Actually set uapi.active in get_load_detect_pipe(). Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 42 ++++++++++---------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index d0df9b24a969..4baa0226abff 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -11433,7 +11433,7 @@ int intel_get_load_detect_pipe(struct drm_connector *connector, goto fail; } - crtc_state->base.active = crtc_state->base.enable = true; + crtc_state->uapi.active = true; if (!mode) mode = &load_detect_mode; @@ -13080,19 +13080,19 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_X(output_types); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_start); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_end); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_start); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_end); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end); PIPE_CONF_CHECK_I(pixel_multiplier); PIPE_CONF_CHECK_I(output_format); @@ -13109,17 +13109,17 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio); - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags, + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, DRM_MODE_FLAG_INTERLACE); if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) { - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags, + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, DRM_MODE_FLAG_PHSYNC); - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags, + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, DRM_MODE_FLAG_NHSYNC); - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags, + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, DRM_MODE_FLAG_PVSYNC); - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags, + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, DRM_MODE_FLAG_NVSYNC); } @@ -13158,7 +13158,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, bp_gamma = intel_color_get_gamma_bit_precision(pipe_config); if (bp_gamma) - PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, base.gamma_lut, bp_gamma); + PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, hw.gamma_lut, bp_gamma); } @@ -13203,7 +13203,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, if (IS_G4X(dev_priv) || INTEL_GEN(dev_priv) >= 5) PIPE_CONF_CHECK_I(pipe_bpp); - PIPE_CONF_CHECK_CLOCK_FUZZY(base.adjusted_mode.crtc_clock); + PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock); PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock); PIPE_CONF_CHECK_I(min_voltage_level); @@ -14010,7 +14010,7 @@ static int intel_atomic_check(struct drm_device *dev, if (!needs_modeset(new_crtc_state)) continue; - if (!new_crtc_state->base.enable) { + if (!new_crtc_state->uapi.enable) { any_ms = true; continue; } -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [CI 04/12] drm/i915: Perform manual conversions for crtc uapi/hw split, v2. Date: Tue, 29 Oct 2019 08:22:21 +0100 [thread overview] Message-ID: <20191029072229.27092-4-maarten.lankhorst@linux.intel.com> (raw) Message-ID: <20191029072221.XalAfyxxXzmsahVJo1UKB4htx_h8lNQK5Gqk_eLB9M8@z> (raw) In-Reply-To: <20191029072229.27092-1-maarten.lankhorst@linux.intel.com> intel_get_load_detect_pipe() needs to set uapi active, uapi enable is set by the call to drm_atomic_set_mode_for_crtc(), so we can remove it. intel_pipe_config_compare() needs to look at hw state, but I didn't change spatch to look at it. It's easy enough to do manually. intel_atomic_check() definitely needs to check for uapi enable, otherwise intel_modeset_pipe_config cannot copy uapi state to hw. Changes since v1: - Actually set uapi.active in get_load_detect_pipe(). Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 42 ++++++++++---------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index d0df9b24a969..4baa0226abff 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -11433,7 +11433,7 @@ int intel_get_load_detect_pipe(struct drm_connector *connector, goto fail; } - crtc_state->base.active = crtc_state->base.enable = true; + crtc_state->uapi.active = true; if (!mode) mode = &load_detect_mode; @@ -13080,19 +13080,19 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_X(output_types); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_start); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_end); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_start); - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_end); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start); + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end); PIPE_CONF_CHECK_I(pixel_multiplier); PIPE_CONF_CHECK_I(output_format); @@ -13109,17 +13109,17 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio); - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags, + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, DRM_MODE_FLAG_INTERLACE); if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) { - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags, + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, DRM_MODE_FLAG_PHSYNC); - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags, + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, DRM_MODE_FLAG_NHSYNC); - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags, + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, DRM_MODE_FLAG_PVSYNC); - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags, + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags, DRM_MODE_FLAG_NVSYNC); } @@ -13158,7 +13158,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, bp_gamma = intel_color_get_gamma_bit_precision(pipe_config); if (bp_gamma) - PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, base.gamma_lut, bp_gamma); + PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, hw.gamma_lut, bp_gamma); } @@ -13203,7 +13203,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, if (IS_G4X(dev_priv) || INTEL_GEN(dev_priv) >= 5) PIPE_CONF_CHECK_I(pipe_bpp); - PIPE_CONF_CHECK_CLOCK_FUZZY(base.adjusted_mode.crtc_clock); + PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock); PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock); PIPE_CONF_CHECK_I(min_voltage_level); @@ -14010,7 +14010,7 @@ static int intel_atomic_check(struct drm_device *dev, if (!needs_modeset(new_crtc_state)) continue; - if (!new_crtc_state->base.enable) { + if (!new_crtc_state->uapi.enable) { any_ms = true; continue; } -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-10-29 7:22 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-29 7:22 [CI 01/12] drm/i915: Introduce intel_atomic_get_plane_state_after_check(), v2 Maarten Lankhorst 2019-10-29 7:22 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 7:22 ` [CI 02/12] drm/i915: Handle a few more cases for crtc hw/uapi split, v3 Maarten Lankhorst 2019-10-29 7:22 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 7:22 ` [CI 03/12] drm/i915: Add aliases for uapi and hw to crtc_state Maarten Lankhorst 2019-10-29 7:22 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 7:22 ` Maarten Lankhorst [this message] 2019-10-29 7:22 ` [Intel-gfx] [CI 04/12] drm/i915: Perform manual conversions for crtc uapi/hw split, v2 Maarten Lankhorst 2019-10-29 13:23 ` Ville Syrjälä 2019-10-29 13:23 ` [Intel-gfx] " Ville Syrjälä 2019-10-30 10:12 ` Maarten Lankhorst 2019-10-30 10:12 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 7:22 ` [CI 05/12] drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw Maarten Lankhorst 2019-10-29 7:22 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 7:22 ` [CI 06/12] drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi Maarten Lankhorst 2019-10-29 7:22 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 7:22 ` [CI 07/12] drm/i915: Complete crtc hw/uapi split, v4 Maarten Lankhorst 2019-10-29 7:22 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 14:33 ` Ville Syrjälä 2019-10-29 14:33 ` [Intel-gfx] " Ville Syrjälä 2019-10-29 14:37 ` Ville Syrjälä 2019-10-29 14:37 ` [Intel-gfx] " Ville Syrjälä 2019-10-29 7:22 ` [CI 08/12] drm/i915: Add aliases for uapi and hw to plane_state Maarten Lankhorst 2019-10-29 7:22 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 7:22 ` [CI 09/12] drm/i915: Perform manual conversions for plane uapi/hw split Maarten Lankhorst 2019-10-29 7:22 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 7:22 ` [CI 10/12] drm/i915: Perform automated conversions for plane uapi/hw split, base -> hw Maarten Lankhorst 2019-10-29 7:22 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 15:35 ` Ville Syrjälä 2019-10-29 15:35 ` [Intel-gfx] " Ville Syrjälä 2019-10-29 7:22 ` [CI 11/12] drm/i915: Perform automated conversions for plane uapi/hw split, base -> uapi Maarten Lankhorst 2019-10-29 7:22 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 15:43 ` Ville Syrjälä 2019-10-29 15:43 ` [Intel-gfx] " Ville Syrjälä 2019-10-30 13:10 ` Maarten Lankhorst 2019-10-30 13:10 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 7:22 ` [CI 12/12] drm/i915: Complete plane hw and uapi split, v2 Maarten Lankhorst 2019-10-29 7:22 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 18:34 ` Ville Syrjälä 2019-10-29 18:34 ` [Intel-gfx] " Ville Syrjälä 2019-10-30 9:51 ` Maarten Lankhorst 2019-10-30 9:51 ` [Intel-gfx] " Maarten Lankhorst 2019-10-29 8:45 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/12] drm/i915: Introduce intel_atomic_get_plane_state_after_check(), v2 Patchwork 2019-10-29 8:45 ` [Intel-gfx] " Patchwork 2019-10-29 9:05 ` ✗ Fi.CI.BAT: failure " Patchwork 2019-10-29 9:05 ` [Intel-gfx] " Patchwork 2019-10-29 18:35 ` [CI 01/12] " Ville Syrjälä 2019-10-29 18:35 ` [Intel-gfx] " Ville Syrjälä 2019-10-30 9:17 ` Maarten Lankhorst 2019-10-30 9:17 ` [Intel-gfx] " Maarten Lankhorst 2019-10-30 13:37 ` Ville Syrjälä 2019-10-30 13:37 ` [Intel-gfx] " Ville Syrjälä
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