From: Dmitry Osipenko <digetx@gmail.com> To: Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Peter De Schrijver <pdeschrijver@nvidia.com>, Mikko Perttunen <mperttunen@nvidia.com>, Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org> Cc: linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org Subject: [PATCH v1 02/29] dt-bindings: memory: tegra20: emc: Document new interconnect property Date: Mon, 18 Nov 2019 23:02:20 +0300 [thread overview] Message-ID: <20191118200247.3567-3-digetx@gmail.com> (raw) In-Reply-To: <20191118200247.3567-1-digetx@gmail.com> External memory controller is interconnected with memory controller and with external memory. Document new interconnect property which designates external memory controller as interconnect provider. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- .../bindings/memory-controllers/nvidia,tegra20-emc.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt index add95367640b..7566d883f921 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt @@ -12,6 +12,9 @@ Properties: irrespective of ram-code configuration. - interrupts : Should contain EMC General interrupt. - clocks : Should contain EMC clock. +- #interconnect-cells : Should be 1. This cell represents external memory + interconnect. The assignments may be found in header file + <dt-bindings/interconnect/tegra-icc.h>. Child device nodes describe the memory settings for different configurations and clock rates. @@ -20,6 +23,7 @@ Example: memory-controller@7000f400 { #address-cells = < 1 >; #size-cells = < 0 >; + #interconnect-cells = < 1 >; compatible = "nvidia,tegra20-emc"; reg = <0x7000f4000 0x200>; interrupts = <0 78 0x04>; -- 2.23.0
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From: Dmitry Osipenko <digetx@gmail.com> To: Thierry Reding <thierry.reding@gmail.com>, Jonathan Hunter <jonathanh@nvidia.com>, Peter De Schrijver <pdeschrijver@nvidia.com>, Mikko Perttunen <mperttunen@nvidia.com>, Georgi Djakov <georgi.djakov@linaro.org>, Rob Herring <robh+dt@kernel.org> Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pm@vger.kernel.org Subject: [PATCH v1 02/29] dt-bindings: memory: tegra20: emc: Document new interconnect property Date: Mon, 18 Nov 2019 23:02:20 +0300 [thread overview] Message-ID: <20191118200247.3567-3-digetx@gmail.com> (raw) Message-ID: <20191118200220.sulv8igXaKrv44K5kX3wlS_KLEwwAEEOVXeicLzEdsI@z> (raw) In-Reply-To: <20191118200247.3567-1-digetx@gmail.com> External memory controller is interconnected with memory controller and with external memory. Document new interconnect property which designates external memory controller as interconnect provider. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- .../bindings/memory-controllers/nvidia,tegra20-emc.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt index add95367640b..7566d883f921 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt @@ -12,6 +12,9 @@ Properties: irrespective of ram-code configuration. - interrupts : Should contain EMC General interrupt. - clocks : Should contain EMC clock. +- #interconnect-cells : Should be 1. This cell represents external memory + interconnect. The assignments may be found in header file + <dt-bindings/interconnect/tegra-icc.h>. Child device nodes describe the memory settings for different configurations and clock rates. @@ -20,6 +23,7 @@ Example: memory-controller@7000f400 { #address-cells = < 1 >; #size-cells = < 0 >; + #interconnect-cells = < 1 >; compatible = "nvidia,tegra20-emc"; reg = <0x7000f4000 0x200>; interrupts = <0 78 0x04>; -- 2.23.0 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2019-11-18 20:02 UTC|newest] Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-18 20:02 [PATCH v1 00/29] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 01/29] dt-bindings: memory: tegra20: mc: Document new interconnect property Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko [this message] 2019-11-18 20:02 ` [PATCH v1 02/29] dt-bindings: memory: tegra20: emc: " Dmitry Osipenko 2019-11-19 6:21 ` Thierry Reding 2019-11-19 6:21 ` Thierry Reding 2019-11-19 16:57 ` Dmitry Osipenko 2019-11-19 16:57 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 03/29] dt-bindings: memory: tegra30: mc: " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 04/29] dt-bindings: memory: tegra30: emc: " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 05/29] dt-bindings: memory: tegra124: mc: " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 06/29] dt-bindings: memory: tegra124: emc: " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 07/29] dt-bindings: host1x: Document new interconnect properties Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 08/29] dt-bindings: interconnect: tegra: Add initial IDs Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 6:25 ` Thierry Reding 2019-11-19 6:25 ` Thierry Reding 2019-11-19 16:56 ` Dmitry Osipenko 2019-11-19 16:56 ` Dmitry Osipenko 2019-11-21 17:14 ` Dmitry Osipenko 2019-11-21 17:14 ` Dmitry Osipenko 2019-11-25 11:32 ` Thierry Reding 2019-11-25 11:32 ` Thierry Reding 2019-11-28 20:06 ` Dmitry Osipenko 2019-11-28 20:06 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 09/29] ARM: tegra: Add interconnect properties to Tegra20 device-tree Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 10/29] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 11/29] ARM: tegra: Add interconnect properties to Tegra124 device-tree Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 6:27 ` Thierry Reding 2019-11-19 6:27 ` Thierry Reding 2019-11-18 20:02 ` [PATCH v1 12/29] interconnect: Add memory interconnection providers for NVIDIA Tegra SoCs Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 6:30 ` Thierry Reding 2019-11-19 6:30 ` Thierry Reding 2019-11-19 16:58 ` Dmitry Osipenko 2019-11-19 16:58 ` Dmitry Osipenko 2019-11-21 17:33 ` Dmitry Osipenko 2019-11-21 17:33 ` Dmitry Osipenko 2019-11-19 6:31 ` Thierry Reding 2019-11-19 6:31 ` Thierry Reding 2019-11-19 16:59 ` Dmitry Osipenko 2019-11-19 16:59 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 13/29] memory: tegra: Register as interconnect provider Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 14/29] memory: tegra: Add interconnect nodes for Terga20 display controllers Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 6:34 ` Thierry Reding 2019-11-19 6:34 ` Thierry Reding 2019-11-18 20:02 ` [PATCH v1 15/29] memory: tegra: Add interconnect nodes for Terga30 " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 16/29] memory: tegra: Add interconnect nodes for Terga124 " Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 17/29] memory: tegra20-emc: Use devm_platform_ioremap_resource Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 18/29] memory: tegra20-emc: Continue probing if timings/IRQ are missing in device-tree Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 19/29] memory: tegra20-emc: Register as interconnect provider Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 20/29] memory: tegra30-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 21/29] memory: tegra30-emc: Register as interconnect provider Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 22/29] memory: tegra124-emc: Use devm_platform_ioremap_resource Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 23/29] memory: tegra124-emc: Register as interconnect provider Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 16:57 ` Dmitry Osipenko 2019-11-19 16:57 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 24/29] drm/tegra: dc: Use devm_platform_ioremap_resource Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 25/29] drm/tegra: dc: Release PM and RGB output when client's registration fails Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 26/29] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 27/29] ARM: tegra: Enable interconnect API in tegra_defconfig Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 28/29] ARM: multi_v7_defconfig: Enable NVIDIA Tegra interconnect providers Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-18 20:02 ` [PATCH v1 29/29] MAINTAINERS: Add maintainers for NVIDIA Tegra interconnect drivers Dmitry Osipenko 2019-11-18 20:02 ` Dmitry Osipenko 2019-11-19 6:19 ` [PATCH v1 00/29] Introduce memory interconnect for NVIDIA Tegra SoCs Thierry Reding 2019-11-19 6:19 ` Thierry Reding
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