From: Mike Leach <mike.leach@linaro.org> To: mike.leach@linaro.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org Cc: mathieu.poirier@linaro.org, suzuki.poulose@arm.com Subject: [PATCH v5 10/14] dt-bindings: qcom: Add CTI options for qcom msm8916 Date: Tue, 19 Nov 2019 23:19:08 +0000 [thread overview] Message-ID: <20191119231912.12768-11-mike.leach@linaro.org> (raw) In-Reply-To: <20191119231912.12768-1-mike.leach@linaro.org> Adds system and CPU bound CTI definitions for Qualcom msm8916 platform (Dragonboard DB410C). System CTIs 2-11 are omitted as no information available at present. Signed-off-by: Mike Leach <mike.leach@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 85 +++++++++++++++++++++++++-- 1 file changed, 81 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 5ea9fb8f2f87..9589fc2cba22 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/reset/qcom,gcc-msm8916.h> #include <dt-bindings/clock/qcom,rpmcc.h> #include <dt-bindings/thermal/thermal.h> +#include <dt-bindings/arm/coresight-cti-dt.h> / { interrupt-parent = <&intc>; @@ -1357,7 +1358,7 @@ cpu = <&CPU3>; }; - etm@85c000 { + etm0: etm@85c000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85c000 0x1000>; @@ -1375,7 +1376,7 @@ }; }; - etm@85d000 { + etm1: etm@85d000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85d000 0x1000>; @@ -1393,7 +1394,7 @@ }; }; - etm@85e000 { + etm2: etm@85e000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85e000 0x1000>; @@ -1411,7 +1412,7 @@ }; }; - etm@85f000 { + etm3: etm@85f000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85f000 0x1000>; @@ -1429,6 +1430,82 @@ }; }; + /* System CTIs */ + /* CTI 0 - TMC connections */ + cti@810000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x810000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + /* CTI 1 - TPIU connections */ + cti@811000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x811000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + /* CTIs 2-11 - no information - not instantiated */ + + /* Core CTIs; CTIs 12-15 */ + /* CTI - CPU-0 */ + cti@858000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x858000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + arm,cti-v8-arch; + cpu = <&CPU0>; + arm,cs-dev-assoc = <&etm0>; + + }; + + /* CTI - CPU-1 */ + cti@859000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x859000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + arm,cti-v8-arch; + cpu = <&CPU1>; + arm,cs-dev-assoc = <&etm1>; + }; + + /* CTI - CPU-2 */ + cti@85a000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x85a000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + arm,cti-v8-arch; + cpu = <&CPU2>; + arm,cs-dev-assoc = <&etm2>; + }; + + /* CTI - CPU-3 */ + cti@85b000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x85b000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + arm,cti-v8-arch; + cpu = <&CPU3>; + arm,cs-dev-assoc = <&etm3>; + }; + + venus: video-codec@1d00000 { compatible = "qcom,msm8916-venus"; reg = <0x01d00000 0xff000>; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Mike Leach <mike.leach@linaro.org> To: mike.leach@linaro.org, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org Cc: mathieu.poirier@linaro.org, suzuki.poulose@arm.com Subject: [PATCH v5 10/14] dt-bindings: qcom: Add CTI options for qcom msm8916 Date: Tue, 19 Nov 2019 23:19:08 +0000 [thread overview] Message-ID: <20191119231912.12768-11-mike.leach@linaro.org> (raw) In-Reply-To: <20191119231912.12768-1-mike.leach@linaro.org> Adds system and CPU bound CTI definitions for Qualcom msm8916 platform (Dragonboard DB410C). System CTIs 2-11 are omitted as no information available at present. Signed-off-by: Mike Leach <mike.leach@linaro.org> --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 85 +++++++++++++++++++++++++-- 1 file changed, 81 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 5ea9fb8f2f87..9589fc2cba22 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/reset/qcom,gcc-msm8916.h> #include <dt-bindings/clock/qcom,rpmcc.h> #include <dt-bindings/thermal/thermal.h> +#include <dt-bindings/arm/coresight-cti-dt.h> / { interrupt-parent = <&intc>; @@ -1357,7 +1358,7 @@ cpu = <&CPU3>; }; - etm@85c000 { + etm0: etm@85c000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85c000 0x1000>; @@ -1375,7 +1376,7 @@ }; }; - etm@85d000 { + etm1: etm@85d000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85d000 0x1000>; @@ -1393,7 +1394,7 @@ }; }; - etm@85e000 { + etm2: etm@85e000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85e000 0x1000>; @@ -1411,7 +1412,7 @@ }; }; - etm@85f000 { + etm3: etm@85f000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85f000 0x1000>; @@ -1429,6 +1430,82 @@ }; }; + /* System CTIs */ + /* CTI 0 - TMC connections */ + cti@810000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x810000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + /* CTI 1 - TPIU connections */ + cti@811000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x811000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + }; + + /* CTIs 2-11 - no information - not instantiated */ + + /* Core CTIs; CTIs 12-15 */ + /* CTI - CPU-0 */ + cti@858000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x858000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + arm,cti-v8-arch; + cpu = <&CPU0>; + arm,cs-dev-assoc = <&etm0>; + + }; + + /* CTI - CPU-1 */ + cti@859000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x859000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + arm,cti-v8-arch; + cpu = <&CPU1>; + arm,cs-dev-assoc = <&etm1>; + }; + + /* CTI - CPU-2 */ + cti@85a000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x85a000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + arm,cti-v8-arch; + cpu = <&CPU2>; + arm,cs-dev-assoc = <&etm2>; + }; + + /* CTI - CPU-3 */ + cti@85b000 { + compatible = "arm,coresight-cti", "arm,primecell"; + reg = <0x85b000 0x1000>; + + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + + arm,cti-v8-arch; + cpu = <&CPU3>; + arm,cs-dev-assoc = <&etm3>; + }; + + venus: video-codec@1d00000 { compatible = "qcom,msm8916-venus"; reg = <0x01d00000 0xff000>; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-11-19 23:19 UTC|newest] Thread overview: 124+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-19 23:18 [PATCH v5 00/14] CoreSight CTI Driver Mike Leach 2019-11-19 23:18 ` Mike Leach 2019-11-19 23:18 ` [PATCH v5 01/14] coresight: cti: Initial " Mike Leach 2019-11-19 23:18 ` Mike Leach 2019-11-21 20:21 ` Mathieu Poirier 2019-11-21 20:21 ` Mathieu Poirier 2019-11-29 12:05 ` Mike Leach 2019-11-29 12:05 ` Mike Leach 2019-12-03 16:53 ` Mathieu Poirier 2019-12-03 16:53 ` Mathieu Poirier 2019-11-25 19:03 ` Suzuki Kuruppassery Poulose 2019-11-25 19:03 ` Suzuki Kuruppassery Poulose 2019-11-29 12:06 ` Mike Leach 2019-11-29 12:06 ` Mike Leach 2019-11-19 23:19 ` [PATCH v5 02/14] coresight: cti: Add sysfs coresight mgmt reg access Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-22 17:19 ` Mathieu Poirier 2019-11-22 17:19 ` Mathieu Poirier 2019-11-19 23:19 ` [PATCH v5 03/14] coresight: cti: Add sysfs access to program function regs Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-27 18:26 ` Suzuki Kuruppassery Poulose 2019-11-27 18:26 ` Suzuki Kuruppassery Poulose 2019-11-29 12:47 ` Mike Leach 2019-11-29 12:47 ` Mike Leach 2019-11-28 10:54 ` Suzuki Kuruppassery Poulose 2019-11-28 10:54 ` Suzuki Kuruppassery Poulose 2019-11-28 17:20 ` Mathieu Poirier 2019-11-28 17:20 ` Mathieu Poirier 2019-11-28 18:00 ` Suzuki Kuruppassery Poulose 2019-11-28 18:00 ` Suzuki Kuruppassery Poulose 2019-11-29 12:50 ` Mike Leach 2019-11-29 12:50 ` Mike Leach 2019-11-19 23:19 ` [PATCH v5 04/14] coresight: cti: Add sysfs trigger / channel programming API Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-22 18:40 ` Mathieu Poirier 2019-11-22 18:40 ` Mathieu Poirier 2019-11-27 18:40 ` Suzuki Kuruppassery Poulose 2019-11-27 18:40 ` Suzuki Kuruppassery Poulose 2019-11-29 13:01 ` Mike Leach 2019-11-29 13:01 ` Mike Leach 2019-11-19 23:19 ` [PATCH v5 05/14] dt-bindings: arm: Adds CoreSight CTI hardware definitions Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-20 19:06 ` Mathieu Poirier 2019-11-20 19:06 ` Mathieu Poirier 2019-11-20 22:39 ` Mike Leach 2019-11-20 22:39 ` Mike Leach 2019-11-22 23:33 ` Rob Herring 2019-11-22 23:33 ` Rob Herring 2019-11-29 13:50 ` Mike Leach 2019-11-29 13:50 ` Mike Leach 2019-11-29 14:12 ` Suzuki Kuruppassery Poulose 2019-11-29 14:12 ` Suzuki Kuruppassery Poulose 2019-11-28 18:38 ` Suzuki Kuruppassery Poulose 2019-11-28 18:38 ` Suzuki Kuruppassery Poulose 2019-11-29 13:57 ` Mike Leach 2019-11-29 13:57 ` Mike Leach 2019-11-19 23:19 ` [PATCH v5 06/14] coresight: cti: Add device tree support for v8 arch CTI Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-25 19:00 ` Mathieu Poirier 2019-11-25 19:00 ` Mathieu Poirier 2019-11-29 11:33 ` Suzuki Kuruppassery Poulose 2019-11-29 11:33 ` Suzuki Kuruppassery Poulose 2019-12-03 10:59 ` Mike Leach 2019-12-03 10:59 ` Mike Leach 2019-12-03 11:28 ` Suzuki Kuruppassery Poulose 2019-12-03 11:28 ` Suzuki Kuruppassery Poulose 2019-12-03 12:25 ` Mike Leach 2019-12-03 12:25 ` Mike Leach 2019-11-19 23:19 ` [PATCH v5 07/14] coresight: cti: Add device tree support for custom CTI Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-25 21:22 ` Mathieu Poirier 2019-11-25 21:22 ` Mathieu Poirier 2019-11-29 14:16 ` Suzuki Kuruppassery Poulose 2019-11-29 14:16 ` Suzuki Kuruppassery Poulose 2019-11-29 21:11 ` Mathieu Poirier 2019-11-29 21:11 ` Mathieu Poirier 2019-11-29 14:18 ` Suzuki Kuruppassery Poulose 2019-11-29 14:18 ` Suzuki Kuruppassery Poulose 2019-12-03 14:05 ` Mike Leach 2019-12-03 14:05 ` Mike Leach 2019-11-19 23:19 ` [PATCH v5 08/14] coresight: cti: Enable CTI associated with devices Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-25 22:45 ` Mathieu Poirier 2019-11-25 22:45 ` Mathieu Poirier 2019-12-05 16:33 ` Mike Leach 2019-12-05 16:33 ` Mike Leach 2019-11-29 18:28 ` Suzuki Kuruppassery Poulose 2019-11-29 18:28 ` Suzuki Kuruppassery Poulose 2019-11-29 21:25 ` Mathieu Poirier 2019-11-29 21:25 ` Mathieu Poirier 2019-12-05 16:33 ` Mike Leach 2019-12-05 16:33 ` Mike Leach 2019-11-19 23:19 ` [PATCH v5 09/14] coresight: cti: Add connection information to sysfs Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-27 18:09 ` Mathieu Poirier 2019-11-27 18:09 ` Mathieu Poirier 2019-12-06 16:24 ` Mike Leach 2019-12-06 16:24 ` Mike Leach 2019-12-02 9:47 ` Suzuki Kuruppassery Poulose 2019-12-02 9:47 ` Suzuki Kuruppassery Poulose 2019-12-06 16:24 ` Mike Leach 2019-12-06 16:24 ` Mike Leach 2019-11-19 23:19 ` Mike Leach [this message] 2019-11-19 23:19 ` [PATCH v5 10/14] dt-bindings: qcom: Add CTI options for qcom msm8916 Mike Leach 2019-11-27 18:18 ` Mathieu Poirier 2019-11-27 18:18 ` Mathieu Poirier 2019-11-19 23:19 ` [PATCH v5 11/14] dt-bindings: arm: Juno platform - add CTI entries to device tree Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-27 18:25 ` Mathieu Poirier 2019-11-27 18:25 ` Mathieu Poirier 2019-11-19 23:19 ` [PATCH v5 12/14] dt-bindings: hisilicon: Add CTI bindings for hi-6220 Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-19 23:19 ` [PATCH v5 13/14] docs: coresight: Update documentation for CoreSight to cover CTI Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-27 19:00 ` Mathieu Poirier 2019-11-27 19:00 ` Mathieu Poirier 2019-12-02 10:43 ` Suzuki Kuruppassery Poulose 2019-12-02 10:43 ` Suzuki Kuruppassery Poulose 2019-12-06 17:39 ` Mike Leach 2019-12-06 17:39 ` Mike Leach 2019-11-19 23:19 ` [PATCH v5 14/14] docs: sysfs: coresight: Add sysfs ABI documentation for CTI Mike Leach 2019-11-19 23:19 ` Mike Leach 2019-11-27 19:08 ` Mathieu Poirier 2019-11-27 19:08 ` Mathieu Poirier
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