From: Adam Ford <aford173@gmail.com> To: linux-arm-kernel@lists.infradead.org Cc: Adam Ford <aford173@gmail.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, NXP Linux Team <linux-imx@nxp.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 7/7] arm64: dts: imx8mm: Add PCIe support Date: Wed, 4 Dec 2019 20:19:23 -0600 [thread overview] Message-ID: <20191205021924.25188-8-aford173@gmail.com> (raw) In-Reply-To: <20191205021924.25188-1-aford173@gmail.com> The PCIE controller on the i.MX8M Mini appears to be the same as the i.MX8MQ but it is absent. This patch uses the bindings from the i.MX8MQ and the clock information from the NXP Linux release and marks it as disabled so it can be configured and enabled on boards where needed. Signed-off-by: Adam Ford <aford173@gmail.com> --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 35 +++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 5036d713558f..f384934ddbb4 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -5,6 +5,7 @@ #include <dt-bindings/clock/imx8mm-clock.h> #include <dt-bindings/power/imx8m-power.h> +#include <dt-bindings/reset/imx8mq-reset.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -936,6 +937,40 @@ status = "disabled"; }; + pcie0: pcie@33800000 { + compatible = "fsl,imx8mq-pcie"; + reg = <0x33800000 0x400000>, + <0x1ff00000 0x80000>; + reg-names = "dbi", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x00 0xff>; + ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */ + 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */ + num-lanes = <1>; + num-viewport = <4>; + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + fsl,max-link-speed = <2>; + power-domains = <&pgc_pcie>; + resets = <&src IMX8MQ_RESET_PCIEPHY>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, + <&clk IMX8MM_CLK_PCIE1_AUX>, + <&clk IMX8MM_CLK_PCIE1_PHY>; + clock-names = "pcie", "pcie_bus", "pcie_phy"; + status = "disabled"; + }; + gic: interrupt-controller@38800000 { compatible = "arm,gic-v3"; reg = <0x38800000 0x10000>, /* GIC Dist */ -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Adam Ford <aford173@gmail.com> To: linux-arm-kernel@lists.infradead.org Cc: Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org, Fabio Estevam <festevam@gmail.com>, Adam Ford <aford173@gmail.com>, Sascha Hauer <s.hauer@pengutronix.de>, linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, NXP Linux Team <linux-imx@nxp.com>, Pengutronix Kernel Team <kernel@pengutronix.de>, Shawn Guo <shawnguo@kernel.org> Subject: [PATCH 7/7] arm64: dts: imx8mm: Add PCIe support Date: Wed, 4 Dec 2019 20:19:23 -0600 [thread overview] Message-ID: <20191205021924.25188-8-aford173@gmail.com> (raw) In-Reply-To: <20191205021924.25188-1-aford173@gmail.com> The PCIE controller on the i.MX8M Mini appears to be the same as the i.MX8MQ but it is absent. This patch uses the bindings from the i.MX8MQ and the clock information from the NXP Linux release and marks it as disabled so it can be configured and enabled on boards where needed. Signed-off-by: Adam Ford <aford173@gmail.com> --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 35 +++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 5036d713558f..f384934ddbb4 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -5,6 +5,7 @@ #include <dt-bindings/clock/imx8mm-clock.h> #include <dt-bindings/power/imx8m-power.h> +#include <dt-bindings/reset/imx8mq-reset.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -936,6 +937,40 @@ status = "disabled"; }; + pcie0: pcie@33800000 { + compatible = "fsl,imx8mq-pcie"; + reg = <0x33800000 0x400000>, + <0x1ff00000 0x80000>; + reg-names = "dbi", "config"; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x00 0xff>; + ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */ + 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */ + num-lanes = <1>; + num-viewport = <4>; + interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "msi"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; + fsl,max-link-speed = <2>; + power-domains = <&pgc_pcie>; + resets = <&src IMX8MQ_RESET_PCIEPHY>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>, + <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>; + reset-names = "pciephy", "apps", "turnoff"; + clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, + <&clk IMX8MM_CLK_PCIE1_AUX>, + <&clk IMX8MM_CLK_PCIE1_PHY>; + clock-names = "pcie", "pcie_bus", "pcie_phy"; + status = "disabled"; + }; + gic: interrupt-controller@38800000 { compatible = "arm,gic-v3"; reg = <0x38800000 0x10000>, /* GIC Dist */ -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-12-05 2:20 UTC|newest] Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-12-05 2:19 [PATCH 0/7] soc: imx: Enable additional functionality of i.MX8M Adam Ford 2019-12-05 2:19 ` Adam Ford 2019-12-05 2:19 ` [PATCH 1/7] soc: imx: gpcv2: Rename imx8mq-power.h to imx8m-power.h Adam Ford 2019-12-05 2:19 ` Adam Ford 2019-12-05 2:19 ` [PATCH 2/7] soc: imx: gpcv2: Update imx8m-power.h to include iMX8M Mini Adam Ford 2019-12-05 2:19 ` Adam Ford 2019-12-05 2:19 ` [PATCH 3/7] soc: imx: gpcv2: add support for i.MX8M Mini SoC Adam Ford 2019-12-05 2:19 ` Adam Ford 2019-12-05 2:33 ` Jacky Bai 2019-12-05 2:33 ` Jacky Bai 2019-12-05 3:13 ` Adam Ford 2019-12-05 3:13 ` Adam Ford 2019-12-05 2:19 ` [PATCH 4/7] dt-bindings: imx-gpcv2: Update bindings to support i.MX8M Mini Adam Ford 2019-12-05 2:19 ` Adam Ford 2019-12-05 2:19 ` [PATCH 5/7] arm64: dts: imx8mm: add GPC power domains Adam Ford 2019-12-05 2:19 ` Adam Ford 2019-12-05 2:37 ` Jacky Bai 2019-12-05 2:37 ` Jacky Bai 2019-12-05 3:15 ` Adam Ford 2019-12-05 3:15 ` Adam Ford 2020-02-05 15:41 ` Schrempf Frieder 2020-02-05 15:41 ` Schrempf Frieder 2019-12-05 2:19 ` [PATCH 6/7] ARM64: dts: imx8mm: Fix clocks and power domain for USB OTG Adam Ford 2019-12-05 2:19 ` Adam Ford 2019-12-05 2:19 ` Adam Ford [this message] 2019-12-05 2:19 ` [PATCH 7/7] arm64: dts: imx8mm: Add PCIe support Adam Ford
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