From: Marc Zyngier <maz@kernel.org> To: kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org Cc: Eric Auger <eric.auger@redhat.com>, James Morse <james.morse@arm.com>, Julien Thierry <julien.thierry.kdev@gmail.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Andrew Murray <Andrew.Murray@arm.com>, Zenghui Yu <yuzenghui@huawei.com>, Robert Richter <rrichter@marvell.com> Subject: [PATCH v3 15/32] irqchip/gic-v4.1: Allow direct invalidation of VLPIs Date: Tue, 24 Dec 2019 11:10:38 +0000 [thread overview] Message-ID: <20191224111055.11836-16-maz@kernel.org> (raw) In-Reply-To: <20191224111055.11836-1-maz@kernel.org> Just like for INVALL, GICv4.1 has grown a VPE-aware INVLPI register. Let's plumb it in and make use of the DirectLPI code in that case. Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> --- drivers/irqchip/irq-gic-v3-its.c | 53 ++++++++++++++++++++---------- include/linux/irqchip/arm-gic-v3.h | 1 + 2 files changed, 36 insertions(+), 18 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index f00c8ddd3798..360ca2c1533f 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -228,11 +228,26 @@ static struct its_vlpi_map *dev_event_to_vlpi_map(struct its_device *its_dev, return &its_dev->event_map.vlpi_maps[event]; } -static struct its_collection *irq_to_col(struct irq_data *d) +static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) { struct its_device *its_dev = irq_data_get_irq_chip_data(d); + u32 event = its_get_event_id(d); + + if (!irqd_is_forwarded_to_vcpu(d)) + return NULL; - return dev_event_to_col(its_dev, its_get_event_id(d)); + return dev_event_to_vlpi_map(its_dev, event); +} + +static int irq_to_cpuid(struct irq_data *d) +{ + struct its_device *its_dev = irq_data_get_irq_chip_data(d); + struct its_vlpi_map *map = get_vlpi_map(d); + + if (map) + return map->vpe->col_idx; + + return its_dev->event_map.col_map[its_get_event_id(d)]; } static struct its_collection *valid_col(struct its_collection *col) @@ -1270,17 +1285,6 @@ static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) /* * irqchip functions - assumes MSI, mostly. */ -static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) -{ - struct its_device *its_dev = irq_data_get_irq_chip_data(d); - u32 event = its_get_event_id(d); - - if (!irqd_is_forwarded_to_vcpu(d)) - return NULL; - - return dev_event_to_vlpi_map(its_dev, event); -} - static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) { struct its_vlpi_map *map = get_vlpi_map(d); @@ -1323,13 +1327,25 @@ static void wait_for_syncr(void __iomem *rdbase) static void direct_lpi_inv(struct irq_data *d) { - struct its_collection *col; + struct its_vlpi_map *map = get_vlpi_map(d); void __iomem *rdbase; + u64 val; + + if (map) { + struct its_device *its_dev = irq_data_get_irq_chip_data(d); + + WARN_ON(!is_v4_1(its_dev->its)); + + val = GICR_INVLPIR_V; + val |= FIELD_PREP(GICR_INVLPIR_VPEID, map->vpe->vpe_id); + val |= FIELD_PREP(GICR_INVLPIR_INTID, map->vintid); + } else { + val = d->hwirq; + } /* Target the redistributor this LPI is currently routed to */ - col = irq_to_col(d); - rdbase = per_cpu_ptr(gic_rdists->rdist, col->col_id)->rd_base; - gic_write_lpir(d->hwirq, rdbase + GICR_INVLPIR); + rdbase = per_cpu_ptr(gic_rdists->rdist, irq_to_cpuid(d))->rd_base; + gic_write_lpir(val, rdbase + GICR_INVLPIR); wait_for_syncr(rdbase); } @@ -1339,7 +1355,8 @@ static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) struct its_device *its_dev = irq_data_get_irq_chip_data(d); lpi_write_config(d, clr, set); - if (gic_rdists->has_direct_lpi && !irqd_is_forwarded_to_vcpu(d)) + if (gic_rdists->has_direct_lpi && + (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) direct_lpi_inv(d); else if (!irqd_is_forwarded_to_vcpu(d)) its_send_inv(its_dev, its_get_event_id(d)); diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index 37b14fb82773..a30ea5294784 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -249,6 +249,7 @@ #define GICR_TYPER_COMMON_LPI_AFF GENMASK_ULL(25, 24) #define GICR_TYPER_AFFINITY GENMASK_ULL(63, 32) +#define GICR_INVLPIR_INTID GENMASK_ULL(31, 0) #define GICR_INVLPIR_VPEID GENMASK_ULL(47, 32) #define GICR_INVLPIR_V GENMASK_ULL(63, 63) -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org> To: kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Jason Cooper <jason@lakedaemon.net>, Robert Richter <rrichter@marvell.com>, Thomas Gleixner <tglx@linutronix.de> Subject: [PATCH v3 15/32] irqchip/gic-v4.1: Allow direct invalidation of VLPIs Date: Tue, 24 Dec 2019 11:10:38 +0000 [thread overview] Message-ID: <20191224111055.11836-16-maz@kernel.org> (raw) In-Reply-To: <20191224111055.11836-1-maz@kernel.org> Just like for INVALL, GICv4.1 has grown a VPE-aware INVLPI register. Let's plumb it in and make use of the DirectLPI code in that case. Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Signed-off-by: Marc Zyngier <maz@kernel.org> --- drivers/irqchip/irq-gic-v3-its.c | 53 ++++++++++++++++++++---------- include/linux/irqchip/arm-gic-v3.h | 1 + 2 files changed, 36 insertions(+), 18 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index f00c8ddd3798..360ca2c1533f 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -228,11 +228,26 @@ static struct its_vlpi_map *dev_event_to_vlpi_map(struct its_device *its_dev, return &its_dev->event_map.vlpi_maps[event]; } -static struct its_collection *irq_to_col(struct irq_data *d) +static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) { struct its_device *its_dev = irq_data_get_irq_chip_data(d); + u32 event = its_get_event_id(d); + + if (!irqd_is_forwarded_to_vcpu(d)) + return NULL; - return dev_event_to_col(its_dev, its_get_event_id(d)); + return dev_event_to_vlpi_map(its_dev, event); +} + +static int irq_to_cpuid(struct irq_data *d) +{ + struct its_device *its_dev = irq_data_get_irq_chip_data(d); + struct its_vlpi_map *map = get_vlpi_map(d); + + if (map) + return map->vpe->col_idx; + + return its_dev->event_map.col_map[its_get_event_id(d)]; } static struct its_collection *valid_col(struct its_collection *col) @@ -1270,17 +1285,6 @@ static void its_send_invdb(struct its_node *its, struct its_vpe *vpe) /* * irqchip functions - assumes MSI, mostly. */ -static struct its_vlpi_map *get_vlpi_map(struct irq_data *d) -{ - struct its_device *its_dev = irq_data_get_irq_chip_data(d); - u32 event = its_get_event_id(d); - - if (!irqd_is_forwarded_to_vcpu(d)) - return NULL; - - return dev_event_to_vlpi_map(its_dev, event); -} - static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) { struct its_vlpi_map *map = get_vlpi_map(d); @@ -1323,13 +1327,25 @@ static void wait_for_syncr(void __iomem *rdbase) static void direct_lpi_inv(struct irq_data *d) { - struct its_collection *col; + struct its_vlpi_map *map = get_vlpi_map(d); void __iomem *rdbase; + u64 val; + + if (map) { + struct its_device *its_dev = irq_data_get_irq_chip_data(d); + + WARN_ON(!is_v4_1(its_dev->its)); + + val = GICR_INVLPIR_V; + val |= FIELD_PREP(GICR_INVLPIR_VPEID, map->vpe->vpe_id); + val |= FIELD_PREP(GICR_INVLPIR_INTID, map->vintid); + } else { + val = d->hwirq; + } /* Target the redistributor this LPI is currently routed to */ - col = irq_to_col(d); - rdbase = per_cpu_ptr(gic_rdists->rdist, col->col_id)->rd_base; - gic_write_lpir(d->hwirq, rdbase + GICR_INVLPIR); + rdbase = per_cpu_ptr(gic_rdists->rdist, irq_to_cpuid(d))->rd_base; + gic_write_lpir(val, rdbase + GICR_INVLPIR); wait_for_syncr(rdbase); } @@ -1339,7 +1355,8 @@ static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) struct its_device *its_dev = irq_data_get_irq_chip_data(d); lpi_write_config(d, clr, set); - if (gic_rdists->has_direct_lpi && !irqd_is_forwarded_to_vcpu(d)) + if (gic_rdists->has_direct_lpi && + (is_v4_1(its_dev->its) || !irqd_is_forwarded_to_vcpu(d))) direct_lpi_inv(d); else if (!irqd_is_forwarded_to_vcpu(d)) its_send_inv(its_dev, its_get_event_id(d)); diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index 37b14fb82773..a30ea5294784 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -249,6 +249,7 @@ #define GICR_TYPER_COMMON_LPI_AFF GENMASK_ULL(25, 24) #define GICR_TYPER_AFFINITY GENMASK_ULL(63, 32) +#define GICR_INVLPIR_INTID GENMASK_ULL(31, 0) #define GICR_INVLPIR_VPEID GENMASK_ULL(47, 32) #define GICR_INVLPIR_V GENMASK_ULL(63, 63) -- 2.20.1 _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
next prev parent reply other threads:[~2019-12-24 11:40 UTC|newest] Thread overview: 119+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-12-24 11:10 [PATCH v3 00/32] irqchip/gic-v4: GICv4.1 architecture support Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 01/32] irqchip/gic-v3: Detect GICv4.1 supporting RVPEID Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 02/32] irqchip/gic-v3: Add GICv4.1 VPEID size discovery Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 03/32] irqchip/gic-v3: Workaround Cavium TX1 erratum when reading GICD_TYPER2 Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-03-09 22:11 ` Robert Richter 2020-03-09 22:11 ` Robert Richter 2020-03-10 11:41 ` Marc Zyngier 2020-03-10 11:41 ` Marc Zyngier 2020-03-10 12:34 ` Robert Richter 2020-03-10 12:34 ` Robert Richter 2020-03-11 8:45 ` Robert Richter 2020-03-11 8:45 ` Robert Richter 2020-03-11 9:03 ` Marc Zyngier 2020-03-11 9:03 ` Marc Zyngier 2020-03-11 9:18 ` Robert Richter 2020-03-11 9:18 ` Robert Richter 2019-12-24 11:10 ` [PATCH v3 04/32] irqchip/gic-v3: Use SGIs without active state if offered Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-28 8:56 ` Zenghui Yu 2019-12-28 8:56 ` Zenghui Yu 2019-12-28 10:36 ` Marc Zyngier 2019-12-28 10:36 ` Marc Zyngier 2019-12-30 3:50 ` Zenghui Yu 2019-12-30 3:50 ` Zenghui Yu 2019-12-24 11:10 ` [PATCH v3 05/32] irqchip/gic-v4.1: VPE table (aka GICR_VPROPBASER) allocation Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-20 14:03 ` Zenghui Yu 2020-01-20 14:03 ` Zenghui Yu 2020-01-20 15:11 ` Marc Zyngier 2020-01-20 15:11 ` Marc Zyngier 2020-01-22 2:59 ` Zenghui Yu 2020-01-22 2:59 ` Zenghui Yu 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 06/32] irqchip/gic-v4.1: Implement the v4.1 flavour of VMAPP Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 07/32] irqchip/gic-v4.1: Don't use the VPE proxy if RVPEID is set Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 08/32] irqchip/gic-v4.1: Implement the v4.1 flavour of VMOVP Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 09/32] irqchip/gic-v4.1: Plumb skeletal VPE irqchip Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 10/32] irqchip/gic-v4.1: Add mask/unmask doorbell callbacks Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 11/32] irqchip/gic-v4.1: Add VPE residency callback Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 12/32] irqchip/gic-v4.1: Add VPE eviction callback Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 13/32] irqchip/gic-v4.1: Add VPE INVALL callback Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 14/32] irqchip/gic-v4.1: Suppress per-VLPI doorbell Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier [this message] 2019-12-24 11:10 ` [PATCH v3 15/32] irqchip/gic-v4.1: Allow direct invalidation of VLPIs Marc Zyngier 2020-01-24 19:11 ` [tip: irq/core] " tip-bot2 for Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 16/32] irqchip/gic-v4.1: Advertise support v4.1 to KVM Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 17/32] irqchip/gic-v4.1: Map the ITS SGIR register page Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 18/32] irqchip/gic-v4.1: Plumb skeletal VSGI irqchip Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 19/32] irqchip/gic-v4.1: Add initial SGI configuration Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 20/32] irqchip/gic-v4.1: Plumb mask/unmask SGI callbacks Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 21/32] irqchip/gic-v4.1: Plumb get/set_irqchip_state " Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 22/32] irqchip/gic-v4.1: Plumb set_vcpu_affinity " Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 23/32] irqchip/gic-v4.1: Move doorbell management to the GICv4 abstraction layer Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 24/32] irqchip/gic-v4.1: Add VSGI allocation/teardown Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 25/32] irqchip/gic-v4.1: Add VSGI property setup Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 26/32] irqchip/gic-v4.1: Eagerly vmap vPEs Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 27/32] KVM: arm64: GICv4.1: Let doorbells be auto-enabled Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 28/32] KVM: arm64: GICv4.1: Add direct injection capability to SGI registers Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-28 9:19 ` Zenghui Yu 2019-12-28 9:19 ` Zenghui Yu 2019-12-28 10:41 ` Marc Zyngier 2019-12-28 10:41 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 29/32] KVM: arm64: GICv4.1: Allow SGIs to switch between HW and SW interrupts Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2020-01-15 2:49 ` Shaokun Zhang 2020-01-15 2:49 ` Shaokun Zhang 2020-01-15 3:49 ` Zenghui Yu 2020-01-15 3:49 ` Zenghui Yu 2020-01-15 13:32 ` Marc Zyngier 2020-01-15 13:32 ` Marc Zyngier 2020-01-15 13:49 ` Zenghui Yu 2020-01-15 13:49 ` Zenghui Yu 2020-01-16 6:13 ` Shaokun Zhang 2020-01-16 6:13 ` Shaokun Zhang 2020-01-15 13:17 ` Marc Zyngier 2020-01-15 13:17 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 30/32] KVM: arm64: GICv4.1: Plumb SGI implementation selection in the distributor Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 31/32] KVM: arm64: GICv4.1: Reload VLPI configuration on distributor enable/disable Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier 2019-12-24 11:10 ` [PATCH v3 32/32] KVM: arm64: GICv4.1: Expose HW-based SGIs in debugfs Marc Zyngier 2019-12-24 11:10 ` Marc Zyngier
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