All of lore.kernel.org
 help / color / mirror / Atom feed
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: robh+dt@kernel.org, andrew@lunn.ch, f.fainelli@gmail.com,
	linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org
Cc: jianxin.pan@amlogic.com, davem@davemloft.net,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Subject: [PATCH RFC v2 02/11] dt-bindings: net: dwmac-meson: Document the "timing-adjustment" clock
Date: Wed, 29 Apr 2020 22:16:35 +0200	[thread overview]
Message-ID: <20200429201644.1144546-3-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20200429201644.1144546-1-martin.blumenstingl@googlemail.com>

The PRG_ETHERNET registers can add an RX delay in RGMII mode. This
requires an internal re-timing circuit whose input clock is called
"timing adjustment clock". Document this clock input so the clock can be
enabled as needed.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 .../devicetree/bindings/net/amlogic,meson-dwmac.yaml   | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
index 8d851f59d9f2..2bc0e8b0d25b 100644
--- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
@@ -40,18 +40,22 @@ allOf:
     then:
       properties:
         clocks:
+          minItems: 3
+          maxItems: 4
           items:
             - description: GMAC main clock
             - description: First parent clock of the internal mux
             - description: Second parent clock of the internal mux
+            - description: The clock which drives the timing adjustment logic
 
         clock-names:
           minItems: 3
-          maxItems: 3
+          maxItems: 4
           items:
             - const: stmmaceth
             - const: clkin0
             - const: clkin1
+            - const: timing-adjustment
 
         amlogic,tx-delay-ns:
           $ref: /schemas/types.yaml#definitions/uint32
@@ -120,7 +124,7 @@ examples:
          reg = <0xc9410000 0x10000>, <0xc8834540 0x8>;
          interrupts = <8>;
          interrupt-names = "macirq";
-         clocks = <&clk_eth>, <&clkc_fclk_div2>, <&clk_mpll2>;
-         clock-names = "stmmaceth", "clkin0", "clkin1";
+         clocks = <&clk_eth>, <&clk_fclk_div2>, <&clk_mpll2>, <&clk_fclk_div2>;
+         clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
          phy-mode = "rgmii";
     };
-- 
2.26.2


WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: robh+dt@kernel.org, andrew@lunn.ch, f.fainelli@gmail.com,
	linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org
Cc: jianxin.pan@amlogic.com,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	davem@davemloft.net, linux-arm-kernel@lists.infradead.org
Subject: [PATCH RFC v2 02/11] dt-bindings: net: dwmac-meson: Document the "timing-adjustment" clock
Date: Wed, 29 Apr 2020 22:16:35 +0200	[thread overview]
Message-ID: <20200429201644.1144546-3-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20200429201644.1144546-1-martin.blumenstingl@googlemail.com>

The PRG_ETHERNET registers can add an RX delay in RGMII mode. This
requires an internal re-timing circuit whose input clock is called
"timing adjustment clock". Document this clock input so the clock can be
enabled as needed.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 .../devicetree/bindings/net/amlogic,meson-dwmac.yaml   | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
index 8d851f59d9f2..2bc0e8b0d25b 100644
--- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
@@ -40,18 +40,22 @@ allOf:
     then:
       properties:
         clocks:
+          minItems: 3
+          maxItems: 4
           items:
             - description: GMAC main clock
             - description: First parent clock of the internal mux
             - description: Second parent clock of the internal mux
+            - description: The clock which drives the timing adjustment logic
 
         clock-names:
           minItems: 3
-          maxItems: 3
+          maxItems: 4
           items:
             - const: stmmaceth
             - const: clkin0
             - const: clkin1
+            - const: timing-adjustment
 
         amlogic,tx-delay-ns:
           $ref: /schemas/types.yaml#definitions/uint32
@@ -120,7 +124,7 @@ examples:
          reg = <0xc9410000 0x10000>, <0xc8834540 0x8>;
          interrupts = <8>;
          interrupt-names = "macirq";
-         clocks = <&clk_eth>, <&clkc_fclk_div2>, <&clk_mpll2>;
-         clock-names = "stmmaceth", "clkin0", "clkin1";
+         clocks = <&clk_eth>, <&clk_fclk_div2>, <&clk_mpll2>, <&clk_fclk_div2>;
+         clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
          phy-mode = "rgmii";
     };
-- 
2.26.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: robh+dt@kernel.org, andrew@lunn.ch, f.fainelli@gmail.com,
	linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org
Cc: jianxin.pan@amlogic.com,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
	davem@davemloft.net, linux-arm-kernel@lists.infradead.org
Subject: [PATCH RFC v2 02/11] dt-bindings: net: dwmac-meson: Document the "timing-adjustment" clock
Date: Wed, 29 Apr 2020 22:16:35 +0200	[thread overview]
Message-ID: <20200429201644.1144546-3-martin.blumenstingl@googlemail.com> (raw)
In-Reply-To: <20200429201644.1144546-1-martin.blumenstingl@googlemail.com>

The PRG_ETHERNET registers can add an RX delay in RGMII mode. This
requires an internal re-timing circuit whose input clock is called
"timing adjustment clock". Document this clock input so the clock can be
enabled as needed.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 .../devicetree/bindings/net/amlogic,meson-dwmac.yaml   | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
index 8d851f59d9f2..2bc0e8b0d25b 100644
--- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml
@@ -40,18 +40,22 @@ allOf:
     then:
       properties:
         clocks:
+          minItems: 3
+          maxItems: 4
           items:
             - description: GMAC main clock
             - description: First parent clock of the internal mux
             - description: Second parent clock of the internal mux
+            - description: The clock which drives the timing adjustment logic
 
         clock-names:
           minItems: 3
-          maxItems: 3
+          maxItems: 4
           items:
             - const: stmmaceth
             - const: clkin0
             - const: clkin1
+            - const: timing-adjustment
 
         amlogic,tx-delay-ns:
           $ref: /schemas/types.yaml#definitions/uint32
@@ -120,7 +124,7 @@ examples:
          reg = <0xc9410000 0x10000>, <0xc8834540 0x8>;
          interrupts = <8>;
          interrupt-names = "macirq";
-         clocks = <&clk_eth>, <&clkc_fclk_div2>, <&clk_mpll2>;
-         clock-names = "stmmaceth", "clkin0", "clkin1";
+         clocks = <&clk_eth>, <&clk_fclk_div2>, <&clk_mpll2>, <&clk_fclk_div2>;
+         clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
          phy-mode = "rgmii";
     };
-- 
2.26.2


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

  parent reply	other threads:[~2020-04-29 20:17 UTC|newest]

Thread overview: 81+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-29 20:16 [PATCH RFC v2 00/11] dwmac-meson8b Ethernet RX delay configuration Martin Blumenstingl
2020-04-29 20:16 ` Martin Blumenstingl
2020-04-29 20:16 ` Martin Blumenstingl
2020-04-29 20:16 ` [PATCH RFC v2 01/11] dt-bindings: net: meson-dwmac: Add the amlogic,rx-delay-ns property Martin Blumenstingl
2020-04-29 20:16   ` [PATCH RFC v2 01/11] dt-bindings: net: meson-dwmac: Add the amlogic, rx-delay-ns property Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-05-01 15:26   ` [PATCH RFC v2 01/11] dt-bindings: net: meson-dwmac: Add the amlogic,rx-delay-ns property Andrew Lunn
2020-05-01 15:26     ` Andrew Lunn
2020-05-01 15:26     ` Andrew Lunn
2020-05-12 14:51   ` Rob Herring
2020-05-12 14:51     ` Rob Herring
2020-05-12 14:51     ` Rob Herring
2020-04-29 20:16 ` Martin Blumenstingl [this message]
2020-04-29 20:16   ` [PATCH RFC v2 02/11] dt-bindings: net: dwmac-meson: Document the "timing-adjustment" clock Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-05-01 15:27   ` Andrew Lunn
2020-05-01 15:27     ` Andrew Lunn
2020-05-01 15:27     ` Andrew Lunn
2020-05-01 21:09   ` Rob Herring
2020-05-01 21:09     ` Rob Herring
2020-05-01 21:09     ` Rob Herring
2020-05-01 21:53     ` Martin Blumenstingl
2020-05-01 21:53       ` Martin Blumenstingl
2020-05-01 21:53       ` Martin Blumenstingl
2020-05-10 22:34       ` Martin Blumenstingl
2020-05-10 22:34         ` Martin Blumenstingl
2020-05-10 22:34         ` Martin Blumenstingl
2020-04-29 20:16 ` [PATCH RFC v2 03/11] net: stmmac: dwmac-meson8b: use FIELD_PREP instead of open-coding it Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-05-01 15:28   ` Andrew Lunn
2020-05-01 15:28     ` Andrew Lunn
2020-05-01 15:28     ` Andrew Lunn
2020-04-29 20:16 ` [PATCH RFC v2 04/11] net: stmmac: dwmac-meson8b: Move the documentation for the TX delay Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-05-01 15:29   ` Andrew Lunn
2020-05-01 15:29     ` Andrew Lunn
2020-05-01 15:29     ` Andrew Lunn
2020-04-29 20:16 ` [PATCH RFC v2 05/11] net: stmmac: dwmac-meson8b: Add the PRG_ETH0_ADJ_* bits Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-05-01 15:33   ` Andrew Lunn
2020-05-01 15:33     ` Andrew Lunn
2020-05-01 15:33     ` Andrew Lunn
2020-04-29 20:16 ` [PATCH RFC v2 06/11] net: stmmac: dwmac-meson8b: Fetch the "timing-adjustment" clock Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-05-01 15:35   ` Andrew Lunn
2020-05-01 15:35     ` Andrew Lunn
2020-05-01 15:35     ` Andrew Lunn
2020-04-29 20:16 ` [PATCH RFC v2 07/11] net: stmmac: dwmac-meson8b: Make the clock enabling code re-usable Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-05-01 15:37   ` Andrew Lunn
2020-05-01 15:37     ` Andrew Lunn
2020-05-01 15:37     ` Andrew Lunn
2020-04-29 20:16 ` [PATCH RFC v2 08/11] net: stmmac: dwmac-meson8b: add support for the RX delay configuration Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-05-01 15:44   ` Andrew Lunn
2020-05-01 15:44     ` Andrew Lunn
2020-05-01 15:44     ` Andrew Lunn
2020-05-01 17:10     ` Martin Blumenstingl
2020-05-01 17:10       ` Martin Blumenstingl
2020-05-01 17:10       ` Martin Blumenstingl
2020-04-29 20:16 ` [PATCH DO NOT MERGE v2 09/11] arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 20:16 ` [PATCH DO NOT MERGE v2 10/11] ARM: dts: meson: " Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 20:16 ` [PATCH DO NOT MERGE v2 11/11] ARM: dts: meson: Switch existing boards with RGMII PHY to "rgmii-id" Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 20:16   ` Martin Blumenstingl
2020-04-29 21:29 ` [PATCH RFC v2 00/11] dwmac-meson8b Ethernet RX delay configuration Andrew Lunn
2020-04-29 21:29   ` Andrew Lunn
2020-04-29 21:29   ` Andrew Lunn
2020-05-01 14:49   ` Martin Blumenstingl
2020-05-01 14:49     ` Martin Blumenstingl
2020-05-01 14:49     ` Martin Blumenstingl

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200429201644.1144546-3-martin.blumenstingl@googlemail.com \
    --to=martin.blumenstingl@googlemail.com \
    --cc=andrew@lunn.ch \
    --cc=davem@davemloft.net \
    --cc=devicetree@vger.kernel.org \
    --cc=f.fainelli@gmail.com \
    --cc=jianxin.pan@amlogic.com \
    --cc=linux-amlogic@lists.infradead.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=netdev@vger.kernel.org \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.