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From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Mark Brown <broonie@kernel.org>
Cc: Chris Brandt <chris.brandt@renesas.com>,
	linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	linux-sh@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH 7/8] spi: rspi: Fill in spi_transfer.effective_speed_hz
Date: Mon, 08 Jun 2020 09:59:39 +0000	[thread overview]
Message-ID: <20200608095940.30516-8-geert+renesas@glider.be> (raw)
In-Reply-To: <20200608095940.30516-1-geert+renesas@glider.be>

Fill in the effective bit rate used for transfers, so the SPI core can
calculate instead of estimate delays.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/spi/spi-rspi.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
index 38c0cd7febabf114..2b5334e22ae421b5 100644
--- a/drivers/spi/spi-rspi.c
+++ b/drivers/spi/spi-rspi.c
@@ -262,6 +262,7 @@ static void rspi_set_rate(struct rspi_data *rspi)
 
 	rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
 	rspi->spcmd |= SPCMD_BRDV(brdv);
+	rspi->speed_hz = DIV_ROUND_UP(clksrc, (2U << brdv) * (spbr + 1));
 }
 
 /*
@@ -344,6 +345,7 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
 	clksrc = clk_get_rate(rspi->clk);
 	if (rspi->speed_hz >= clksrc) {
 		spbr = 0;
+		rspi->speed_hz = clksrc;
 	} else {
 		spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz);
 		while (spbr > 255 && brdv < 3) {
@@ -351,6 +353,7 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
 			spbr = DIV_ROUND_UP(spbr, 2);
 		}
 		spbr = clamp(spbr, 0, 255);
+		rspi->speed_hz = DIV_ROUND_UP(clksrc, (2U << brdv) * spbr);
 	}
 	rspi_write8(rspi, spbr, RSPI_SPBR);
 	rspi->spcmd |= SPCMD_BRDV(brdv);
@@ -698,6 +701,8 @@ static int rspi_common_transfer(struct rspi_data *rspi,
 {
 	int ret;
 
+	xfer->effective_speed_hz = rspi->speed_hz;
+
 	ret = rspi_dma_check_then_transfer(rspi, xfer);
 	if (ret != -EAGAIN)
 		return ret;
@@ -853,6 +858,7 @@ static int qspi_transfer_one(struct spi_controller *ctlr,
 {
 	struct rspi_data *rspi = spi_controller_get_devdata(ctlr);
 
+	xfer->effective_speed_hz = rspi->speed_hz;
 	if (spi->mode & SPI_LOOP) {
 		return qspi_transfer_out_in(rspi, xfer);
 	} else if (xfer->tx_nbits > SPI_NBITS_SINGLE) {
-- 
2.17.1

WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert+renesas@glider.be>
To: Mark Brown <broonie@kernel.org>
Cc: Chris Brandt <chris.brandt@renesas.com>,
	linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	linux-sh@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [PATCH 7/8] spi: rspi: Fill in spi_transfer.effective_speed_hz
Date: Mon,  8 Jun 2020 11:59:39 +0200	[thread overview]
Message-ID: <20200608095940.30516-8-geert+renesas@glider.be> (raw)
In-Reply-To: <20200608095940.30516-1-geert+renesas@glider.be>

Fill in the effective bit rate used for transfers, so the SPI core can
calculate instead of estimate delays.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/spi/spi-rspi.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
index 38c0cd7febabf114..2b5334e22ae421b5 100644
--- a/drivers/spi/spi-rspi.c
+++ b/drivers/spi/spi-rspi.c
@@ -262,6 +262,7 @@ static void rspi_set_rate(struct rspi_data *rspi)
 
 	rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
 	rspi->spcmd |= SPCMD_BRDV(brdv);
+	rspi->speed_hz = DIV_ROUND_UP(clksrc, (2U << brdv) * (spbr + 1));
 }
 
 /*
@@ -344,6 +345,7 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
 	clksrc = clk_get_rate(rspi->clk);
 	if (rspi->speed_hz >= clksrc) {
 		spbr = 0;
+		rspi->speed_hz = clksrc;
 	} else {
 		spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz);
 		while (spbr > 255 && brdv < 3) {
@@ -351,6 +353,7 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
 			spbr = DIV_ROUND_UP(spbr, 2);
 		}
 		spbr = clamp(spbr, 0, 255);
+		rspi->speed_hz = DIV_ROUND_UP(clksrc, (2U << brdv) * spbr);
 	}
 	rspi_write8(rspi, spbr, RSPI_SPBR);
 	rspi->spcmd |= SPCMD_BRDV(brdv);
@@ -698,6 +701,8 @@ static int rspi_common_transfer(struct rspi_data *rspi,
 {
 	int ret;
 
+	xfer->effective_speed_hz = rspi->speed_hz;
+
 	ret = rspi_dma_check_then_transfer(rspi, xfer);
 	if (ret != -EAGAIN)
 		return ret;
@@ -853,6 +858,7 @@ static int qspi_transfer_one(struct spi_controller *ctlr,
 {
 	struct rspi_data *rspi = spi_controller_get_devdata(ctlr);
 
+	xfer->effective_speed_hz = rspi->speed_hz;
 	if (spi->mode & SPI_LOOP) {
 		return qspi_transfer_out_in(rspi, xfer);
 	} else if (xfer->tx_nbits > SPI_NBITS_SINGLE) {
-- 
2.17.1


  parent reply	other threads:[~2020-06-08  9:59 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-08  9:59 [PATCH 0/8] spi: rspi: Bit rate improvements Geert Uytterhoeven
2020-06-08  9:59 ` Geert Uytterhoeven
2020-06-08  9:59 ` [PATCH 1/8] spi: rspi: Remove useless .set_config_register() check Geert Uytterhoeven
2020-06-08  9:59   ` Geert Uytterhoeven
2020-06-08  9:59 ` [PATCH 2/8] spi: rspi: Use requested instead of maximum bit rate Geert Uytterhoeven
2020-06-08  9:59   ` Geert Uytterhoeven
2020-06-08  9:59 ` [PATCH 3/8] spi: rspi: Clean up Bit Rate Division Setting handling Geert Uytterhoeven
2020-06-08  9:59   ` Geert Uytterhoeven
2020-06-08  9:59 ` [PATCH 4/8] spi: rspi: Increase bit rate accuracy on RZ/A Geert Uytterhoeven
2020-06-08  9:59   ` Geert Uytterhoeven
2020-06-08  9:59 ` [PATCH 5/8] spi: rspi: Increase bit rate range for RSPI on SH Geert Uytterhoeven
2020-06-08  9:59   ` Geert Uytterhoeven
2020-06-08  9:59 ` [PATCH 6/8] spi: rspi: Increase bit rate range for QSPI Geert Uytterhoeven
2020-06-08  9:59   ` Geert Uytterhoeven
2020-06-08  9:59 ` Geert Uytterhoeven [this message]
2020-06-08  9:59   ` [PATCH 7/8] spi: rspi: Fill in spi_transfer.effective_speed_hz Geert Uytterhoeven
2020-06-08  9:59 ` [PATCH 8/8] spi: rspi: Fill in controller speed limits Geert Uytterhoeven
2020-06-08  9:59   ` Geert Uytterhoeven
2020-06-09 12:54 ` [PATCH 0/8] spi: rspi: Bit rate improvements Mark Brown
2020-06-09 12:54   ` Mark Brown

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