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From: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
To: mpe@ellerman.id.au, mikey@neuling.org
Cc: ravi.bangoria@linux.ibm.com, paulus@samba.org, npiggin@gmail.com,
	christophe.leroy@c-s.fr, naveen.n.rao@linux.vnet.ibm.com,
	peterz@infradead.org, jolsa@kernel.org, oleg@redhat.com,
	fweisbec@gmail.com, mingo@kernel.org, pedromfc@br.ibm.com,
	miltonm@us.ibm.com, jniethe5@gmail.com, rogealve@br.ibm.com,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH v5 06/10] powerpc/watchpoint: Set CPU_FTR_DAWR1 based on pa-features bit
Date: Thu, 23 Jul 2020 14:38:09 +0530	[thread overview]
Message-ID: <20200723090813.303838-7-ravi.bangoria@linux.ibm.com> (raw)
In-Reply-To: <20200723090813.303838-1-ravi.bangoria@linux.ibm.com>

As per the PAPR, bit 0 of byte 64 in pa-features property indicates
availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
DAWR is present, otherwise not. Host generally uses "cpu-features",
which masks "pa-features". But "cpu-features" are still not used for
guests and thus this change is mostly applicable for guests only.

Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Tested-by: Jordan Niethe <jniethe5@gmail.com>
---
 arch/powerpc/kernel/prom.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 033d43819ed8..01dda206d68e 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -175,6 +175,8 @@ static struct ibm_pa_feature {
 	 */
 	{ .pabyte = 22, .pabit = 0, .cpu_features = CPU_FTR_TM_COMP,
 	  .cpu_user_ftrs2 = PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_HTM_NOSC_COMP },
+
+	{ .pabyte = 64, .pabit = 0, .cpu_features = CPU_FTR_DAWR1 },
 };
 
 static void __init scan_features(unsigned long node, const unsigned char *ftrs,
-- 
2.26.2


WARNING: multiple messages have this Message-ID (diff)
From: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
To: mpe@ellerman.id.au, mikey@neuling.org
Cc: christophe.leroy@c-s.fr, ravi.bangoria@linux.ibm.com,
	rogealve@br.ibm.com, miltonm@us.ibm.com, peterz@infradead.org,
	fweisbec@gmail.com, oleg@redhat.com, npiggin@gmail.com,
	linux-kernel@vger.kernel.org, paulus@samba.org, jolsa@kernel.org,
	jniethe5@gmail.com, pedromfc@br.ibm.com,
	naveen.n.rao@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org,
	mingo@kernel.org
Subject: [PATCH v5 06/10] powerpc/watchpoint: Set CPU_FTR_DAWR1 based on pa-features bit
Date: Thu, 23 Jul 2020 14:38:09 +0530	[thread overview]
Message-ID: <20200723090813.303838-7-ravi.bangoria@linux.ibm.com> (raw)
In-Reply-To: <20200723090813.303838-1-ravi.bangoria@linux.ibm.com>

As per the PAPR, bit 0 of byte 64 in pa-features property indicates
availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
DAWR is present, otherwise not. Host generally uses "cpu-features",
which masks "pa-features". But "cpu-features" are still not used for
guests and thus this change is mostly applicable for guests only.

Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Tested-by: Jordan Niethe <jniethe5@gmail.com>
---
 arch/powerpc/kernel/prom.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 033d43819ed8..01dda206d68e 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -175,6 +175,8 @@ static struct ibm_pa_feature {
 	 */
 	{ .pabyte = 22, .pabit = 0, .cpu_features = CPU_FTR_TM_COMP,
 	  .cpu_user_ftrs2 = PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_HTM_NOSC_COMP },
+
+	{ .pabyte = 64, .pabit = 0, .cpu_features = CPU_FTR_DAWR1 },
 };
 
 static void __init scan_features(unsigned long node, const unsigned char *ftrs,
-- 
2.26.2


  parent reply	other threads:[~2020-07-23  9:09 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-23  9:08 [PATCH v5 00/10] powerpc/watchpoint: Enable 2nd DAWR on baremetal and powervm Ravi Bangoria
2020-07-23  9:08 ` Ravi Bangoria
2020-07-23  9:08 ` [PATCH v5 01/10] powerpc/watchpoint: Fix 512 byte boundary limit Ravi Bangoria
2020-07-23  9:08   ` Ravi Bangoria
2020-07-23  9:08 ` [PATCH v5 02/10] powerpc/watchpoint: Fix DAWR exception constraint Ravi Bangoria
2020-07-23  9:08   ` Ravi Bangoria
2020-07-23  9:08 ` [PATCH v5 03/10] powerpc/watchpoint: Fix DAWR exception for CACHEOP Ravi Bangoria
2020-07-23  9:08   ` Ravi Bangoria
2020-07-23  9:08 ` [PATCH v5 04/10] powerpc/watchpoint: Enable watchpoint functionality on power10 guest Ravi Bangoria
2020-07-23  9:08   ` Ravi Bangoria
2020-07-23  9:08 ` [PATCH v5 05/10] powerpc/dt_cpu_ftrs: Add feature for 2nd DAWR Ravi Bangoria
2020-07-23  9:08   ` Ravi Bangoria
2020-07-23  9:08 ` Ravi Bangoria [this message]
2020-07-23  9:08   ` [PATCH v5 06/10] powerpc/watchpoint: Set CPU_FTR_DAWR1 based on pa-features bit Ravi Bangoria
2020-07-23  9:08 ` [PATCH v5 07/10] powerpc/watchpoint: Rename current H_SET_MODE DAWR macro Ravi Bangoria
2020-07-23  9:08   ` Ravi Bangoria
2020-07-23  9:08 ` [PATCH v5 08/10] powerpc/watchpoint: Guest support for 2nd DAWR hcall Ravi Bangoria
2020-07-23  9:08   ` Ravi Bangoria
2020-07-23  9:08 ` [PATCH v5 09/10] powerpc/watchpoint: Return available watchpoints dynamically Ravi Bangoria
2020-07-23  9:08   ` Ravi Bangoria
2020-07-23  9:08 ` [PATCH v5 10/10] powerpc/watchpoint: Remove 512 byte boundary Ravi Bangoria
2020-07-23  9:08   ` Ravi Bangoria
2020-07-27  7:26 ` [PATCH v5 00/10] powerpc/watchpoint: Enable 2nd DAWR on baremetal and powervm Michael Ellerman
2020-07-27  7:26   ` Michael Ellerman

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