From: Lucas Stach <l.stach@pengutronix.de> To: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org> Cc: NXP Linux Team <linux-imx@nxp.com>, Fabio Estevam <festevam@gmail.com>, Frieder Schrempf <frieder.schrempf@kontron.de>, Marek Vasut <marex@denx.de>, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, kernel@pengutronix.de, patchwork-lst@pengutronix.de Subject: [PATCH 07/11] soc: imx: gpcv2: add support for optional resets Date: Wed, 30 Sep 2020 17:50:02 +0200 [thread overview] Message-ID: <20200930155006.535712-8-l.stach@pengutronix.de> (raw) In-Reply-To: <20200930155006.535712-1-l.stach@pengutronix.de> Normally the reset for the devices inside the power domain is triggered automatically from the PGC in the power-up sequencing, however on i.MX8MM this doesn't work for the GPU power domains. Add support for triggering the reset explicitly during the power up sequencing. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- .../devicetree/bindings/power/fsl,imx-gpcv2.yaml | 6 ++++++ drivers/soc/imx/gpcv2.c | 13 +++++++++++++ 2 files changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml index bde09a0b2da3..9773771b9000 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml @@ -62,6 +62,12 @@ properties: power-supply: true + resets: + description: | + A number of phandles to resets that need to be asserted during + power-up sequencing of the domain. + minItems: 1 + required: - '#power-domain-cells' - reg diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index db93fef0c76b..76aa8a67d8a7 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -15,6 +15,7 @@ #include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> +#include <linux/reset.h> #include <linux/sizes.h> #include <dt-bindings/power/imx7-power.h> #include <dt-bindings/power/imx8mq-power.h> @@ -112,6 +113,7 @@ struct imx_pgc_domain { struct regulator *regulator; struct clk *clk[GPC_CLK_MAX]; int num_clks; + struct reset_control *reset; unsigned int pgc; @@ -167,6 +169,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) } } + reset_control_assert(domain->reset); + if (domain->bits.pxx) { /* request the domain to power up */ regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, @@ -189,6 +193,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) GPC_PGC_CTRL_PCR, 0); } + reset_control_deassert(domain->reset); + /* request the ADB400 to power up */ if (domain->bits.hskreq) { regmap_update_bits(domain->regmap, GPC_PU_PWRHSK, @@ -577,6 +583,13 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) domain->voltage, domain->voltage); } + domain->reset = devm_reset_control_array_get_optional_exclusive(domain->dev); + if (IS_ERR(domain->reset)) { + if (PTR_ERR(domain->reset) != -EPROBE_DEFER) + dev_err(domain->dev, "Failed to get domain's reset\n"); + return PTR_ERR(domain->reset); + } + ret = imx_pgc_get_clocks(domain); if (ret) { if (ret != -EPROBE_DEFER) -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Lucas Stach <l.stach@pengutronix.de> To: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org> Cc: Marek Vasut <marex@denx.de>, devicetree@vger.kernel.org, Frieder Schrempf <frieder.schrempf@kontron.de>, patchwork-lst@pengutronix.de, NXP Linux Team <linux-imx@nxp.com>, kernel@pengutronix.de, Fabio Estevam <festevam@gmail.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH 07/11] soc: imx: gpcv2: add support for optional resets Date: Wed, 30 Sep 2020 17:50:02 +0200 [thread overview] Message-ID: <20200930155006.535712-8-l.stach@pengutronix.de> (raw) In-Reply-To: <20200930155006.535712-1-l.stach@pengutronix.de> Normally the reset for the devices inside the power domain is triggered automatically from the PGC in the power-up sequencing, however on i.MX8MM this doesn't work for the GPU power domains. Add support for triggering the reset explicitly during the power up sequencing. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- .../devicetree/bindings/power/fsl,imx-gpcv2.yaml | 6 ++++++ drivers/soc/imx/gpcv2.c | 13 +++++++++++++ 2 files changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml index bde09a0b2da3..9773771b9000 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml @@ -62,6 +62,12 @@ properties: power-supply: true + resets: + description: | + A number of phandles to resets that need to be asserted during + power-up sequencing of the domain. + minItems: 1 + required: - '#power-domain-cells' - reg diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index db93fef0c76b..76aa8a67d8a7 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -15,6 +15,7 @@ #include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> +#include <linux/reset.h> #include <linux/sizes.h> #include <dt-bindings/power/imx7-power.h> #include <dt-bindings/power/imx8mq-power.h> @@ -112,6 +113,7 @@ struct imx_pgc_domain { struct regulator *regulator; struct clk *clk[GPC_CLK_MAX]; int num_clks; + struct reset_control *reset; unsigned int pgc; @@ -167,6 +169,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) } } + reset_control_assert(domain->reset); + if (domain->bits.pxx) { /* request the domain to power up */ regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ, @@ -189,6 +193,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd) GPC_PGC_CTRL_PCR, 0); } + reset_control_deassert(domain->reset); + /* request the ADB400 to power up */ if (domain->bits.hskreq) { regmap_update_bits(domain->regmap, GPC_PU_PWRHSK, @@ -577,6 +583,13 @@ static int imx_pgc_domain_probe(struct platform_device *pdev) domain->voltage, domain->voltage); } + domain->reset = devm_reset_control_array_get_optional_exclusive(domain->dev); + if (IS_ERR(domain->reset)) { + if (PTR_ERR(domain->reset) != -EPROBE_DEFER) + dev_err(domain->dev, "Failed to get domain's reset\n"); + return PTR_ERR(domain->reset); + } + ret = imx_pgc_get_clocks(domain); if (ret) { if (ret != -EPROBE_DEFER) -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-30 15:50 UTC|newest] Thread overview: 118+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-30 15:49 [PATCH 00/11] i.MX8MM power domain support Lucas Stach 2020-09-30 15:49 ` Lucas Stach 2020-09-30 15:49 ` [PATCH 01/11] soc: imx: gpcv2: move to more ideomatic error handling in probe Lucas Stach 2020-09-30 15:49 ` Lucas Stach 2020-09-30 16:04 ` Marek Vasut 2020-09-30 16:04 ` Marek Vasut 2020-09-30 15:49 ` [PATCH 02/11] soc: imx: gpcv2: move domain mapping to domain driver probe Lucas Stach 2020-09-30 15:49 ` Lucas Stach 2020-09-30 16:07 ` Marek Vasut 2020-09-30 16:07 ` Marek Vasut 2020-09-30 15:49 ` [PATCH 03/11] soc: imx: gpcv2: split power up and power down sequence control Lucas Stach 2020-09-30 15:49 ` Lucas Stach 2020-09-30 16:10 ` Marek Vasut 2020-09-30 16:10 ` Marek Vasut 2020-09-30 15:49 ` [PATCH 04/11] soc: imx: gpcv2: wait for ADB400 handshake Lucas Stach 2020-09-30 15:49 ` Lucas Stach 2020-09-30 16:11 ` Marek Vasut 2020-09-30 16:11 ` Marek Vasut 2020-09-30 16:19 ` Lucas Stach 2020-09-30 16:19 ` Lucas Stach 2020-09-30 16:23 ` Marek Vasut 2020-09-30 16:23 ` Marek Vasut 2020-10-09 3:05 ` Jacky Bai 2020-10-09 3:05 ` Jacky Bai 2020-10-09 7:27 ` Marek Vasut 2020-10-09 7:27 ` Marek Vasut 2020-10-09 7:51 ` Jacky Bai 2020-10-09 7:51 ` Jacky Bai 2020-10-09 8:19 ` Marek Vasut 2020-10-09 8:19 ` Marek Vasut 2020-09-30 15:50 ` [PATCH 05/11] soc: imx: gpcv2: add runtime PM support for power-domains Lucas Stach 2020-09-30 15:50 ` Lucas Stach 2020-09-30 16:14 ` Marek Vasut 2020-09-30 16:14 ` Marek Vasut 2020-09-30 16:20 ` Lucas Stach 2020-09-30 16:20 ` Lucas Stach 2020-09-30 15:50 ` [PATCH 06/11] soc: imx: gpcv2: allow domains without power-sequence control Lucas Stach 2020-09-30 15:50 ` Lucas Stach 2020-10-09 7:54 ` Jacky Bai 2020-10-09 7:54 ` Jacky Bai 2020-10-09 7:57 ` Jacky Bai 2020-10-09 7:57 ` Jacky Bai 2020-09-30 15:50 ` Lucas Stach [this message] 2020-09-30 15:50 ` [PATCH 07/11] soc: imx: gpcv2: add support for optional resets Lucas Stach 2020-09-30 16:15 ` Marek Vasut 2020-09-30 16:15 ` Marek Vasut 2020-09-30 16:23 ` Lucas Stach 2020-09-30 16:23 ` Lucas Stach 2020-09-30 16:30 ` Marek Vasut 2020-09-30 16:30 ` Marek Vasut 2020-09-30 16:34 ` Lucas Stach 2020-09-30 16:34 ` Lucas Stach 2020-09-30 16:38 ` Marek Vasut 2020-09-30 16:38 ` Marek Vasut 2020-10-01 8:59 ` Krzysztof Kozlowski 2020-10-01 8:59 ` Krzysztof Kozlowski 2020-10-06 19:42 ` Rob Herring 2020-10-06 19:42 ` Rob Herring 2020-09-30 15:50 ` [PATCH 08/11] dt-bindings: add defines for i.MX8MM power domains Lucas Stach 2020-09-30 15:50 ` Lucas Stach 2020-10-01 8:54 ` Krzysztof Kozlowski 2020-10-01 8:54 ` Krzysztof Kozlowski 2020-10-06 19:47 ` Rob Herring 2020-10-06 19:47 ` Rob Herring 2020-09-30 15:50 ` [PATCH 09/11] soc: imx: gpcv2: add support " Lucas Stach 2020-09-30 15:50 ` Lucas Stach 2020-09-30 16:18 ` Marek Vasut 2020-09-30 16:18 ` Marek Vasut 2020-09-30 15:50 ` [PATCH 10/11] arm64: dts: imx8mm: add GPC node and " Lucas Stach 2020-09-30 15:50 ` Lucas Stach 2020-09-30 16:20 ` Marek Vasut 2020-09-30 16:20 ` Marek Vasut 2020-10-01 8:51 ` Krzysztof Kozlowski 2020-10-01 8:51 ` Krzysztof Kozlowski 2020-10-23 13:22 ` Adam Ford 2020-10-23 13:22 ` Adam Ford 2020-10-23 14:39 ` Jacky Bai 2020-10-23 14:39 ` Jacky Bai 2020-10-26 10:56 ` Abel Vesa 2020-10-26 10:56 ` Abel Vesa 2020-10-26 11:01 ` Abel Vesa 2020-10-26 11:01 ` Abel Vesa 2020-10-26 11:13 ` Adam Ford 2020-10-26 11:13 ` Adam Ford 2020-10-26 11:02 ` Lucas Stach 2020-10-26 11:02 ` Lucas Stach 2020-09-30 15:50 ` [PATCH 11/11] arm64: dts: imx8mm: put USB controllers into power-domains Lucas Stach 2020-09-30 15:50 ` Lucas Stach 2020-10-01 7:46 ` [PATCH 00/11] i.MX8MM power domain support Frieder Schrempf 2020-10-01 7:46 ` Frieder Schrempf 2020-10-03 18:03 ` Adam Ford 2020-10-03 18:03 ` Adam Ford [not found] ` <CAHCN7xKjWEwQr9y0QLrR6KVT=ut=v=coqt4beAvrz1kQSGbX1g@mail.gmail.com> 2020-10-03 18:08 ` Marek Vasut 2020-10-03 18:08 ` Marek Vasut 2020-10-03 18:11 ` Adam Ford 2020-10-03 18:11 ` Adam Ford 2020-10-08 20:47 ` Adam Ford 2020-10-08 20:47 ` Adam Ford 2020-10-09 3:00 ` Jacky Bai 2020-10-09 3:00 ` Jacky Bai 2020-10-09 11:12 ` Lucas Stach 2020-10-09 11:12 ` Lucas Stach 2020-10-09 12:57 ` Adam Ford 2020-10-09 12:57 ` Adam Ford 2020-10-10 2:16 ` Jacky Bai 2020-10-10 2:16 ` Jacky Bai 2020-10-13 18:26 ` Lucas Stach 2020-10-13 18:26 ` Lucas Stach 2020-10-14 1:23 ` Peng Fan 2020-10-14 1:23 ` Peng Fan 2020-10-22 8:24 ` Lucas Stach 2020-10-22 8:24 ` Lucas Stach 2020-10-22 16:36 ` Fabio Estevam 2020-10-22 16:36 ` Fabio Estevam 2020-10-28 13:50 ` Peng Fan 2020-10-28 13:50 ` Peng Fan 2020-10-31 13:56 ` Adam Ford 2020-10-31 13:56 ` Adam Ford
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20200930155006.535712-8-l.stach@pengutronix.de \ --to=l.stach@pengutronix.de \ --cc=devicetree@vger.kernel.org \ --cc=festevam@gmail.com \ --cc=frieder.schrempf@kontron.de \ --cc=kernel@pengutronix.de \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-imx@nxp.com \ --cc=marex@denx.de \ --cc=patchwork-lst@pengutronix.de \ --cc=robh+dt@kernel.org \ --cc=shawnguo@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.